Hello everyone,
In configs/example/ruby_random_test.py, I want to connect the CPU port and the
ruby system port (sequence) through a crossbar, but I encounter an error.
Original code:
tester.cpuInstDataPort = ruby_port.in_ports
TO:
system.dmux = NoncoherentXBar(forward_latency=1
Hi Gabriel,
I have checked that RubyPort::MemResponsePort::getAddrRanges() function, it
actually just defined it but not implemented. It still has the same error. I
already checked the ruby system from memory control to cache controller
(sequencer), they have the same address range, but the get
