Hi All,
I'm emulating an Android full system using gem5 v20.0.0.0 version, taking
SPEC2017 checkpoints from a single-core cpu system.
The checkpoint can successfully restore from my single-core model and run to
completion.
When I restore from the multi-core model, I encountered the following pro
Hi everyone,
I would like to load the data in the DRAM at the beginning of the
simulation, but it seems like there is no actual data stored in the DRAM.
It only evaluates the performance and power consumption. The code I look at
is src/mem/DRAMInterface.cc. Is my understanding correct?
Besides, i
In my experience, you need a checkpoint from an N cpu
system to restore in an N cpu system. That is, the
checkpoint contents depend on the number of cpus and
are not interchangeable. If I'm wrong about this,
I would be happy to be corrected!
Best wishes - Eliot Moss
On 12/26/2022 9:24 AM, Eliot Moss via gem5-users wrote:
In my experience, you need a checkpoint from an N cpu
system to restore in an N cpu system. That is, the
checkpoint contents depend on the number of cpus and
are not interchangeable. If I'm wrong about this,
I would be happy to be correcte
Hi Eliot Moss,
Thanks for your reply.
I am generating Checkpoint for SPEC2017. Do I need to regenerate my BBV
file under N cpus system?
There is a condition here that the simpoint_profile (BBV) cannot be
generated when n > 1.
$vim ./configs/example/fs.py +210
205
