[gem5-users] Re: CHi - assertion error when modelling "mostly inclusive" for private L2$

Hello An update on my previous email... Have been simulating the multicore system with Parsec/Splash2 benchmarks for different permutations of clusivity for L2$ and L3$. The results being in the following table. Note, by L3$, I mean the L3$ within the HNF L2$ clusivity L3$ clusivity Comments

[gem5-users] some questions about IO Device when using FS mode in Gem5

Hello! I run gem5 in Full System mode through fs.py.  When I write a c program and use mmap() function to map the hardware to read the hardware address, for example, the hardware address of Trust_Watchdog is 0x2a49. When I use the mmap() to read the watchdog address,there is no feedback.(

[gem5-users] Re: Integrating MCPAT with gem5

Hi Vipin, McPAT is not the same kind of simulator as SST, DRAMSim, and SystemC, so it cannot be integrated in the same way. It's not really a timing simulator at all. You can use gem5's statistics output as the "activity rate" which is one of the inputs to McPAT. However, the other inputs (e.g., t

[gem5-users] Re: Adding PioDevice leads to TypeError: No constructor defined

Hello, I believe the problem is that gem5 tries to do too much automatically for you! gem5 automatically creates a lot of the constructor/destructor codes. Given all of this hidden/automatic code generation, it's difficult to know exactly what's going wrong (for both you and for us). That said, I

[gem5-users] Re: Adding PioDevice leads to TypeError: No constructor defined

I just pushed a change that will make this error message better. "fatal: Cannot instantiate an abstract SimObject (system.dev)" is what the error now says :). See https://gem5-review.googlesource.com/c/public/gem5/+/59049 Cheers, Jason On Fri, Apr 22, 2022 at 8:57 AM Jason Lowe-Power wrote: >

[gem5-users] Re: Adding PioDevice leads to TypeError: No constructor defined

Jason, Thanks for the explanation and the super-fast fix below – definitely a more insightful message I was tracking the hierarchy diagrams and missed the abstract qualification – but I see it now & I’ll be more aware going forward. Thanks for your leadership in this space Raghu

[gem5-users] Re: Low memory bandwidth achieved with STREAM benchmark

I think it is hard to get to a real machine level in terms of BW. But By looking at your stats, I found the lsqFullEvents is high. You can go after the CPU to make it more aggressive, increasing Load/Store queue size, and ROB depth are the minimal changes you can make. I usually do at least ROB siz