Hi,
Thank you for the replies!
I mapped the physical address of the device to a virtual address and marked it
as uncacheable and did the trick for X86. So now using memcpy() I read/write
from and to the device using it's mapped virtual address.
However, for ARM it only works for read. Even if
Hi all,
I am using the gem5 version 21. I can find stats such as
*system.cpu.l2..overall_accesses::total* which indicates the
total number of L2 cache accesses of a specific type.
Could anyone tell what stats are in the stats.txt file for knowing a) the
number of responses reaches "membus" from t
