[gem5-users] Alpha full-system simulation with more than 4 cores.

2013-01-15 Thread Jae-eon Jo
Dear all, I am currently running FS simulation with Alpha ISA. The simulation with 4 cores is okay, so I successfully executed PARSEC workload. (Thanks to 'http://www.cs.utexas.edu/~cart/parsec_m5/') However, the simulator prints infinitely many 'warn: clear IPI for CPU=0, but NO IPI' with more t

Re: [gem5-users] Ruby L2 Cache Latency

2013-01-15 Thread Nilay Vaish
On Mon, 14 Jan 2013, Jordan Fix wrote: Hello, I'm doing simulations with the Ruby memory system. I found a comment in configs/ruby/MESI_CMP_directory.py that says: "# Note: the L2 Cache latency is not currently used" Is this comment old/no longer true? Or is the ruby memory system for MESI_

[gem5-users] How solve a panic error ?

2013-01-15 Thread Abu Saad
Hi all "Thanks to Nilay and benjamin for your kind and careful attention . I am > succeed to run benchmark :-) ." > > > But I got a panic messages where told page table fault when accessing > virtual memory and shown address 0xff000(This type) and in fault.cc and > line 70. I have found in fau

[gem5-users] How solve a panic error ?

2013-01-15 Thread Abu Saad
Hi all "Thanks to Nilay and benjamin for your kind and careful attention . I am > succeed to run benchmark :-) ." > > > But I got a panic messages where told page table fault when accessing > virtual memory and shown address 0xff000(This type) and in fault.cc and > line 70. I have found in fau

[gem5-users] Trouble with Running X86 with o3cpu

2013-01-15 Thread Rx Ni
Hi, all, I have met a problem shown as below: gem5.opt: build/X86_MESI_CMP_directory/cpu/o3/fetch.hh:105: void DefaultFetch::FetchTranslation::finish(Fault, RequestPtr, ThreadContext*, BaseTLB::Mode) [with Impl = O3CPUImpl, Fault = RefCountingPtr, RequestPtr = Request*]: Assertion `mode == BaseTL

Re: [gem5-users] LD_LIBRARY_PATH & LIBRARY_PATH

2013-01-15 Thread Kalai Narayanan-SSI
I had rebuilt the required tools from scratch and got gem5 to build. I see that the linker is looking into the proper path to get the libraries. But still I see the runtime error. I was seeing a mail thread (prob. an year ago) which states that there were some issues with particular combination

[gem5-users] Checkpointing principle

2013-01-15 Thread Anouk
Dear, I have a question about checkpointing. Is it possible that a instruction can be fetched before the ROI (before the checkpoint is taken) and completed after the checkpoint? And if so, could you please give me a hint where I could find this in the checkpoint file (m5.cpt) or somewhere else? T

Re: [gem5-users] Use of gem5

2013-01-15 Thread Payne, Benjamin
I suggest starting with the video tutorials on http://gem5.org/Introduction and http://gem5.org/Running_gem5 See also, http://gem5.org/Frequently_Asked_Questions From: gem5-users-boun...@gem5.org [mailto:gem5-users-boun...@gem5.org] On Behalf Of Kostas Sent: Monday, January 14, 2013 11:55 AM

Re: [gem5-users] Checkpointing principle

2013-01-15 Thread Ali Saidi
Prior to some changes that will be committed soon it was possible for a CPU to stop in the middle of a micro-op for a checkpoint. Some changes on the review board change this functionality so it will only stop at instruction boundaries. Ali On 15.01.2013 14:33, Anouk wrote: > Dear, > > I

[gem5-users] memory limit to ARM target

2013-01-15 Thread Chen Tian
Hello, In FSconfig.py, there is a limit on memory size: if convert.toMemorySize(mdesc.mem()) > int(self.realview.max_mem_size): print "The currently selected ARM platforms doesn't support" print " the amount of DRAM you've selected. Please try" print " anothe

Re: [gem5-users] Trouble with Running X86 with o3cpu

2013-01-15 Thread Nilay Vaish
On Tue, 15 Jan 2013, Rx Ni wrote: Hi, all, I have met a problem shown as below: gem5.opt: build/X86_MESI_CMP_directory/cpu/o3/fetch.hh:105: void DefaultFetch::FetchTranslation::finish(Fault, RequestPtr, ThreadContext*, BaseTLB::Mode) [with Impl = O3CPUImpl, Fault = RefCountingPtr, RequestPtr =

Re: [gem5-users] memory limit to ARM target

2013-01-15 Thread Ali Saidi
The VExpress platform supports 2047MB of memory. Ali On Jan 15, 2013, at 7:02 PM, Chen Tian wrote: > Hello, > > In FSconfig.py, there is a limit on memory size: > > if convert.toMemorySize(mdesc.mem()) > int(self.realview.max_mem_size): > print "The currently selected ARM platfo

Re: [gem5-users] memory limit to ARM target

2013-01-15 Thread Chen Tian
Hi Ali, I just tried three VExpress machine types as suggested by the command line: command line: ./build/ARM/gem5.opt configs/example/fs.py --kernel=vmlinux --disk=linux-arm-ael.img --mem-size=512MB --machine-type=VExpress_ELT configs/example/fs.py Traceback (most recent call last): File "",

Re: [gem5-users] Alpha full-system simulation with more than 4 cores.

2013-01-15 Thread Jae-eon Jo
I posted the command with an argument `-n 5,` but the result is actually taken from `-n 8`. It was my mistake, Sorry! Anyway, I found mirror of http://www.kernel.org/hg/linux-2.6/, and now I am trying to follow the instruction. I'll report if this solves the problem. Thanks, Jae-eon Jo. *[root@IT