It is possible to install some apk files by simply placing them in the
system folder. To do this you will need to mount the disk image on your
host machine and copy the apk over.
On Oct 11, 2012 1:13 AM, "이주성" wrote:
> Hello, I’m newbie to using the gem5.
>
> Sorry for that I’m such a beginner.
>
Thank you very much.
As you said, I tried to mount the img file,
*
gem5-directory/dist/m5/system/disks/ARMv7a-Gingerbread-Android.SMP.mouse.nolock.clean.img
*
but I faced another problem.
I tried to mount the the img file as
*sudo mount -o loop ARMv7a-Gingerbread-Android.SMP.mouse.nolock.clean.img
You have to specify the offset.
sudo mount -o loop,offset=32256
ARMv7a-Gingerbread-Android.SMP.mouse.nolock.clean.img ./temp
On Thu, Oct 11, 2012 at 4:57 AM, 이주성 wrote:
> Thank you very much.
> As you said, I tried to mount the img file,
> *
> gem5-directory/dist/m5/system/disks/ARMv7a-Gingerbr
It works!
Thank you very much for your help !
Have a nice day.
Joosung Lee
2012/10/11 Anthony Gutierrez
> You have to specify the offset.
>
> sudo mount -o loop,offset=32256
> ARMv7a-Gingerbread-Android.SMP.mouse.nolock.clean.img ./temp
>
>
> On Thu, Oct 11, 2012 at 4:57 AM, 이주성 wrote:
>
>> Th
Hi,
I encountered a nasty bug in gem5 regarding misspeculated load_locked
instructions. I have some conceptual solutions, but I would like to ask
your comments on which one to implement, and how to implement it.
I'll start with explaining the problem. Consider the following alpha
assembler:
Hello again,
Does anyone know the function(s) to copy the register file that Amin was
alluding to?
How about advice on using m5_readfile and m5_writefile, or a MessageBuffer?
Thanks,
David
--
David Gloe
gloex...@umn.edu da...@cs.umn.edu dcg...@gmail.com
Masters Student, Computer Science
Unive
See the inline.
Amin
On Thu, Oct 11, 2012 at 12:53 PM, David Gloe wrote:
> Hello again,
>
> Does anyone know the function(s) to copy the register file that Amin was
> alluding to?
>
grep copyArchRegs(), copyRegs(), readArchIntReg(), and simialr names.
> How about advice on using m5_readfile
Amin,
Another idea I had was using some of the reserved pseudo-instructions to
do this. Would that be how you would do this with a shared resource in
the simulator? I figure I can use one reserved instruction for enqueue
and one for dequeue, storing the buffer in a global variable in
pseudo_i
Hello,
I am running BioBench and PARSEC benchmarks with the ARM ISA in SE
mode. I am getting "syscall unimplemeted" related failures. Here is
the failure information, just after the crash
info: Entering event queue @ 0. Starting simulation...
fatal: syscall set_tid_address (#256) unimplemented.
Hi Mitch,
Did you end up getting it working?
Thanks,
Ali
On Sep 26, 2012, at 3:39 PM, Steve Reinhardt wrote:
> That's a reasonable hardware implementation. Actually you need a register
> per hardware thread context, not just per core.
>
> Our software implementation is intended to model suc
Hi Stjin,
Thanks for tracking this down. It sounds like it's a hisenbug.
On Oct 11, 2012, at 9:27 AM, Stijn Eyerman wrote:
> Hi,
>
> I encountered a nasty bug in gem5 regarding misspeculated load_locked
> instructions. I have some conceptual solutions, but I would like to ask your
> commen
Hi Manu,
PARSEC requires pthreads and there isn't a user-mode scheduling in gem5. The
easiest path forward is to run PARSEC on top of linux which will have all these
sys calls implemented. You could also try to compile parsec with the m5threads
code, but PARSEC's use of pthreads might require s
Hi,
I have a patch that fixes this in classic and ruby. I was waiting for
another student (Dibakar, he runs a lot more parallel code than I do) to
test it out before submitting to the reviewboard. I'll bug him and see if
he's tested it out yet.
On Thu, Oct 11, 2012 at 7:32 PM, Ali Saidi wrote:
Hi All,
I am very new to computer architecture simulator and is looking into gem5.
I want to track the program counter under SE mode.
Although I can do that via debug options, I want to know where in the
source code this work actually gets done.
I am using the atomic simple cpu mode. I could not f
Hi Jacob,
You may refer to src/cpu/simple/base.cc for the PC movement. "preExecute(),
postExecute, advancePC()" can answer your question.
-Tao
From: gem5-users-boun...@gem5.org [mailto:gem5-users-boun...@gem5.org] On
Behalf Of Shen Yiran
Sent: Thursday, October 11, 2012 11:38 PM
To: gem
Hi all:
I have a question about gem5's memory system. In the cache and memory's port,
there are three kinds of functions: Atomoc, Timing and Functional. What is the
packets received by "recvFunctional"? I check the packet and find that the
contextID and threadID are all invalid. So I don't und
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