[gem5-users] Problem booting ARM VExpress_EMM

Hello, I tried booting the large-memory ARM platform and kernel with the latest gem5 dev source code. The boot process dies with a "cannot open root device" error. I used the unmodified arm-ubuntu-natty-headless.img disk image. Any suggestions? Thanks! My command line is; ./build/ARM/m5.opt

Re: [gem5-users] Problem booting ARM VExpress_EMM

Hi Dave, You need to remove the ide and ethernet devices from the VExpress_EMM config in src/dev/arm/RealView.py. Hopefully there will be instructions on how to compile a kernel with PCIe support soon that will make use of these devices. Thanks, Ali On 27.06.2012 10:21, David Roberts wro

[gem5-users] Correct RAS predictions detected as mispredicted

Hi all, I have found some bug related to the RAS in the branch predictor. It happens that some returns are predicted with the correct PC but not with the correct PCState structure. Then when the mispredicted status is checked (in src/cpu/base_dyn_inst.hh:505), these instructions are detected

Re: [gem5-users] Correct RAS predictions detected as mispredicted

Hi Nathanael, The issue with the change below is that the address could be correct, however the flag bits (e.g. thumb state) or the correct IT state could be wrong. Would it be possible for you to dig a little deeper and see what part of the the PCState objects are causing the mispredicts to h

Re: [gem5-users] ZeroReg problem

It turned out that in some bizarre cases a non-zero value was forwarded to instructions using a remapped zero register: everything is fine for thread 0 (as register 16 is considered the zeroReg throughout the simulator), but it crashes and burns when a different "zero register" is assigned to threa

Re: [gem5-users] compile Linux kernel for X86 FS (wael Amr)

Hi, I used linux-2.6.28.4.tar.bz2 but I assume the others are the same just for different compression programs. Diana > -- Forwarded message -- > From: wael Amr > To: gem5 users mailing list > Cc: > Date: Wed

Re: [gem5-users] ZeroReg problem

Hmm.. I think that must be happening when there is a mispredict and a return to architected state. If you don't run into problems with this fix over the next few days could you post a patch to the review board (reviews.gem5.org)? Thanks, Ali On 27.06.2012 11:20, Andrea Pellegrini wrote:

Re: [gem5-users] ZeroReg problem

Ali, that it is correct. I will keep track of these changes to post a review in a few days. Turns out that the TLB in X86 does not support SMT either, so I am working on fixing that too. -Andrea On Wed, Jun 27, 2012 at 11:26 AM, Ali Saidi wrote: > ** > > Hmm.. I think that must be happening wh

Re: [gem5-users] Correct RAS predictions detected as mispredicted

From what I have understand on the example I have worked on to detect the bug, the predicted address is computed depending on the flag of the Call for the thumb bit. But when the check is done, the tempPC is computed depending on flag of the Return. Thus, if the Call and the Return are not in t

Re: [gem5-users] Correct RAS predictions detected as mispredicted

Hi Nathanaël, So are you saying that everything is predicted correctly, however the check is truly wrong in this case? Thanks, Ali On 27.06.2012 12:03, Nathanaël Prémillieu wrote: > >From what I have understand on the example I have worked on to detect > the bug, the predicted address i

Re: [gem5-users] compile Linux kernel for X86 FS

wael Amr writes: > Hello, > Thanks a lot for your support. > When i typed the command : > git checkout v2.6.28.4 Did you actually do this just after the "git clone"? No commands in between? Lluis -- "And it's much the same thing with knowledge, for whenever you learn something new, the whol

Re: [gem5-users] Correct RAS predictions detected as mispredicted

Yes, the PC (the _pc in the PCState structure) are the same, but the check checks also if the NPC (the _npc int the PCState structure) are the same. And here this is not the case, hence the test detects it as mispredicted. Nathanaël Le 27/06/2012 19:30, Ali Saidi a écrit : Hi Nathanaël, So

Re: [gem5-users] compile Linux kernel for X86 FS (wael Amr)

Hi, Since the git didn't work well with me ,i downloaded linux-2.6.28.4.tar.bz2 then i followed these commands at :http://gem5.org/Linux_kernel and when i applied "make vmlinux -j 4" I got the same error message : # configuratio

Re: [gem5-users] compile Linux kernel for X86 FS

> > > Hi, > > Since the git didn't work well with me ,i downloaded linux-2.6.28.4.tar.bz2 > then > i followed these commands at :http://gem5.org/Linux_kernel > > and when i applied "make vmlinux -j 4" > I got the same error messag

Re: [gem5-users] forward invalidations to lsq

Hi Ali, from this thread, http://www.mail-archive.com/gem5-dev@gem5.org/msg00782.html, I get an idea that a snoop invalidate will make a younger load and its following younger instructions to re-execute, if only an older load in the program order to the same cache block see an updated value. Bu

Re: [gem5-users] forward invalidations to lsq

Hi Dibakar, I'm not saying that I believe this is correct for x86. It seems like x86 does require more ordering than is currently provided by the lsq. Hopefully someone with more x86 experience could chime in and confirm that. The faulting mechanism needs an overhaul in the o3 cpu. There shoul

[gem5-users] CLFLUSH support in X86?

Hi All, I've been trying to run the Oracle/Sun Java JRE in the X86 ISA model and so far the roadblock I'm hitting is a complaint from the java runtime that the the CLFLUSH instruction is missing. Parsing through the gem5 code it looks like that instruction has not been implemented. Has anyone got

Re: [gem5-users] CLFLUSH support in X86?

I have implemented some of the missing cache maintenance instructions for ARM (although I haven't released a patch), and this one is similar to those. You should be able to implement them by sending a packet to all caches with the address to be invalidated - if the line is dirty, write it back to m

Re: [gem5-users] CLFLUSH support in X86?

Also, as a side note, Java 6 and 7 from Oracle work just fine on the ARM model and I plan to release an image with the DaCapo benchmarks, rcS scripts, and a how-to guide for getting the JRE to work on the image (I can't release an image with the JRE already installed due to licensing issues). -Ton

Re: [gem5-users] compile Linux kernel for X86 FS

Hi, Really Great Thanks for this support. Before trying these steps,i have a question about step No.8 This step can be done also through modifying the file "Syspaths.py" except KeyError: path = [ '/dist/m5/system', '/home/wael/gem5/linux-2.6..28.4' ] instead of except KeyError: