[gem5-users] Re: Fatal when using ARM config file with walk cache

2021-10-19 Thread Nathanael Premillieu via gem5-users
Hi Giacomo, Thanks for your answer. Then, can I keep the two lines commented out for the moment? Should I expect negative impact from that? Thanks, Nathanael Premillieu -Original Message- From: Giacomo Travaglini [mailto:giacomo.travagl...@arm.com] Sent: Tuesday, October 19, 2021 4:09

[gem5-users] Re: Fatal when using ARM config file with walk cache

2021-10-19 Thread Giacomo Travaglini via gem5-users
Hi Nathanael, this is a know problem in develop that will be fixed in next release. It comes from the fact that we are using 4 table walkers (for S1I-TLB, S1D-TLB, S2I-TLB and S2D-TLB). I am currently working on: a) Implementing a VA indexed walk cache replacing current PWCs (.gem5 _walker_cac