[gem5-users] Re: Accelerator as PIO device writing back to main memory

2021-09-15 Thread diavastos--- via gem5-users
Giacomo, Answering your questions: 1. No, I build my own config file using the configs/example/apu_se.py as a baseline 2. I have several simple memory objects on the accelerator that connect directly on the membus that then connects to the memory controller. But I have no iobridge between those

[gem5-users] Re: Accelerator as PIO device writing back to main memory

2021-09-13 Thread Giacomo Travaglini via gem5-users
Hi Andreas, Could you provide us more information about the platform you are using? More specifically 1) Are you using any configs/example/arm based script? 2) Which bus is connected to the device DMA port? You need a cache between the device and the coherent bus. This is why we usually instant