Re: [gem5-users] Big executed instruction difference between X86 atomic adn X86 O3

y, different > sequences of committed instructions from atomic and o3 are fine, as long as > the numbers are not completely out of line. > > > > > On Thu, Aug 28, 2014 at 5:49 AM, Zi Yan via gem5-users > wrote: > >> Hi Andreas, >> >> I already fl

Re: [gem5-users] Big executed instruction difference between X86 atomic adn X86 O3

ences of committed instructions from atomic and o3 are fine, as long as > the numbers are not completely out of line. > > > > > On Thu, Aug 28, 2014 at 5:49 AM, Zi Yan via gem5-users > wrote: > >> Hi Andreas, >> >> I already flag "MicroHalt" as "

Re: [gem5-users] Big executed instruction difference between X86 atomic adn X86 O3

28 Aug 2014, at 3:39, Andreas Hansson wrote: > Hi Yan, > > Check out: http://reviews.gem5.org/r/2369/ > > Perhaps the problem you are struggling with is even more complex, but at > least the patches on the review board should fix up a few issues. > > Andreas > >

Re: [gem5-users] Big executed instruction difference between X86 atomic adn X86 O3

that suspends() the CPU as a "quiesce". >> This >>> is required by o3 to properly operate, but not by the Atomic CPU. This >>> makes the issue in #1 far more likely to occur. It's pretty amazing that >>> x86 booted linux at all on o3 without this. I

Re: [gem5-users] Big executed instruction difference between X86 atomic adn X86 O3

e in #1 far more likely to occur. It's pretty amazing that > x86 booted linux at all on o3 without this. I believe this patch will be > posted shortly, but otherwise you could just tag the "MicroHalt" > instruction as "IsQuiesce" yourself. > > So a combinat

Re: [gem5-users] Big executed instruction difference between X86 atomic adn X86 O3

; I would suspect this is due to a bug in the X86 O3 CPU. There have been > quite a few fixes posted on the review board for similar issues. I hope to > have these committed in the next week or so. > > Andreas > > > On 27/08/2014 18:02, "Zi Yan via gem5-users" wrote: &g

[gem5-users] Big executed instruction difference between X86 atomic adn X86 O3

Hi all, I am running kmeans via hadoop in gem5 X86 FS mode. I am using linux kernel 3.2.60 with configuration file linux-2.6.28.4 from gem5.org. I take a checkpoint before a map task and put a "m5 exit" after the map task. I am using *X86kvmCPU* to take checkpoints. When I restore from the sam

[gem5-users] new m5 ops, and how to use them

Hi all, I am looking at util/m5/m5op.h file. I see a lot of new m5ops but without documentation in wiki, like arm, rpns, m5_work_begin, m5_work_end, and m5a_*. I just wonder what are those used for? Thanks. -- Best Regards Yan Zi signature.asc Description: OpenPGP digital signature

Re: [gem5-users] An very easy problem about running MEVbench on X86

Hi Tang, Did you use the config file from: http://www.m5sim.org/dist/current/x86/config-x86.tar.bz2 I am able to compile a 3.2.60 kernel and run it. But when I tried 3.12.21, the kernel stuck at loading init process. -- Best Regards Yan Zi On 8 Aug 2014, at 18:13, Dongjie Tang via gem5-users w

Re: [gem5-users] Compile Linux kernel v3 for gem5 FS

How about DTB(device tree blob) file? Do we need a DTB file for kernel running on gem5-ARM? Thanks. -- Best Regards Yan Zi On 22 Jul 2014, at 14:29, Anthony Gutierrez via gem5-users wrote: > For ARM you definitely can. Use the patch and kernel config contained here: > > http://www.gem5.org/dist

Re: [gem5-users] Reading wrong data from Cache

Have you seen any other addresses written belong to the same block as address A? And you should enable Cache debug flag as well. That can tell you more about cache behavior. Are you running single core or multi-core system? Another core may also write to address A. -- Best Regards, Yan Zi