Hi Nilay,
Thanks for your reply. But the files that I mentioned are at this state at
the end of the simulation, the simulation was not still ongoing at the time
I did tail.
Thanks,
Pritha
On Thu, Jul 5, 2012 at 12:31 PM, Nilay wrote:
> On Thu, July 5, 2012 11:06 am, Pritha Ghoshal wr
Hi,
I am trying to generate a packet trace file from within GEM5. Every time a
packet is transmitted, I am writing the information into a file and also
printing to the screen. I used printf and fprintf for these as I wanted to
use gem5.fast which does not support DPRINTF. But I face some issues wi
Hi,
I am using dumpresetstats in my .rcS script, but I have a doubt in that.
The definitions are as follows:
- resetstats [*delay* [*period*]]: Reset simulation statistics in
*delay* ticks;
repeat this every *period* ticks.
- dumpstats [*delay* [*period*]]: Save simulation statistics to
the error somehow linked to the code?
Thanks,
Pritha
On Fri, Jun 22, 2012 at 11:18 AM, Pritha Ghoshal wrote:
> Hi Ali,
>
> I think the problem is somewhere in the compiler.. I removed a printf
> statement from a location and rebuilt the kernel, that particular error
> seemed to
e of the value back as far as possible using a combination of what
> you've done and the exec debug flag. If the value was stored and later read
> and isn't the same, something has likely gone wrong with gem5.
> Unfortunately, it's also possible there is a bug with the compiler or
&
made sure I went through all the parts of the code till before the
strcmp call to check if a0 is loaded.. Do you have any suggestion about
what I can do next?
Thanks,
Pritha
On Tue, Jun 19, 2012 at 7:03 PM, Pritha Ghoshal wrote:
> I was able to use 1 core with the remote gdb.. With the 4 co
the inbound port or dram port
> that has an explicit check on that address in the packet (cache block
> aligned). Every time it sees a read or write you should print out the fact
> that the write happened and at some point hopefully you'll find the bad
> piece of data.
>
>
>
On 19.06.2012 13:06, Pritha Ghoshal wrote:
>
> Hi,
> I am getting a kernel panic which I am not able to debug. The pc itself is
> getting polluted.. I have added the trace of the panic at the end of the
> email.
> This is a snippet from the object dump of the kernel code.
> ff
Hi,
I am getting a kernel panic which I am not able to debug. The pc itself is
getting polluted.. I have added the trace of the panic at the end of the
email.
This is a snippet from the object dump of the kernel code.
fc5d51e8: 00 00 69 a7 ldq t12,0(s0)
fc5d51ec:
Hi,
I am trying to use remote gdb for debugging some kernel panics, but I have
some issues. The ports are as follows :
0: system.remote_gdb.listener: listening for remote gdb #0 on port 7000
0: system.remote_gdb.listener: listening for remote gdb #1 on port 7001
0: system.remote_gdb.listener: list
xit_count),
> but you'd need to modify the kernel.
>
> Ali
>
>
>
> On Jun 16, 2012, at 1:55 PM, Pritha Ghoshal wrote:
>
> Hi,
>
> I am running a network trace of packets through gem5 and want to terminate
> it once the trace is over.. There are two netwo
Hi,
I am running a network trace of packets through gem5 and want to terminate
it once the trace is over.. There are two network interfaces, and the
kernel routes the packet from one interface to the other.. The simulation
should terminate only when the last packet has been transmitted from the
ou
to backtrace. Do you know of
any way I could make the simulation stop once 1 of the cpu-s get a panic?
Thanks
Pritha
- Original Message -
From: "Pritha Ghoshal"
To: sa...@umich.edu, "gem5 users mailing list"
Sent: Tuesday, May 15, 2012 1:05:40 PM
Subject: Re: [gem5
ugh the code to see where the address is being
generated. Once you track how it's computed, you can see where it is loaded
from and then go looking for who wrote that last and why it was wrong.
Ali
On 15.05.2012 01:08, Pritha Ghoshal wrote:
Hi,
I am trying to use two e1000 driver
Hi,
I am trying to use two e1000 drivers to simulate an incoming port and an
outgoing port. I have the iptables setup in between to regulate traffic and let
only some packets proceed to the outgoing port. I have modified the networking
part of the kernel as follows:
1. I added a virtual devic
the cost of significantly increasing
> simulation time.
>
> In either case, you may want to try just cranking up the CPU frequency.
>
> Steve
>
>
> On Mon, Apr 23, 2012 at 2:42 PM, Pritha Ghoshal wrote:
>
>> I am modelling an Alpha CPU, timing mode, with the default
23, 2012 at 12:52 PM, Pritha Ghoshal wrote:
>
>> Hi,
>>
>> I am working with the i8254xgbe driver. I am trying to run a network
>> trace file which has maximum bandwidth of 10Gbps through this NIC(average
>> BW seems to be around 3-4Gbps). I am calling the receive f
Hi,
I am working with the i8254xgbe driver. I am trying to run a network trace
file which has maximum bandwidth of 10Gbps through this NIC(average BW
seems to be around 3-4Gbps). I am calling the receive function of eth0 the
trace and rerouting it back through eth1. But I am seeing a lot of packet
Hi,
The Bus.py file shows the width as
width = Param.Int(64, "bus width (bytes)")
and the default clock frequency as
clock = Param.Clock("1GHz", "bus clock speed")
which means the bus can actually transfer 64GB/s or 512Gb/s, is that
right? I just wanted to confirm my understanding as the
Hi,
I am trying to find out the logged messages in the Gem5 kernel. I have
installed iptables in the linux kernel and have a default rule which should
log all the packets.
iptables -A FORWARD -s 0/0 -i eth0 -d 0/0 -o eth1 -j LOG
But I am not able to figure out where the packets are getting logged
Hi,
I need to setup a static MAC address into the /proc/net/arp file, as I want
the linux kernel to simulate sending a packet on a standalone test system.
The arp command does not work on the kernel, has anyone tried setting it up
statically?
I know the benchmarks NetperfStream etc would need to
Hi Anirudh,
Have you tried checking the m5out directory? The stats.txt file is
generated there as well as a log of the terminal output if you ran it in FS
mode.
Pritha
On Wed, Mar 28, 2012 at 12:52 PM, Anirudh Sivaraman wrote:
> So I got this fixed, it wasn't finding FSConfig.py since it wasn't
Hi Anirudh,
What kind of network system are you trying to simulate? GEM5 by default has
ethernet support built it for having a full system processor along with
networking support. The code is present in /src/dev.
Pritha
On Mon, Mar 26, 2012 at 11:49 AM, Anirudh Sivaraman wrote:
> Has anyone loo
Hi,
I am trying to compile a module for GEM5 for kernel 2.6.27. I am facing
problems due to missing file
include/asm/linkage.h
I realised that the asm-alpha directory is not present any more in the
include directory(kernel version 2.6.27) though it was present in 2.6.18. I
guess support for alpha
Hi Sudhanshu,
I had faced this issue a few days back, you can check this link:
http://www.mail-archive.com/gem5-users@gem5.org/msg02613.html
Pritha
On Tue, Mar 6, 2012 at 12:04 PM, Sudhanshu Jha wrote:
> Hello,
>
> I was testing the inorderCPU for Alpha Core (with the new code
> gem5-stable-54
to see
what is leading to that..
Pritha
On Mon, Mar 5, 2012 at 2:48 AM, Korey Sewell wrote:
> Pritha,
> There should be a "UpdatePredictor" command that needs to be in there. In
> the clean tree, should be around line 548 in cpu.cc
>
>
> On Sat, Mar 3, 2012 at 11:28 AM
Hi Robin,
You need to modify cpu.cc file functions createFrontEndSked and
createBackEndSked according to the guidelines in pipeline_traits.9stage.ccfile.
You can get a draft of my functions from one previous mail on this thread..
But that is not completely correct.
Pritha
On Sun, Mar 4, 2012 at
Oh, I might have to modify the pred_history portion as well? In my case sn3
was a branch and this squash is happening for sn7.. sn3 had apparently
finished committing.. Should it have cleared the pred_hist.front() at that
time?
My BackEndStartStage value is 3.
FrontEndSked function:
StageSche
Hi Robin,
How did you modify your files for running 9 stage pipeline? The
pipeline_traits.hh has a variable BackEndStartStage which should be changed
to 3, it is 2 in the 5 stage case..
The pipeline_traits.9stage.cc file has to be used to modify cpu.cc file
accordingly to support 9 stages.
Which
I tried your code, with pred_hist.front().SeqNum <= squashed_sn, because
the last predicted instruction in my case was before the squashed
instruction.. But I think the other way might also be possible, where there
is another prediction made after the squashing instruction. Should the
assert be rem
%i\n",
pred_hist.front().seqNum, squashed_sn);
assert(pred_hist.front().seqNum == squashed_sn);
}
Is this piece of code necessary for generic Squashes?
Pritha
On Thu, Mar 1, 2012 at 11:36 AM, Pritha Ghoshal wrote:
> Hmmm, this seems to sound really stupid, but I was ab
the code?
>
>
> On Thu, Mar 1, 2012 at 11:40 AM, Pritha Ghoshal wrote:
>
>> The TLB line is actually commented out, I forgot to delete it while
>> pasting it..
>>
>> About the slots, I can see the slot is getting dellocated from the sn:7
>> request in the ne
he unit has a "getSlot" function that you can go into
> and insert some debug messages to see why exactly it is returning that
> there is no slot available. I think either the tlb is never getting
> unblocked or the slots aren't getting deallocated after the
> 'CompleteR
function in a particular
> resource to trace the program flow. In each pipeline stage, a instruction
> will find a resource that it wants to access and request that resource.
> That requests translates into a "execute()" call into that particular
> resources code.
>
>
&
Hi,
I am trying to Inorder 9 stage pipeline and it is stalling after the first
few cycles.. This is the culprit as far as I managed to dig in by turning
on traces..
The following snippets of the trace are from the same tick, one after
another.. Initially it is trying to send a request to Dcache,
Hi,
I was trying to run Inorder mode for FS Alpha simulation. It stopped in the
Palcode itself with a M5 panic instruction call. After digging in, I
realized it was due to a hw_rei branch not getting taken and panic
instructions staring to execute..
In changeset 8398 Korey Sewell had made the hw_
Hi,
I have a confusion in the writeback section for the transmission
descriptors.
According to the IGBE_e1000 documentation, the TX Descriptor should be
written back in 3 cases :
1. If Wthresh = 0,
2. If Used size > Wthresh . This has 2 levels of granularity:
a) Cache line (Gran = 0)
b) Desc
Hi Ali,
Probably I had some problem in the gem5 repository I had, i got it working
now, thanks..
Pritha
On Wed, Feb 22, 2012 at 10:09 AM, Pritha Ghoshal wrote:
> Hi Ali,
>
> Did you get an error which applying the patch:
> patch failed, unable to continue (try -v)
> patch faile
bytes bytes secs.10^6bits/sec
>
> 500 500 5001.05 38.23
>
>
> Ali
>
>
>
> On Feb 21, 2012, at 2:25 PM, Pritha Ghoshal wrote:
>
> Hi Ali,
>
> So I compiled the linux kernel again, but the problem still appears. I
> tried disassemb
, which is defined
in drivers/net/e1000/e1000_main.c. I am not sure, would it be possible for
you to send this particular file from your linux kernel and I can try
building with that to see if it works?
Pritha
On Mon, Feb 20, 2012 at 9:59 PM, Pritha Ghoshal wrote:
> Hi Ali,
>
> I'l
Hi Sudhanshu,
You should be able to find this file in your directory after you add all
the patches from the linux-patch repository.
Pritha
On Mon, Feb 20, 2012 at 1:40 PM, Sudhanshu Jha wrote:
> Hello,
>
> I am trying to compile a new linux kernel for 64 core support for alpha
> machine.
> I a
ernel/v2.6/longterm/v2.6.27/linux-2.6.27.61.tar.bz2
>
> You'd probably need to turn that into a mercurial repository by creating a
> new repo and committing all the code and the apply the patch queue on top
> of that.
>
> Ali
>
> On Feb 20, 2012, at 6:59 PM, Pritha Ghoshal wr
Hi Sudhanshu,
I am trying to compile a linux kernel as well, but I am not able to get the
first step runnning, the hg clone of the linux-kernel repo. Were you able
to clone without any error?
Thanks
Pritha
On Mon, Feb 20, 2012 at 1:40 PM, Sudhanshu Jha wrote:
> Hello,
>
> I am trying to compil
27;t know. The kernel I tried was 2.6.27.6 and is a the
> mercurial repository of the linux kernel with the following patch queue
> applied: http://repo.m5sim.org/linux-patches There is nothing in there
> that touches the e1000 driver anymore.
>
> Ali
>
> On Feb 20, 2012
gt; On Feb 18, 2012, at 9:28 PM, Pritha Ghoshal wrote:
>
> Hi Ali,
>
> So I think this is the relevant trace:
> 51061923500: drivesys.cpu + A0 T0 : @e1000_probe+1412: ldq
> r16,144(r30): MemRead : D=0xfc000722b930 A=0xfc0007033c78
> 51061927500: drivesys.cpu + A0 T0
le set which calls the full system mode or
> >the Syscall Emulation mode.
>
> What is that then? How can I run simulation in X86_SE?
>
> On 2/18/12, Pritha Ghoshal wrote:
> > Hi Mehmood,
> >
> > You have to just run this command:
> > scons build/X86/m5.debug
though, so I'm pretty confused why I don't see the
> problem and you do.
>
> Ali
>
> On Feb 16, 2012, at 4:57 PM, Pritha Ghoshal wrote:
>
> >
> >> Hi Pritha,
> >> I took a old kernel from when i published the original paper in 2009
> (2.6.27)
&g
Hi Mehmood,
You have to just run this command:
scons build/X86/m5.debug
The FS and SE modes have become run time usages rather than build time.
Therefore the binary stays the same for both of them, whereas in the fs.py
file or se.py file there is a variable set which calls the full system mode
or
> Hi Pritha,
> I took a old kernel from when i published the original paper in 2009 (2.6.27)
and it seems to work with the e1000 NIC if I just make the following change:
> diff -r ef8630054b5e configs/common/FSConfig.py---
a/configs/common/FSConfig.pyTue Feb 14 14:15:30 2012 -0500+++
b/con
>
> Hi Pritha,
> I don't know why you're seeing that error, if you just use IGbE_e1000() I
think it should work. That said, all of the upheaval in the memory system over
the last few weeks might have broken something. The first trick is to
understand
where this request is coming from and how
>
> On 13.02.2012 13:08, Pritha Ghoshal wrote:
>
> Hi,
>
> I am trying to run NetperfStream benchmark using the Intel 8257x ethernet
adapter. I modified the Fsconfig.py file as follows:
>
> #ethernet = NSGigE(pci_bus=0, pci_dev=1, pci_func=0)
> etherne
Hi,
I am trying to run NetperfStream benchmark using the Intel 8257x ethernet
adapter. I modified the Fsconfig.py file as follows:
#ethernet = NSGigE(pci_bus=0, pci_dev=1, pci_func=0)
ethernet = IGbE_igb(pci_bus=0, pci_dev=1, pci_func=0)
I am using kernel version 2.6.27.
But my d
Hi,
I am trying to run parsec benchmarks on ruby, and I am initially running
the version of the executable which will create a checkpoint, and then
trying to restore the checkpoint. But I am getting an error saying Physical
memory sizes do not match. Am I missing something? Do I need to modify
any
I can modify in the slicc file where the request message is being generated
- putting the actual size instead of MessageSizeType:Control, but I am not
sure if it will affect anything else?
___
gem5-users mailing list
gem5-users@gem5.org
http://m5sim.org/c
Hi,
I am trying to figure out the percentage of false misses in parsec traces,
and for this I need to know which physical address exactly is accessed for
a request coming from the network, and also the size of the data request.
The requests from the the core to L1 cache have the size of the data
r
Pritha Ghoshal tamu.edu> writes:
> >
>
> Hi Nilay,
>
> Thanks for the patch, I have downloaded it and am checking.
>
> I have one doubt, the cache miss numbers being reported are for all the cores
> together. There seems to be only one variable which gets up
Nilay Vaish cs.wisc.edu> writes:
>
> On Wed, 2 Nov 2011, Pritha Ghoshal wrote:
>
> > Hi,
> >
> > I am trying to use Ruby in GEM5 - Cache protocol MESI_CMP_directory. I see
that
> > the number of misses etc reported in the ruby.stats file is all zeroes :
&
Hi,
I am trying to use Ruby in GEM5 - Cache protocol MESI_CMP_directory. I see that
the number of misses etc reported in the ruby.stats file is all zeroes :
Cache Stats: system.l2_cntrl0.L2cacheMemory
system.l2_cntrl0.L2cacheMemory_total_misses: 0
system.l2_cntrl0.L2cacheMemory_total_demand
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