Hi,
You should establish a link between your cache and the ISA. It shouldn't be
hard to hack things around.
A cleaner solution would involve using probe points. You could use a probe
listener per ISA object. For every alocation update on the l2 cache, the
listeners will be awakened and the sysr
I am a beginner who has just started to learn Gem5. Recently, I attempted to
use the msr instruction to read out the currently allocated entries in L2cache
(variable "int allocated" in gem5 stable \ src \ mem \ cache \ queue.hh). I
have added a new system register for this purpose (by modifying
