Hey James,
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Perhaps I am very wrong in my assumptions here, but is there any difference in
your idea between a "multiprocessor" setup and a multicore setup? In the gem5
stdlib design each board has one processor, but each processor can have as many
CPUs/Cores as you desire. I don't know the in
Hi Arteen,
If you are not tied to the MESI_three_level protocol, then, as Gautam said, you
might want to switch to a different protocol that already supports the shared
state in the system level cache. CHI is the most advanced and configurable
protocol in that respect but others might do as wel
