Hello Jason:
I further debugged and found that the error was reported because of the action(
u_writeDataToCache;) in this transition;
transition({IM_F}, Data_Exclusive, M_F) {
u_writeDataToCache;
s_deallocateTBE;
o_popIncomingResponseQueue;
kd_wakeUpDependents;
}
transitio
Hello, Jason
Thanks for your help.
I have created a checkpoint in SE mode to test the MESI_Three_Level protocol
that I added flush, but an error was reported, the following is the transition
information I printed with debug-flags=ProtocolTrace
info: Entering event queue @ 54777500. Starting s
Hi Davide,
I echo 100% of what Giacomo said. Also, there's a proposal for updating the
Python API here: https://gem5.atlassian.net/browse/GEM5-432. That proposal
is a pretty extreme example, and we'll probably end up with something
closer to the status quo.
You can also check out Learning gem5 to
Hi Yifan,
To use the MMIO version of the m5 utility, you simply need to pass the
--addr parameter (if I remember correctly). Running `m5 --help` should
explain the options.
Cheers,
Jason
On Thu, Oct 8, 2020 at 4:14 AM wrote:
> Hi Jason,
>
> Thank you for your quick reply. I'll check out the la
Davide,
You are 100% right in your distinction between example platforms (forkable) and
generic scripts; and that no-one should ever fork from fs.py; and that such
script, if we still want to maintain it, shouldn't be in the example directory.
The "simple example script to replicate to match yo
Hi Giacomo,
Thanks for your reply, I'll take a closer look at fs_bigLITTLE.py.
I guess the question here for the gem5 maintainers is whether gem5 users are
expected to hack their own simulation script even for "simple" cases or if
there should be default scripts that don't have this kind of i
Hi Davide,
This is annoying indeed. The main problem IMHO is that you shouldn't be using
Options.py in the first place (this is why I am not personally using swiss army
knife scripts like fs.py).
I suggest you to have a look at fs_bigLITTLE.py and use that as a reference for
a main/top level py
Hi gem5 users,
I am working with my team to set up a CPU model and I am having some trouble
making sense of how the core settings are handled.
The core configurations (for example, o3_arm_v7a.py [1]) allow (require?)
specifying parameters for the various components (for example, size,
associ
