Hi all,
I am using kvm to fast forward and make a checkpoint. My gem5 version is
https://github.com/darchr/gem5/tree/jason/kvm-testing-again
and I use configs/myconfigs/runkvm.py to run my simulation in FS mode with
custom disk-image and vmlinux-4.8.19 kernel. Here is my command line:
build/X8
To see how to integrate with gem5's systemc kernel, look at the examples
in util/systemc/systemc_within_gem5/ (not a great place for examples, I
know). To use TLM, you can take a look at the TLM/gem5 bridge
in src/systemc/tlm_bridge/. That's not intended as an example, but it's
relatively simple an
Hey Maxime,
As far as I can tell, this is not expected behavior and may be a bug. To
properly log this, and recreate it, could I bother you for a few more
pieces of information?:
- What version of gem5 are you using?
- What OS are you using and what compiler did you compile with (probably
not re
We have a SystemC interface in gem5. I'm afraid to say it's not very well
documented but that's what you'd want to use.
Please feel free to get back to us with specific usage questions.
--
Dr. Bobby R. Bruce
Room 2235,
Kemper Hall, UC Davis
Davis,
CA, 95616
web: https://www.bobbybruce.net
On
Hi all,
Running an ARM cpu based system in Full System mode, I want to reset stats
during simulation using M5Ops " m5 reset_stats".
While almost all stat counters are resetted, some seem to keep there previous
values. Among them, all system.cpu.dcache stats.
Is this behavior expected? And if it
Hi all,
I'm working at a gpu company and we have our gpu modelling. We were using qemu
based platform to test our models but we wish to start to use gem5. In our
platform we can integrate our model using tlm (systemc) or a custom interface
developed based on qemu interface.
So, what is the co
Thanks Jason,
Could you explain what other things should be considered for FLUSH if
invalidate and write-back is not enough? Or is it fine modifying the CPU
sequencer that it just ignores the FLUSH request?
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Hi Daecheol,
The complication comes from handling all of the corner cases. What happens
if you get a flush for a line when you've sent a request but haven't
received a response? What about when you've received an invalidation, but
you haven't responded yet? There are many intermediate states that
