Re: [gem5-users] Issue Defining new Ruby Topology/ On-chip versus Off-chip

Hi Malek, The "int" links just mean links internal to the network, and "ext" links just mean links connecting the network to the external world, i.e. the cache/directory controllers. They have nothing to do with on-chip vs off-chip. The L2 being shared or private depends on the coherence protoco

Re: [gem5-users] Out of range means pio port?

Tony Feng gmail.com> writes: > > > Hi, > > In M5Port::recvFunctional of RubyPort.cc, if the isPhysMemAddress test fails, does it necessarily mean it is a packet sent to a pio port? > > I added some debugging info, found the packet has an invalid source id, and a destination address of 0x800

Re: [gem5-users] Issue Defining new Ruby Topology/ On-chip versus Off-chip

Hi Tushar, I am looking for clarification between configuring caches to be on-chip versus off-chip in GEM5. It seems to me that each router represents a single chip, So in connecting multiple L1 caches to a shared L2 via "ext_link" correlate to all of them being on-chip, and then this chip/router

[gem5-users] Out of range means pio port?

Hi, In M5Port::recvFunctional of RubyPort.cc, if the isPhysMemAddress test fails, does it necessarily mean it is a packet sent to a pio port? I added some debugging info, found the packet has an invalid source id, and a destination address of 0x8000, whereas I believe the system port range is

[gem5-users] Problem with using lmbench in simulated console

Hello. I'm using lmbench to measure the performance of simulated console. How can I open result text file of lmbench? The text file was made in lmbench/results directory, but vi and vim were not available in simulated console. Also, this result file doesn't exist in the x86root.img which includ