On Thu, 2008-10-09 at 17:14 -0700, Ben Jackson wrote:
> On Fri, Oct 10, 2008 at 12:41:26AM +0100, Peter Clifton wrote:
> >
> > Ben, as you know the Polygon code better than most, I'd appreciate your
> > review of those patches if you get chance.
>
> I do mean to try them, I've just been a little
On Fri, Oct 10, 2008 at 12:41:26AM +0100, Peter Clifton wrote:
>
> Ben, as you know the Polygon code better than most, I'd appreciate your
> review of those patches if you get chance.
I do mean to try them, I've just been a little busy.
> Is there any reason why the existing code picked out and
On Wed, 2008-10-08 at 16:31 +0100, Peter Clifton wrote:
> > Here is a patch "fixing" IsPointInBox. I've not tested it extensively
> > (with a radius parameter passed).
>
> And here's a fix to allow arbitrary polygons.
Ben, as you know the Polygon code better than most, I'd appreciate your
review
On Wed, 2008-10-08 at 15:56 +0100, Peter Clifton wrote:
> On Tue, 2008-10-07 at 23:46 -0700, Ben Jackson wrote:
> > On Wed, Oct 08, 2008 at 07:56:27AM +0200, Bert Timmerman wrote:
>
> > From my quick test it seems to be due to 'IsPointInBox' having wholly
> > unexpected behavior due to a rather bi
On Tue, 2008-10-07 at 23:46 -0700, Ben Jackson wrote:
> On Wed, Oct 08, 2008 at 07:56:27AM +0200, Bert Timmerman wrote:
> From my quick test it seems to be due to 'IsPointInBox' having wholly
> unexpected behavior due to a rather bizzare implementation. It turns
> the 'box' it gets as input into
On Wed, 2008-10-08 at 14:54 +0100, Peter Clifton wrote:
> It also, rather horridly, doesn't appear to initialise the new pad
> structure it makes. I've encountered platform differences before now as
> to whether such memory ends up as 0, or random data:
[snip]
> That leaves flags unknown (could
On Tue, 2008-10-07 at 23:46 -0700, Ben Jackson wrote:
> On Wed, Oct 08, 2008 at 07:56:27AM +0200, Bert Timmerman wrote:
> >
> > I notice that both rat lines on the pads with circles (in C600 and C601)
> > have the "via" flag set.
> >
> > I wonder, what could have triggered this ?
>
> It's suppos
Am Dienstag, den 07.10.2008, 23:46 -0700 schrieb Ben Jackson:
> If you
> replace the rectangle in that b2.pcb someone sent out with a new one
> that's taller than wide, it works fine.
>
Great!
Really seems to work for rectangles taller than wide!
In this case all seems to be OK, if I place compo
Am Mittwoch, den 08.10.2008, 08:06 +0200 schrieb Bert Timmerman:
>
> The pads of the components (probably) live on an undefined layer on the
> component side of the board so the only way to connect to an inner layer
> is by via-in-pad ! without traces.
>
Thanks for your reply.
You are referei
On Wed, Oct 08, 2008 at 07:56:27AM +0200, Bert Timmerman wrote:
>
> I notice that both rat lines on the pads with circles (in C600 and C601)
> have the "via" flag set.
>
> I wonder, what could have triggered this ?
It's supposed to happen when you're over a rectangle in the target net.
I added t
On Wed, 2008-10-08 at 07:56 +0200, Bert Timmerman wrote:
> Hi Stefan,
>
> FWIW,
>
> I notice that both rat lines on the pads with circles (in C600 and C601)
> have the "via" flag set.
>
> I wonder, what could have triggered this ?
>
> Is it that the layer named "component" is not defined to be
Hi Stefan,
FWIW,
I notice that both rat lines on the pads with circles (in C600 and C601)
have the "via" flag set.
I wonder, what could have triggered this ?
Is it that the layer named "component" is not defined to be on the
component side (04) of the board, but is defined as an inner layer
(02
Am Dienstag, den 07.10.2008, 23:58 +0200 schrieb Stefan Salewski:
>
> Done -- same bug.
>
And it's the same with Thru hole footprints -- tested with CONN600 of
b2.pcb.
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Am Dienstag, den 07.10.2008, 18:34 +0200 schrieb Stefan Salewski:
> I will myself make a test with a
> layout created from scratch.
>
Done -- same bug.
I used a other, simple schematic used gsch2pcb to generate initial
board, opened board with pcb, imported netlist, dispersed elements, draw
a
Hi Stefan,
FWIW, I do not understand these circles myself either, but I do notice
that if you connect them on the "GND" layer they seem to connect, and
that these circles do not connect on "solder" or "component" layers.
Maybe these circles "know" that an intermediate layer and via is
required ?
> I'd be interested to see this test-case too. I'm sure I've hit similar
> problems.
I've reproduced Stefan's problem, with his board, with the latest pcb.
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On Tue, 2008-10-07 at 18:34 +0200, Stefan Salewski wrote:
> Am Montag, den 06.10.2008, 10:55 -0700 schrieb Ben Jackson:
> >
> > Is it possible you optimized the ratlist while they were over a polygon
> > and then moved them? The ratlist never reevaluates due to dragging a part.
> > For normal rat
Am Montag, den 06.10.2008, 10:55 -0700 schrieb Ben Jackson:
>
> Is it possible you optimized the ratlist while they were over a polygon
> and then moved them? The ratlist never reevaluates due to dragging a part.
> For normal rats this just means less optimal lines running around, but if
> you ha
On Mon, Oct 06, 2008 at 07:05:47PM +0200, Stefan Salewski wrote:
> I have seen these circles indicating a connection to a plane in DJ's
> tutorial for the first time. Now I get these myself. I do not understand
> it really, and I do not want it, because there in no plane.
Is it possible you optimi
Am Montag, den 06.10.2008, 19:05 +0200 schrieb Stefan Salewski:
>howto get plain rats lines instead of circles
I think it is a bug.
On left and right side of FPGA/Planes all works as expected, on top and
below not. Maybe an error in y coordinate (vertically).
I have deleted all planes -- now I
I have seen these circles indicating a connection to a plane in DJ's
tutorial for the first time. Now I get these myself. I do not understand
it really, and I do not want it, because there in no plane. Capacitors
below FPGA have circles, capacitors on the right not. I have to move
capacitors below
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