Larry Doolittle wrote:
> I have done that, too, but only rarely. It's a royal PITA.
> Do those guys *cough*Marvell*cough* want us to use their parts,
> or not?
The real problem occurs when a device with the functionality you need is
made *only* by the "shithead" companies like Broadcom, Marvell
On 02/17/2011 08:33 PM, yamazakir2 wrote:
> I have never done this before, but I want to fab some customized boxes
> for some pcbs I'll be making in the future. I want custom dimensions
> and custom cutouts and custom mounting posts for the pcb.
I have used the services of Vinatech Engineering Inc
al davis wrote:
> Just because Eudora on Windows can't cope with it?
Who said Eudora? Who said Windows? I use neither.
I read all my mail raw exactly as it comes across the wire, without
using *any* MUA that does any decoding behind my back. I have a little
program I wrote myself that decode
al davis wrote:
> Base64 is a published standard that should be
> universally supported.
... by way of standard open source mailing list managers detecting and
automatically rejecting posts encoded in base64.
Sorry, couldn't resist.
MS
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Stephan Boettcher wrote:
> We had that: M4 footprints. I never liked those, I could not figure out
> how to use them.
But I love them!
MS
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John Doty wrote:
> but "pcb" is apparently almost completely =
> dependent on gnetlist.
No, it isn't. PCB defines its netlist input format; the schematic
capture folks like gEDA then adapt to it, in gEDA's case by way of a
gnetlist back-end.
My OSDCU board through which the characters of this
Hello fellow free EDA users,
I wonder, would there happen to be anyone on this list who has a working
flash chip programmer setup and who would be willing to help out a
fellow Open Source Hardware maker, for some monetary compensation for
your time and effort?
I need to have some 29F040 type flas
> Are there any fab shops that would be gentle with a very new, very
> inexperienced PCB designer? OH and reasonable for a prototype. Last time
> I laid up a board I used a drafting table and mylar. I may need a bit of
> handholding as I go along.
I had my OSDCU board fabbed at Sierra Circuits (pr
Mark Rages wrote:
> If I can't get this working in the next few days, I'll probably be
> buying a license for Altium and a Windows computer. The thought
> depresses me.
If you are already prepared to spend $$$ on Altium and Weendoze
licenses, why not instead offer that same money to someone who
Hello again,
I have figured out the answers to some of my questions regarding DC on
xDSL by talking to a support engineer at Midcom, one of the vendors for
the custom transformer parts used for xDSL. (Trying to get support from
the SDSL transceiver chip vendor would have been hopeless as it's
Min
Hello fellow gEDA users,
I have a telecom electronics design question - are there any folks here
who have done telecom stuff?
My question deals with DC power feeding on data-carrying copper loops:
ISDN, [S]HDSL, etc. The typical circuit found in equipment interfacing
to such lines (either at the
Craig Niederberger wrote:
> So if you could get disabling language support in
> configuration to work, that would probably help others.
I second that request! Whenever I have to build any GNU software that
uses those darned configure scripts, I always specify --disable-nls for
ideological reaso
DJ Delorie wrote:
> I've been writing in C++ on Unix for, oh, twenty years now. How
> ancient is your Unix?
Well, different components have different ages (as in time since the
last modification), but the system's C compiler (which is the part that
matters in this case) is PCC for VAX, principa
DJ Delorie wrote:
> Try this... it might need additions to support full schematics, and
> it's not as pretty as libgeda would produce...
No longer of use to me as I've already made the one-way transition to
uschem, but perhaps someone else will find it useful...
> http://www.gedasymbols.org/use
John Doty wrote:
> But are you talking about genuine, essential capabilities, or just
> sugar? An example from the coding world is the ability to single step
> through code you're debugging. That's pure sugar: you don't need it,
> it is a monumental waste of time, and the coders who are add
Bill Gatliff wrote:
> Quick OT question about the format of this email, which I see used a lot
> on this list. Are you using an automated email filter to generate these
> references, or do you do it by hand? If the former, what is the name of
> the software?
There unfortunately exist some neti
Bill Gatliff wrote:
> Now I'm beginning to see the problems with slotting and symbols the way
> we're doing them now: they unnecessarily tie the concept of a symbol to
> the concept of a component, because the pin numbers that we currently
> record in our symbols are also the pin numbers that the
John Doty wrote:
> A powerful component of an electronic design *automation* process.
> Not the usual fritterware tool that forces you to tell it what to do,
> repeatedly, by manual operation. Do graphics with GUI, do flow with
> scripts. High productivity rather than cute a marketable.
Jo
Ineiev wrote:
> The sample o.pcb is an extraction of teardropped OSDCU board.
What exactly are these teardrops and what is their benefit?
Just curious.
MS
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Torsten Wagner wrote:
> is uschem public available ?
cvs -d :pserver:anon...@ifctfvax.harhan.org:/fs1/IFCTF-cvs co ueda
ifctf-part-lib OSDCU
will give you uEDA/uschem, my part library for it and a sample project
(the only board project done with uEDA so far :-) which dual-serves as
documentati
Torsten Wagner wrote:
> How mature and stable are the suite yet ?
> Can it be really considered for serious work ?
I have designed and built an SDSL physical layer interface board using
this suite, a board which one of the gEDA developers (Peter C) has
remarked upon as being quite complex. Tha
k...@aspodata.se (Karl Hammar) wrote:
> Is there a way to organize alternative subparts in a project, e.g.
> a cpu-card for one user will have one kind a bus-connector and for
> another user another bus-connector, but still maintanable as one
> project?
I don't see a sensible way to do it with
David SMITH wrote:
> However, I think you'd have a problem with non-GUI PCB layout. Whilst
> you could automate all of the routing and some of the placement, I'd
> really struggle without a GUI for placing the parts where their location
> matters (e.g. connectors, front panel stuff, etc.). I su
asom...@gmail.com wrote:
> "Horror" is the correct description of my first thought. EDA is such
> an inherently graphical task, a gui seems natural.
For a "professional hardware engineer" type: yes. For someone like me:
no. Although I've had an active interest in how electronic circuits and
di
I've already posted this great news on the relevant project mailing list,
but I thought I'd post it here too:
Almost 5 months ago Peter Clifton wrote here:
> Thanks. I had quick a look through, and I must say, the SDSL unit is a
> very impressive project - far more complex than I'd imagined.
>
>
Ineiev wrote:
> I wonder if I may ask to keep GL code optional. most my machines have
> no GL-enabled hardware; and on the computer that has GL support, it is
> so weak that PCB+GL is quite unusable with any non-trivial board ---
> much worse than traditional PCB . sorry.
I second that! I don't
John Doty wrote:
> To a lesser extent
> that true of pcb, too (as we have heard from an xcircuit user).
And a uEDA user too! My first PCB laid out by Ineiev in GNU PCB from my
uschem schematics is currently being fabbed.
MS
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Bill Gatliff wrote:
> The latest generation of BGA parts have so many pins on the package,
> packed so tightly together, that it isn't possible to get all the
> signals out of the chip in two layers and still have the traces large
> enough to meet specs.
> [...]
> I'm told that the OMAP3430's
How about we move this thread back to its original topic of blind and
buried vias, not arguments regarding whether or not PCB is part of gEDA.
I have some questions out of plain curiosity: completely aside from the
question of how they ought to be handled by GNU PCB or any other PCB
design tool, I
Ineiev wrote:
> But actually it does not claim this is fab author, it intentionally
> reports the Unix user who saved the board. if you want to save author
> info in the PCB you probably can use attributes.
In my code of honor a PCB designer who lays out an Open Source Hardware
board deserves to
Ineiev wrote:
> Your locale was Russian. PCB output aperture sizes as 0,025 instead of 0.025.
This is a perfect example why I consider the whole concept of locales
and i18n to be a diabolical abomination. Whoever invented these evil
things should be taken out and shot as an enemy of the People,
DJ Delorie wrote:
> So, in my dream world, there's exactly one 2-NAND gate symbol, for
> example. Mapping that to a specific gate in a specific part, with
> pinning, power, manufacturer and vendor information, pricing, and
> footprint infomation, is all done by a separate database (in whatever
>
Gabriel Paubert wrote:
> I use three languages almost everyday (I'm french, I live in Spain and
> I work for an international research institute). However, when I am in =
> front of a computer, I think in english.
Ditto! English should be the one and only international official
language of Comp
Bert Timmerman wrote:
> got cvs co working
> Simply typing make barfs the following:
> [snipped]
Your OS is too modern. Install something that is at least 25 years
obsolete and try again.
Seriously though, Ineiev has already told me that ultra-modern versions
of gcc refuse to compile uEDA as
Bert Timmerman wrote:
> > cvs -d anon...@ifctfvax.harhan.org:/fs1/IFCTF-cvs co ueda
>
> [...]
>
> copy-pasting the cvs command to a Bourne shell on my workstation gives
> that a password other than is required.
Oops, forgot the :pserver: part; try the following:
cvs -d :pserver:anon...@ifctfva
Bill Gatliff wrote:
> At the risk of going OT, I'll add that as I get better at following the
> above strategy--- which is particularly helpful with more complex parts
> like microcontrollers--- I get really frustrated at gschem's strong
> association between pin numbers on the symbol, and pin nu
Darrell Harmon wrote:
> I have used the no touch service from http://www.protoexpress.com They are
> in Sunnyvale, CA, and do good work.
I like their deal, it's the best I have found so far for what I want.
The only remaining concern I need to resolve before I settle on them as
the recipient of
Hello gEDA/PCB users,
I wonder, is there perchance a local user group in Southern California
similar to the Freeedaug on the East Coast? Or if there is no
established group, are there any individual gEDA/PCB users in Southern
California who might be interested in starting such a group?
I would r
I wrote:
: But the thing is, when I tried building with the GTK HID (out of
: desperation), it behaved exactly the same way! (Worked OK with -x ps,
: but trying to bring up the GUI produced an identical-looking crash.)
:
: I'll see if I still have the binary from that build around somewhere.
Scr
DJ Delorie wrote:
> Most people build for GTK.
But the thing is, when I tried building with the GTK HID (out of
desperation), it behaved exactly the same way! (Worked OK with -x ps,
but trying to bring up the GUI produced an identical-looking crash.)
I'll see if I still have the binary from th
DJ Delorie wrote:
> It's long since been fixed in cvs/git.
>
>/* homedir is set by the core */
> + home = homedir;
>home_pcbmenu = NULL;
With this patch PCB compiles and works - thanks!
I still scratch my head at how such a bug could make it into a release -
I mean, shouldn't it cause
Hello,
I'm having a difficulty getting a recent version of pcb to work on my
system. First a little background: Ineiev has finished the layout of my
OSDCU board (he has done a great job of it too!), but before I run
pcb -x gerber OSDCU.pcb and send the resulting files to the fab, I would
really l
Peter TB Brett wrote:
> > * SnPb finish - this one is an absolute requirement for ideological /
> > philosophical reasons, RoHS crap is *not* acceptable.
>
> In the nicest possible way, WTF?
RoHS is an evil abomination that is reprehensible to the core of my
being. The whole underlying philos
Ineiev wrote:
> BTW why unplated holes may be preferable for this case?
Sentimental reasons: I want my SDSL gadget to be just as "professional"
as all those "mainstream" existing SDSL CPE products that fill eBay. I
have *never* seen a "real" commercial product PCB on which the holes
accommodati
Hello gEDA/PCB users,
Ineiev is almost done with the layout of my SDSL board, and I am now
looking for a place to fab it. I am posting here in the hope that some
kind soul can suggest a PCB fab shop that would be a good fit for what I
want to build. Here are my board features:
* Simple rectangu
Dave McGuire wrote:
> I vote for automatic and immediate unsubscription of people who
> post messages in HTML.
I second that!
MS
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Peter Clifton wrote:
> What does the pinout file look like?
#pin name pin number
A:1 1
B:1 2
Y:1 3
A:2 4
B:2 5
Y:2 6
GND 7
Y:3 8
A:3 9
B:3 10
Y:4 11
A:4
Peter Clifton wrote:
> Could you send an example as to the syntax used please?
In the MCL:
part 74LS00:
device=74LS00
footprint=SO14
description=Standard logic IC, SOIC package
manufacturer=Generic
npins=14
pinout=7400.pinout
U4:
# M68K bus read and write strobes
part=74LS00
In a sche
Peter Clifton wrote:
> Given a blank canvas, my personal preference would be that as an
> internal representation, attributes are simply name=value pairs without
> any coordinates or other graphical representation.
>
> The text you see on the schematic would be an entity without its own
> text, b
Ineiev wrote:
> Hmm, I wonder if your lpr outputs onto reusable media.
No, it does not. I kill trees. I know, I am a bad boy.
Setting up a system for viewing PostScript on an X11 display that's
usable from my 4.3BSD-Quasijarus VAXen is on my *very* long list of
things I'd like to get done som
John Doty wrote:
> You can print using the print.scm from a text terminal or script as
> long as there's an X server for gschem to flash the page on. A minor
> annoyance, I think.
That "minor annoyance" was enough for me to write uschem (from scratch)
to replace gschem. uschem currently has
Chris Smith wrote:
> I keep seeing references to uEDA and uschem, but I can't find any
> mention of it on the gEDA page or with Google. What is it? Where is it?=
The following cvs checkout command:
cvs -d :pserver:anon...@ifctfvax.harhan.org:/fs1/IFCTF-cvs co ueda
ifctf-part-lib OSDCU
will
Ineiev wrote:
> BTW I couldn't achieve
> this with gschem --- it doesn't work from text terminal for me.
That is exactly why the circuit which you'll be laying out has been done
in uschem instead of gschem!
MS
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Gabriel Paubert wrote:
> Sorry, I did not express myself well, I meant the TI part (SN75LBC784),
> that one does not appear in stock in any of my providers.
I have it in my design for the sentimental value - I just like EIA-423 -
and I have 25 of those parts in my little grabby hands, enough for
Gabriel Paubert wrote:
> Indeed, while some distributors apparently still have a non-negligible
> stock of Conexant's RS8973 (www.americaii.com claims 1943),
Thanks for the pointer, I'll check it out!
> the transceiver is obsolete.
Yes, Mindspeed doesn't want to make, sell or support it any m
John Griessen wrote:
> but then, the international reach of the internet along with closed borders
> and regulated trade may put me out, way out :-)
You mean Ineiev's offer being 15-40 times cheaper than what you and
everyone else has offered? Yeah, that pretty much guarantees that I'll
go with
Joerg wrote:
> It sure does sound reasonable. Probably what my layouter would have
> quoted me also (and no, he won't be an option here because he doesn't
> use gEDA).
Well, I don't use gEDA either, I use uEDA for the schematic/BOM phase of
the design, but that doesn't really matter, I just ex
Kai-Martin Knaak wrote:
> That is, you already did the initial gsch2pcb run?
I did the uEDA equivalent thereof. I use uEDA rather than gEDA, but the
output PCB elements and PCB netlist format are exactly the same. All
nets are meaningfully named.
> My rule of thumb for an economical size, th
Kai-Martin Knaak wrote:
> A bill of material (BOM) woud help to estimate the necessary effort. The
> BOM should include the package of the parts, especially of the connectors
> and special ICs.
http://ifctfvax.Harhan.ORG/OpenSDSL/OSDCU/OSDCU-AA.bom
http://ifctfvax.Harhan.ORG/OpenSDSL/OSDCU/sho
> Why not use RoHS chips? You can use those with leaded solder, as long
> as they're not BGA or CSP.
Yeah, that's what I do when SnPb components aren't available, but if
they are available, I use them as a matter of principle.
My understanding is that if one uses RoHS parts, then tin whiskers ca
Hello fellow gEDA/PCB users,
I hope this post is not too off-topic/inappropriate for this list. I
have an open source hardware design (an SDSL hacking board) that's
getting close to entering the layout phase, and I will soon need to hire
someone to do the PCB layout. (I have to outsource it beca
Joerg wrote:
> But then lots of road blocks are thrown
> in front of them. Like having to first get teaching credentials and so
> on. Costs time you may not have, and money. I really don't understand
> why someone who explains electronic design to students and has decades
> of hands-on experi
Eric Brombaugh wrote:
> There's one little bit of advice you might be able to help with - I'm
> running ISE 10.1.03 on a Fedora 9 system and several of the GUI apps are
> impossible to run because they're linked against libXm.so.3 which isn't
> in any of the standard Fedora repositories.
I th
sha liu wrote:
> Test are mostly run on our self-designed low-volume FPGA, but also on other
> popular commercial products.
Are you saying that you (your university group I guess) have fabbed your
own FPGA silicon? Is it open source? Is it comparable in capabilities
to the major commercial FPG
DJ Delorie wrote:
> Actually, four wires all the way out the driveway. I know it's not
> the two-wire variety because the last time they had to fix it, they
> commented on the fact that I hadn't been "upgraded" to the two-wire
> one. I have two lightning protectors in the demarc box, not one.
Dave McGuire wrote:
> My last two DSL circuits had no voice capability.
Ahh, the difference between ADSL and SDSL. One of my pet peeves is
people saying "DSL" to mean ADSL...
Time to plug my Open SDSL Connectivity Project:
http://ifctfvax.Harhan.ORG/OpenSDSL/
Hey, I drew it in gschem origina
Peter Clifton wrote:
> Right, next hardware project for DJ then... design a build-it-yourself
> kit to build USB HCI HID device with a row of buttons for driving PCB ;)
Isn't it easier and cheaper to just buy a Sun keyboard with those L-keys
on eBay? I'm using one to type this email.
MS
DJ Delorie wrote:
> The idea I had a while back was to use symbolic pin names in the
> symbols, and map symbolic pin names to physical pin numbers as part of
> the "heavyification" of the symbol. The physical pin numbers are
> added to the symbol at that point.
That's exactly how my uEDA handle
Mike Crowe wrote:
> In my (weak) world view of electrical schematics there exist three types
> of data
> netlist data - provides component to component connectivity)
> graphical data - infomation related to rendering a graphical schematic
> component data - additional infomation about the compon
der Mouse wrote:
> If you mean just the shell written by S. R. Bourne, then
> yes, it's not a Bourne shell script, but that's pretty much irrelevant,
> because I doubt there's anyone still using the real Bourne code.
I do! I am not aware of any user-visible differences in /bin/sh between
V7 and
Ales Hvezda <[EMAIL PROTECTED]> wrote:
> PS. I've tolerated it until now (threshold reached), but please stop
> posting HTML to this list. Please post plain text only messages to the
> geda-* mailing list. Yes, this policy is described here for all the
> geda-* lists:
> [...]
> * Do NOT send mes
John Griessen <[EMAIL PROTECTED]> wrote:
> How are your non-X11 schematic methods coming Michael?
cvs -d :pserver:[EMAIL PROTECTED]:/fs1/IFCTF-cvs co ueda
It's coming along. The project has been on hold for a while as I've
been dealing with other life priorities, but I'll be able to resume it
s
DJ Delorie <[EMAIL PROTECTED]> wrote:
> Today I sat down to work on my latest project. Next step, rearrange
> some of the signal wires. I type "vi mcu.sch"... er, no,
> backspace... "gschem mcu.sch", yeah, that's right.
What's wrong with "vi mcu.sch"? I personally find that a heck of a lot
eas
l. The Original UNIX way.
Quoting from uEDA documentation:
First a disclaimer is in order. Different people write Free Software based on
different motivations. Like most Free Software written by Michael Sokolov,
uEDA is based on the "scratching a personal itch" development model. In o
Bob Paddock <[EMAIL PROTECTED]> wrote:
> The BOM should be the master document that populates everything.
>
> [...]
>
> Obviously people on this list are dealing with schematics and PCBs,
> so we tend to think of the schematic as the "master",
> but in the contracting environment the BOM is what r
Mark Cianfaglione <[EMAIL PROTECTED]> wrote:
> It's reasonably loaded. Too low a load was bad as the drivers of the
> processor were hefty so the overshoot and undershoot were nasty unless you
> dampened them with series resistors.
Ah, good to know.
> On heavily loaded systems (like yours) it'
Hello fellow gEDA/pcb users,
I know there are a few old-timers on this list (by that I mean hardware
engineers of old school), and my question is directed to those. Would
anyone here happen to experience designing a system with the good old
Motorola MC68302? (It's an old-school telecom processor
Hello fellow gEDA/pcb users,
I've got a PCB mechanical design question. I have given up on the idea
of copying the form factor of EN routers (basically I don't really like
that form factor) and I'm going for a form factor of my own. However,
being a proud citizen of the Union of Soviet Socialist
Hello gEDA/PCB users,
I'm looking for some surface mount LEDs, specifically a 1206-sized (or
thereabouts) green LED and a 1210-sized (or thereabouts) bicolor
red/green LED, both shining upward from the PCB (i.e., not right angle).
Would prefer for the two to be somewhat matched, i.e., from the sam
Ales Hvezda <[EMAIL PROTECTED]> wrote:
> However, if you are going to write an free software EDA tool in
> any language (of your choice), then by all means, discuss here to your
> heart's content
Really? Does this mean that discussion of uEDA and uschem would be
on-topic here?
At least the uEDA
I have just made the first very very alpha release of uEDA. uEDA is
envisioned to do for the 4-capital-UNIX culture what gEDA has done for
the GNU/Linux culture, but right now it does just two things:
* Provide an alternative to gsch2pcb for getting footprints into PCB;
* Provide a nice (IMO) se
[EMAIL PROTECTED] wrote:
> It recently took me five minutes to sweet-talk openoffice into
> letting me type "MHz" correctly.
Yet another reason to use vi and troff instead of OO.
> Good thing for me I rarely use word processors of any kind.
> I'm a TeXhead from way back.
So why were you using O
> Does he still use ABEL?
> The last edition I saw did, but also had some VHDL.
Dunno, I only have the 2nd edition (1994 or so IIRC).
MS
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_Digital Design: Principles and Practices_ by John Wakerly is my
favourite.
MS
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Dave McGuire <[EMAIL PROTECTED]> wrote:
> I remember "back in the good old days" when it was considered a
> good thing to be self-sufficient. ;)
I believe in that too and I do strive to be self-sufficient whenever I
reasonably can. If I didn't strive to be self-sufficient, I wouldn't be
mainta
Stephen Williams <[EMAIL PROTECTED]> wrote:
> So I am noticing that your refusing to use modern tools just
> because they are modern has rendered you unable to do your tasks
> yourself.
>
> That's fine, of course, because that other person [...]
> gets your money.
OK, so if you ever develop, say,
Dan McMahill <[EMAIL PROTECTED]> wrote:
> vi layout.pcb
> pcb -x gerber layout.pcb
Thank you, Dan, for expressing it so succinctly! This is exactly how I
use PCB at the present moment. Of course it would be just a tad too
difficult to do the whole layout this way, but that's exactly why I plan
Steve Meier <[EMAIL PROTECTED]> wrote:
> Does this include only 1979 and earlier components?
No, just the philosophy, paradigm, world view and way of thinking, not
necessarily the components. What matters is not the date code stamped
on the chips or the release date of a piece of software or wha
Peter Baxendale <[EMAIL PROTECTED]> wrote:
> What a wimp. What's wrong with ed?
Nothing wrong. I do use ed too sometimes, as well as ex. Vi is just a
mode in ex, and I use ex a lot, in both command and vi modes.
MS
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Dave McGuire <[EMAIL PROTECTED]> wrote:
> Sure, you can always fork. But as DJ pointed out...how, exactly,
> are you running PCB on an ASCII terminal?
I don't. I plan on hiring someone else to do the layout when I get to
that stage. But I want to do all preceding steps first using my
scripte
Steve Meier <[EMAIL PROTECTED]> wrote:
> My overall impression of
> this is that I propably won't be influenced by your oppinions.
I don't care. As I've said, I can always fork. I'm already used to
maintaining my own versions of virtually everything I use, starting with
the OS and the underlyin
Steve Meier <[EMAIL PROTECTED]> wrote:
> The only tool ever needed is a
>
> 2LBs Claw
I disagree: there is one more tool needed. What tool can one possibly
need besides a hammer? Can anyone guess? A sickle of
course! That's a no-brainer.
MS
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Steve Meier <[EMAIL PROTECTED]> wrote:
> I really am interested in why or why not going with XML?
How would I use XML with punched cards or paper tape?
> So a few more details would be nice.
OK, here are a few more details about me for you to mull over. I have
been called things like "Neo-Amis
Steve Meier <[EMAIL PROTECTED]> wrote:
> Why?
Because given a *choice* between an XML-based tool/format and a non-XML-
based one, I'll choose the latter.
MS
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Steve Meier <[EMAIL PROTECTED]> wrote:
> And while I am at it. I would like to see all of the geda and pcb text
> files get converted to xml.
I would have to fork if this were ever done.
MS
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Stuart Brorson <[EMAIL PROTECTED]> wrote:
> Actually, I've often thought that we should advertise gEDA to the big
> chip guys as a method to distribute reference designs -- schematics,
> layouts, and Gerbers.
Yeah, right... When you find a chip vendor like that, please let me
know.
Anyone care
John Luciani <[EMAIL PROTECTED]> wrote:
> I would go for the concave terminations. The concave may be easier to
> hand solder
> on small pads.
Thanks John, I'll put the EXBV8V with concave pads in there, using the
M4 pcblib footprint. (Of course this is all very preliminary -- written
with forks
Dan McMahill <[EMAIL PROTECTED]> wrote:
> take a look in the ~panasonic library for footprints like
> PANASONIC_EXB14V. Those are the panasonix EXB series of SMT resistor
> arrays.
Thank you Dan, that's exactly what I was looking for! And they are M4
footprints, yay! I love M4! I adore M4!
John Griessen <[EMAIL PROTECTED]> wrote:
> Is there a way to get something like that in PCB now? I can't see one.
> The way I would like to have is to open two windows of PCB, each with a
> different netlist loaded or none, and be able to copy to a buffer, and paste
> in the other window.
I seco
Hello fellow gEDA/PCB users,
I wonder, does anyone have a footprint for an SMT chip resistor array
with 4 isolated resistors? I don't know how those footprints are called
(which is why I'm unsure what to look for), but such resistor arrays can
be found on many many digital boards. I don't have a
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