Bob Paddock wrote:
fwiw, there is a pcb-bugs mailing list with only me as the subscriber. Of
course in all fairness, that list didn't exist yesterday ;) That list will
get all new bug reports and updates to existing reports.
Don't see it listed at any of these seemingly likely places:
http://
On Tue, Mar 9, 2010 at 8:44 PM, DJ Delorie wrote:
[...]
> Committed, thanks!
Thank you :)
Steve
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> fwiw, there is a pcb-bugs mailing list with only me as the subscriber. Of
> course in all fairness, that list didn't exist yesterday ;) That list will
> get all new bug reports and updates to existing reports.
Don't see it listed at any of these seemingly likely places:
http://www.gpleda.org/m
> Here's an updated patch that uses Manhattan distance instead - for the
> tiny lengths involved it should be fine.
Committed, thanks!
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Duncan Drennan wrote:
If the senior developers are fed projects and requirements, suitably
discussed and planned, they'd be more likely to work on them. We
currently work on our own desires because we know what we want, to
solve our problems.
That sounds nice, but the reality is quite differen
Peter Clifton wrote:
On Tue, 2010-03-09 at 19:20 +, Gareth Edwards wrote:
If we want to trial this model, I'm personally happy to become one of
the "second-class developers" as Kai-Martin put it - to do some patch
triage for gEDA tools in general, not just pcb.
Sure!
These things typical
DJ Delorie wrote:
So what can we do? How can we get people with *less* experience
more involved in solving this problem?
Grow them?
That is, introduce a group of second class developers. I don't
think, this will work. The real work is to decide whether or not a
patch actually improves the co
One of my long-term projects is to add layer types to layers, and
allow for sub-circuits (i.e. elements). Then we'd have a true paste
layer, and you could define elements as complexly as you need.
But it's been on the list for a long time, and hasn't happened yet :-(
__
On Mar 9, 2010, at 4:01 PM, DJ Delorie wrote:
>
>> is that true? Is it simply generated on the fly off the pad
>> information during gerber export?
>
> That's true.
Just in case anyone is confused by the tight snippage: It is true that there is
no "real" paste layer, it is generated on the fl
> is that true? Is it simply generated on the fly off the pad
> information during gerber export?
That's true.
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On Mar 9, 2010, at 3:33 PM, Peter Clifton wrote:
> On Tue, 2010-03-09 at 18:27 -0500, Dan McMahill wrote:
>> pstoedit converts postscript to various formats. So I suppose you could
>> try pcb export to postscript and then pstoedit to produce dxf. That
>> said, there are always issues with fil
Well, for one thing, dxflib is rock solid, and pstoedit was broken in many ways
the last time I tried to use it.
-dave
On Mar 9, 2010, at 2:48 PM, Windell H. Oskay wrote:
> Doesn't pstoedit already do this, too?
>
> http://www.pstoedit.net/
>
> Are there advantages to these custom versions?
>
On Tue, 2010-03-09 at 18:27 -0500, Dan McMahill wrote:
> pstoedit converts postscript to various formats. So I suppose you could
> try pcb export to postscript and then pstoedit to produce dxf. That
> said, there are always issues with file conversions and I suspect you're
> much better off le
pstoedit converts postscript to various formats. So I suppose you could
try pcb export to postscript and then pstoedit to produce dxf. That
said, there are always issues with file conversions and I suspect you're
much better off letting pcb directly produce dxf. But it may just work.
Winde
Doesn't pstoedit already do this, too?
http://www.pstoedit.net/
Are there advantages to these custom versions?
>> I've wrote some C++ code to convert a DXF to PCB. It is in "works for
>> me"
>> state.
>>
>> Levente
>
> I've written one as well, in the same state.
>
> http://vivara.net/software/d
On Tue, Mar 9, 2010 at 4:26 PM, Levente Kovacs wrote:
> On Fri, 26 Feb 2010 01:58:18 +
> Peter Clifton wrote:
>
>> I met with the LiquidPCB developer today, and he's been working on a
>> STEP importer.. so there might be some possible overlap there.
>>
>> He also mentioned that he has a DXF o
On Fri, 26 Feb 2010 01:58:18 +
Peter Clifton wrote:
> I met with the LiquidPCB developer today, and he's been working on a
> STEP importer.. so there might be some possible overlap there.
>
> He also mentioned that he has a DXF outline -> (geda-)PCB converter,
> which he would make available
Am 08.03.2010 23:11, schrieb Jared Casper:
I think your email is a great response to KMK and loads better than
ignoring it, saying "I'm busy," or even applying it without being
happy with it. I don't think it is inappropriate for devs to require
contributors to follow guidelines and a certain s
Hi,
I have a bunch of symbols here:
http://logonex.eu/git/?p=svn.git;a=tree;f=gschem-sym;h=a684be6d0dc98a94e7d8ea092972e18f4a9cdce4;hb=90743ea21068a0c473ce71da1fd457353310ccf4
and a bunch of footprints here:
ttp://logonex.eu/git/?p=svn.git;a=tree;f=levalib;h=f13a688b8f588acff7f081ac95999259bb0
On Mar 8, 2010, at 3:20 PM, Steven Michalske wrote:
My statement was that you as a user should not override the setting
that the computer configured for you.
...assuming the people who wrote that part of the OS did it
right. I'm willing to bet I've been using (and programming) X longer
On Tue, 2010-03-09 at 19:20 +, Gareth Edwards wrote:
> If we want to trial this model, I'm personally happy to become one of
> the "second-class developers" as Kai-Martin put it - to do some patch
> triage for gEDA tools in general, not just pcb.
Sure!
These things typically evolve anyway..
On Tue, 2010-03-09 at 21:33 +0200, Duncan Drennan wrote:
> > If the senior developers are fed projects and requirements, suitably
> > discussed and planned, they'd be more likely to work on them. We
> > currently work on our own desires because we know what we want, to
> > solve our problems.
>
>
> That sounds nice, but the reality is quite different (understandably).
> Firstly, who feeds the projects and requirements to the developers?
> Secondly, raising ideas for discussion often ends (quickly) in the
> comment, "If you want it, just develop it yourself." In practice
> developers work o
> If the senior developers are fed projects and requirements, suitably
> discussed and planned, they'd be more likely to work on them. We
> currently work on our own desires because we know what we want, to
> solve our problems.
That sounds nice, but the reality is quite different (understandably
On 9 March 2010 18:23, DJ Delorie wrote:
>
>> If developer cycles is the bottle neck, the only solution is to
>> increase the number of active developers.
>
> That's what I'm trying to do - both reduce the bottleneck, and make it
> easier to add more developers.
>
>From my perspective, DJ is on t
> > So what can we do? How can we get people with *less* experience
> > more involved in solving this problem?
>
> Grow them?
> That is, introduce a group of second class developers. I don't
> think, this will work. The real work is to decide whether or not a
> patch actually improves the code
On Mon, 08 Mar 2010 23:05:57 +, Peter Clifton wrote:
> Tips for that scalling.. I've foudn that using gimp with the "Sinc
> (Lanczos3)" interpolation seems to give good results on images with fine
> line detail.
Nice to know. I gave up on gschem previews because of most lines just
vanished.
On Mon, 08 Mar 2010 21:30:39 +, Peter Clifton wrote:
> Some developers - like (sorry to say, I'm speaking purely for myself
> here), are damned right lazy, and sometimes need a little cajoling to
> get things done.
Well, that's why I brought up the subject twice on this list.
> Getting pat
On Mon, 08 Mar 2010 15:10:09 -0500, DJ Delorie wrote:
> I agree that PCB needs more grunt work from the (we) primary developers.
(...)
> So what can we do? How can we get people with *less* experience more
> involved in solving this problem?
Grow them?
Honestly. Developers don't emerge fully ad
On Mon, 08 Mar 2010 23:05:57 +, Peter Clifton wrote:
> Tips for that scalling.. I've foudn that using gimp with the "Sinc
> (Lanczos3)" interpolation seems to give good results on images with fine
> line detail.
Good to know. I stopped putting PNGs of gschem schematics on our internal
wiki w
On Tue, 2010-03-09 at 12:59 +, andrew whyte wrote:
> Thanks for the advice guys. I didn't realise that I could toggle the
> visibility of the reference designators.
I only realised it after having spent a decent time coding up a feature
to switch them on / off, then found existing code in pla
On Tue, 2010-03-09 at 12:26 -0300, Facundo Ferrer wrote:
> Hi Peter,
>Thanks for your time. I'll try to rewrite the gnetlist but not now. I
>have to finish my thesis so I have to use the university provided
>software.
If you're anything like me.. sitting down to write your thesis will
On Tue, 2010-03-09 at 16:16 +0100, Stefan Salewski wrote:
> On Tue, 2010-03-09 at 16:01 +0100, Piter_ wrote:
> > Hi all.
> > How can I increase fontsize in gschem? If I make a ps file from
> > schematics I have to zoom on part of it to be able to read values of
> > components.
> > Thanks
> > Petro.
On Tue, 2010-03-09 at 09:28 +, Peter TB Brett wrote:
> On Tue, 9 Mar 2010 09:18:38 +, andrew whyte wrote:
> > Ah... sounds like you've got it.
> >
> > The layout is too dense for a silk component refdeses. I hadn't
> > thought of setting up an assemly only layer. Can I move the silk
>
Hi Peter,
Thanks for your time. I'll try to rewrite the gnetlist but not now. I
have to finish my thesis so I have to use the university provided
software.
Thanks all.
On Tue, Mar 9, 2010 at 6:40 AM, Peter TB Brett <[1]pe...@peter-b.co.uk>
wrote:
On Mon, 8 Mar 2010 20:32
Thanks for the advice guys. I didn't realise that I could toggle the
visibility of the reference designators. I will turn them off -
thanks Peter, I only need to give the manufacturer a pdf (printable
from ps), so it should be fairly easy to turn them on and export an
assembly drawing then turn t
On Mon, 2010-03-08 at 19:56 -0500, Jim wrote:
> So you are saying you get a email when a bug is opened but not when a
> change is made?
For gEDA/gaf stuff, yes.
Gerbv emails for every change. I don't "think" PCB has a mailing list
for bug traffic.
--
Peter Clifton
Electrical Engineering Divi
On Tue, 2010-03-09 at 16:01 +0100, Piter_ wrote:
> Hi all.
> How can I increase fontsize in gschem? If I make a ps file from
> schematics I have to zoom on part of it to be able to read values of
> components.
> Thanks
> Petro.
>
OK, Peter Clifton already answered your question...
But for me you
On Tue, 2010-03-09 at 16:01 +0100, Piter_ wrote:
> Hi all.
> How can I increase fontsize in gschem? If I make a ps file from
> schematics I have to zoom on part of it to be able to read values of
> components.
> Thanks
> Petro.
Edit the text by selecting it, and typing "ex". Increase the font size
Hi all.
How can I increase fontsize in gschem? If I make a ps file from
schematics I have to zoom on part of it to be able to read values of
components.
Thanks
Petro.
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On Mon, 8 Mar 2010 20:32:01 -0300, Facundo Ferrer
wrote:
> When I ran on this server gnetlist alloc more than 95% of the RAM and at
> this point started to swap and when all the swap was allocated the 'top'
> command is not refreshed properly and I have a hard work trying to stop
> gnetlist.
> I
On Tue, 9 Mar 2010 09:18:38 +, andrew whyte wrote:
> Ah... sounds like you've got it.
>
> The layout is too dense for a silk component refdeses. I hadn't
> thought of setting up an assemly only layer. Can I move the silk
> refdeses to this layer? Using select and Shift+M doesn't work.
>
Ah... sounds like you've got it.
The layout is too dense for a silk component refdeses. I hadn't
thought of setting up an assemly only layer. Can I move the silk
refdeses to this layer? Using select and Shift+M doesn't work.
On Tue, Mar 9, 2010 at 9:02 AM, timecop wrote:
> um, you should
um, you should have component refdes near the component on the silk level.
if you have some more complicated assembly-related instructions
(outline of big component, keep-out area, etc) they should go in
assembly layer.
why do you have refdes outside of the board from beginning?
On Tue, Mar 9, 20
It seems that there must be a more elegant way of doing what I'm
trying to do in PCB. So I thought I'd ask.
I have a layout, that I have moved component idents away from the
components, (for simplicity & space), the manufacturer still needs to
know which component to put where and has asked
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