On 3/16/09, Dan McMahill wrote:
> One thing I'm wondering though is if we'll ever have issues with fonts
> being different on different systems. Where I'm headed with that is
> what if user A designs a board and the text is all ok (no DRC violations
> like silk on pads, etc). Then user A gives t
Ineiev wrote:
> This subject has been discussed many times on this list.
>
> Recently, I tested ideas from
> http://archives.seul.org/geda/user/Jan-2009/msg00869.html
> and this resulted in a patchset 2684726 at
> https://sourceforge.net/tracker/index.php?func=detail&aid=2684726&group_id=73743&ati
To answer my previous question about how to install ngspice rework-18 on Mac
OSX 10.5.6.
Install MacPorts:
http://www.macports.org/
then, at commandline:
sudo port ng-spice
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Could you ftp/email me a zip of your sch/pcb/fp/etc files? I'll see
if I can replicate it here.
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> >
> > This tells me that you had a file-based footprint that was the same
> > name as an m4-based footprint but with a ".fp" on it. You can't do
> > that *and* have the m4 library be first in your path. I suggest
> > renaming your footprints to be more unique, or removing the m4 library
> > fr
> One other nice thing is that the DIN/CCLK pins of the FPGA become
> user I/O after configuration, so when you're done loading the
> bitstream the MCU can use those pins to talk to the FPGA code you
> just installed. My design has a SPI slave port on those pins so I
> can monitor/control with the
DJ Delorie wrote:
>> I'd definitely recommend putting an SD slot on. The hardware is
>> cheap, the interface is simple and there's so much you can do with
>> it. I store my FPGA bitstream on the SD card, so updating the the
>> hardware design is just a matter of copying the file onto the card
>> an
> It was the reverse for me - I've always used the Xilinx config flash
> parts in the past and I wanted to see how well the other approach would
> work. Turns out to be pretty easy, although there are a few minor
> caveats about the configuration process that I learned along the way.
The limit
DJ Delorie wrote:
>> For FPGA configuration I used slave serial mode and drove the DIN/CCLK
>> direct from a SPI port on my MCU - saved having to use Xilinx's special
>> configuration flash parts. Does mean that the start-up process is a bit
>> more complex though.
>
> I thought of doing that,
> Nice design - should be handy for giant RAM on small MCUs.
That's kinda the whole point ;-)
> It's interesting to compare the S3A with older parts. Nice that it can
> get by without the 2.5V VCCAUX
It does need a separate 1.2v VCCcore though.
> I'm a bit curious what happens if you forget t
DJ Delorie wrote:
> I finally got a verilog module that does a basic SDRAM interface (I
> talked about this a little at the last freedog meeting) so I started
> uploading stuff:
>
> http://www.delorie.com/electronics/sdram/
>
> Nothing fancy yet; it does an activate/transfer/precharge for
> Lastly, I have a question about Sunstone (pcbexpress)
Watch out for their "Copper Thieving" process. If there are large
spaces where the copper should be removed, they leave small squares
in random locations. Saves them time and echent. However I had
the clearance there to meet some safety
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