> Hi DJ,
>
> Please excuse me sending this directly to you. For some
> strange reason keeps bouncing for some
> adminastrative reason.
>
> I inadvertently unlocked a component (my PCB outline with grounded
> mounting holes) and moved it when zoomed in. Doing that moved the
> traces causi
Hey folks, does anyone here have PCB footprints for AMP 555165-1
and 555164-1 modular connectors? I need 'em in a hurry and don't
have the spare brain cycles to draw them right now.
Thanks,
-Dave
--
Dave McGuire
Port Charlotte, FL
On Jun 14, 2008, at 1:31 PM, Peter Clifton wrote:
>>> Just rendered my current layout with the new version of gerbv.
>>> ---> Surprise! The ugly duckling has turned into a GUI beauty!
>>> There is transparancy too. Very impressive.
>>>
>>> Big thanks to everyone on the list who contributed to this
Maybe. Noise levels generally apear to be different. The reducing of the
connection between the two planes is probably as effective. One
advantage of the inductor is that you can break the path entirerly if
you have a problem.
I tend to do this a lot with subsections of a complex board. Each
secti
On Jun 17, 2008, at 6:49 PM, Steve Meier wrote:
> Take a look at your data sheet for the ADC often these devices will
> require both analog and digiital ground and often they will
> recomend you
> connect the two grounds close to them. Second I try to keep the
> digital
> ground away from the a
Take a look at your data sheet for the ADC often these devices will
require both analog and digiital ground and often they will recomend you
connect the two grounds close to them. Second I try to keep the digital
ground away from the analog sections. Third try to avoid traces
(requiring impedence m
Hello,
I have a net called AGND for sensitive analog signals, and one net GND
for general purpose.
Of course I have to connect these two nets (at one single, central
point).
Nets AGND and GND should be really different nets, because this will
help me when I do the board layout (will ensure conne
On Tue, Jun 17, 2008 at 01:31:03PM -, James Johnston wrote:
> Doh... problem solved... figured it out... My minimum touching copper
> overlap was 10 mils when I was running 8 mil traces. That's a new DRC
> setting I'm not used to, but good to know it's there.
The PCB DRC leaves a lot to be d
Peter,
I think you have the correct Idea. Add an option to view non-hierarchy
refdes to the display list (refdes, description, value) and if selected
only display the characters to the right of the right most "\"
A second feature which would be cool is to be able to select a hierarchy
group. Copy
Wouldn't it be nice if the fab shop were to use a different color solder
mask for each block
On Tue, 2008-06-17 at 18:41 +0100, Peter Clifton wrote:
> On Tue, 2008-06-17 at 05:00 -0700, Steve Meier wrote:
> > I don't know if pcb supports this but...
> >
> > In the Mentor Graphics Pads program yo
On Tue, 2008-06-17 at 05:00 -0700, Steve Meier wrote:
> I don't know if pcb supports this but...
>
> In the Mentor Graphics Pads program you can make the refdes strings
> invisible and manualy replace them with strings.
> Each hierarchical block gets a silk screen line drawn around it. The
> block
Doh... problem solved... figured it out... My minimum touching copper
overlap was 10 mils when I was running 8 mil traces. That's a new DRC
setting I'm not used to, but good to know it's there.
-Original Message-
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On Behalf Of DJ Delorie
S
Try shutting off pins and seeing if there are tiny traces under the
pins or pads that might be causing this.
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Thanks! I think I understand the rectangle/polygon feature better now. It
still seems awkward to use sometimes, but it works. But, when following the
advice, it triggers a bunch of "potential for broken trace" DRC errors...
what gives? I *think* my layout is ok, at least it looks ok... But the
I don't know if pcb supports this but...
In the Mentor Graphics Pads program you can make the refdes strings
invisible and manualy replace them with strings.
Each hierarchical block gets a silk screen line drawn around it. The
block gets a string naming its hierarchy
Thus you would have a block l
> Yes. Here's a fragment from a bill of materials from one of my projects:
>
> refdes device value specfootprint
> X12/R4 RESISTOR470 5% 1/10W0603
> X8/R6 RESISTOR5 5% 35W TO220SMD
>> Is it perhaps better to create identical copies of each schematic,
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