And I forgot to update the date in the rush so I committed the fix as
obvious:
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ed8ca31..809f5cf 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,4 +1,4 @@
-2015-01-23 Thomas Preud'homme
+2015-03-03 Thomas Preud'homme
Done for backport to 4.8.
Best regards,
Thomas
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Tuesday, March 03, 2015 5:35 PM
> To: Ramana Radhakrishnan
> Cc: gcc-patches
> From: Ramana Radhakrishnan [mailto:ramana@googlemail.com]
> Sent: Tuesday, February 17, 2015 4:08 PM
> To: Thomas Preud'homme
> Cc: gcc-patches; Richard Earnshaw; Ramana Radhakrishnan; Marcus
> Shawcroft; Richard Biener; Jakub Jelinek
> Subject: Re: [PATCH, ARM] B
Ping?
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
[SNIP]
> >
> > Likewise for the REG_P and ">= FIRST_PSEUDO_REGISTER" tests here
> > (with
> > the equivalent and IMHO prefe
loop that could end up reaching one of the use.
[1] https://gcc.gnu.org/ml/gcc-patches/2015-02/msg00933.html
ChangeLog entries are as follows:
*** gcc/ChangeLog ***
2015-02-16 Thomas Preud'homme
* dominance.c (nearest_common_dominator_for_set): Fix A_Dominated_by_B
code
> From: Richard Biener [mailto:richard.guent...@gmail.com]
> Sent: Thursday, March 05, 2015 7:12 PM
> >
> > loop header
> > start of loop body
> > //stuff
> > (set (reg 128) (const_int 0))
> > //other stuff
> > end of loop body
> >
> > becomes:
> >
> > (set (reg 129) (const_int 0))
> > loop header
/ChangeLog ***
2015-03-05 Thomas Preud'homme
PR tree-optimization/63743
* cfgexpand.c (reorder_operands): Also reorder if only second operand
had its definition forwarded by TER.
*** gcc/testsuite/ChangeLog ***
2015-03-05 Thomas Preud'homme
PR tree-op
> From: Jiong Wang [mailto:jiong.w...@arm.com]
> Sent: Friday, March 06, 2015 8:10 PM
>
> On 05/03/15 09:53, Thomas Preud'homme wrote:
> > *** gcc/testsuite/ChangeLog ***
> >
> > 2015-02-16 Thomas Preud'homme
> >
> > * gcc.dg/loop-7
> From: Steven Bosscher [mailto:stevenb@gmail.com]
> Sent: Monday, March 09, 2015 7:48 PM
> To: Thomas Preud'homme
> Cc: GCC Patches; Eric Botcazou
> Subject: Re: [PATCH, stage1] Move insns without introducing new
> temporaries in loop2_invariant
>
> On Thu, Ma
angeLog entry is as follows:
*** gcc/ChangeLog ***
2015-03-10 Thomas Preud'homme
* graph.c (print_graph_cfg): Make function names visible and append
parenthesis to it. Also make groups of basic blocks belonging to the
same function visible.
diff --git a/gcc/grap
> From: Richard Biener [mailto:rguent...@suse.de]
> Sent: Friday, March 13, 2015 5:02 PM
> >
> > Is this ok for stage1? It's not a bug but it helps debuggability so is
> > this something we might consider backporting?
>
> It's ok now given you bootstrapped the change.
I did + regression testsuite
> From: Steven Bosscher [mailto:stevenb@gmail.com]
> Sent: Monday, March 09, 2015 7:48 PM
> To: Thomas Preud'homme
> Cc: GCC Patches; Eric Botcazou
> Subject: Re: [PATCH, stage1] Move insns without introducing new
> temporaries in loop2_invariant
New patch below.
Hi Steven,
> From: Steven Bosscher [mailto:stevenb@gmail.com]
> Sent: Friday, March 20, 2015 3:54 PM
>
>
> What I meant, is that I believe the tests are already done in
> hash_scan_set and should be redundant in cprop_insn (i.e. the test can
> be replaced with gcc_[checking_]assert).
Ok.
>
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
>
> I noticed in do_local_cprop you replace >= FIRST_PSEUDO_REGISTER by
> cprop_reg_p without removing the REG_P as well.
Sorry, I missed the parenthesis. REG_P
> From: Steven Bosscher [mailto:stevenb@gmail.com]
> Sent: Friday, March 20, 2015 8:14 PM
>
> I put the cprop_reg_p check there instead of !HARD_REGISTER_P
> because
> I like to be able to quickly find all places where a similar check is
> performed. The check is whether the reg is something t
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
>
> FYI testing your patch with the one cprop_reg_p negated as said in my
> previous email shows no regression on arm-none-eabi cross-compiler
> targeting Cortex
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Monday, April 13, 2015 8:48 PM
> Thomas,
>
> I know there were several followups between Steven and yourself.
> With
> stage1 now open, can you post a final version and do a final
> bootstrap/test with it?
Sure, I'm testing it right now. Sorry for
se cprop_reg_p to check if register can be propagated.
(do_local_cprop): Use cprop_reg_p to check if register can be
propagated.
(implicit_set_cond_p): Likewise.
*** gcc/testsuite/ChangeLog ***
2015-04-15 Thomas Preud'homme
Steven Bosscher
Thomas Preud'homme
* gcc.target/arm/pr65647.c: Restrict to ARMv6-M effective targets.
diff --git a/gcc/testsuite/gcc.target/arm/pr65647.c
b/gcc/testsuite/gcc.target/arm/pr65647.c
index d3b44b2..d828d23 100644
--- a/gcc/testsuite/gcc.target/arm/pr65647.c
+++ b/gcc/testsuite/gcc.t
> From: James Greenhalgh [mailto:james.greenha...@arm.com]
> Sent: Friday, June 26, 2015 6:15 PM
>
> This should already have been covered by:
>
> https://gcc.gnu.org/ml/gcc-patches/2015-06/msg01105.html
>
> 2015-06-16 James Greenhalgh
>
> * gcc.target/arm/pr65647.c: Do not ove
registers for renaming.
ChangeLog entry is as follow:
gcc/ChangeLog
2015-01-14 Thomas Preud'homme thomas.preudho...@arm.com
* config.gcc: Add fma_steering.o to extra_objs for aarch64-*-*.
* config/aarch64/t-aarch64: Add a rule for fma_steering.o.
* config/aarch64/aarc
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
>
> ChangeLog entry is as follow:
>
> gcc/ChangeLog
>
> 2015-01-14 Thomas Preud'homme thomas.preudho...@arm.com
>
> * config.gcc: Add
> From: Andrew Pinski [mailto:pins...@gmail.com]
> Sent: Friday, January 16, 2015 6:03 PM
> >
> > +/* Defined in config/aarch64/fma_steering.c. */
> > +
> > +void
> > +aarch64_register_fma_steering (void);
>
>
> This is really bad form. Can you add a header file for this
> declaration and mayb
so that values are output according to their mode.
This is a backport of commit r218118.
*** gcc/ChangeLog ***
2015-01-14 Thomas Preud'homme
Backport from mainline
2014-11-27 Thomas Preud'homme
PR target/59593
* config/arm/arm.c (dump_minipool): dispatch to
> -Original Message-
> From: Richard Henderson [mailto:r...@redhat.com]
> Sent: Thursday, January 22, 2015 5:24 AM
> To: Thomas Preud'homme; gcc-patches@gcc.gnu.org; 'Richard Biener'
> Subject: Re: [PATCH] Don't check for optab for 16bit bswap
> From: Richard Henderson [mailto:r...@redhat.com]
> Sent: Friday, January 23, 2015 2:43 AM
> On 01/21/2015 11:52 PM, Richard Biener wrote:
> >
> > I was asking for the generic expander to consider bswapHI. Rotates are
> > certainly more likely to get combined with sth else.
>
> Maybe. Alternate
Hi Ramana,
> From: Ramana Radhakrishnan [mailto:ramana@googlemail.com]
> Sent: Wednesday, January 14, 2015 7:21 PM
> On Wed, Jan 14, 2015 at 10:20 AM, Thomas Preud'homme
> wrote:
> > When compiling for size, live high registers are not saved in function
> prolog in
ws:
*** gcc/ChangeLog ***
2015-01-22 Thomas Preud'homme
PR tree-optimization/64718
* tree-ssa-math-opts.c (bswap_replace): Make bswap_type be a short
type of same sign as src and convert src to that type if necessary for
all bswap sizes. Fix rotation right notation in nearby c
> From: Richard Biener [mailto:rguent...@suse.de]
> Sent: Friday, January 23, 2015 6:01 PM
> > + if (bswap && n->range == 16)
> > +bswap_type = TYPE_UNSIGNED (TREE_TYPE (src)) ?
> short_unsigned_type_node
> > +:
> short_integer_type_node;
>
> I don'
> From: Richard Earnshaw
> Sent: Wednesday, January 14, 2015 10:49 PM
>
> Sorry, not ok. These symbols pollute the global namespace, yet do not
> use reserved names.
Are you referring to the Lml_* symbols? They appear with local binding in
my environment which is expected since the single float
Ping?
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Friday, January 23, 2015 4:23 PM
> To: Ramana Radhakrishnan
> Cc: gcc-patches
> Subject: RE: [PATCH, ARM] Fix PR644
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
>
> >
> > Secondly, in a shared library environment you need to ensure that
> these
> > names remain private to the instance linked into the library,
* gcc/testsuite/ChangeLog ***
2015-01-27 Thomas Preud'homme
PR testsuite/64796
* lib/target-supports.exp (check_effective_target_bswap64): Do not
cache result in a global variable. Include all 32-bit targets for
bswap64 tests.
diff --git a/gcc/testsuite/
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
>
> Hi Andrew,
>
> cortex-a57-fma-steering.c is really meant to be autosufficient with
> aarch64_register_fma_steering being the only interface which is
Best regards,
Thomas
> -Original Message-
> From: Richard Biener [mailto:rguent...@suse.de]
> Sent: Friday, January 23, 2015 6:19 PM
> To: Thomas Preud'homme
> Cc: gcc-patches@gcc.gnu.org
> Subject: RE: [PATCH] Fix PR64718: bad 16-bit bswap replacement
>
&
> From: pins...@gmail.com [mailto:pins...@gmail.com]
> Sent: Wednesday, January 28, 2015 6:18 PM
> > +
> > + int get_id ();
> > + std::list *get_roots ();
>
> Why use std::list rather than vec?
When I experimented I realized that better code was generated
if the forests were ordered as they wer
bitfield instead of
TYPE_PRECISION that gives the actual size occupied by the bitfield. This patch
fixes that and modify bitfld-6 so that it catch this issue in addition to the
old one.
ChangeLog entries are as follows:
*** gcc/ChangeLog ***
2015-01-28 Thomas Preud'homme
* tre
> From: Jakub Jelinek [mailto:ja...@redhat.com]
> Sent: Thursday, January 29, 2015 6:39 PM
>
> You should mention
> PR middle-end/62103
Right, please find the new ChangeLog entries below:
2015-01-30 Thomas Preud'homme
PR middle-end/62103
> From: Jakub Jelinek [mailto:ja...@redhat.com]
> Sent: Wednesday, February 04, 2015 3:54 PM
>
> Richard already acked it with the new testcase, so yes, this is ok for the
> trunk (just use today's date).
Oups my bad, I forgot he acked it.
Thanks and best regards.
Thomas
Ping?
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Wednesday, January 28, 2015 6:02 PM
> To: 'Andrew Pinski'
> Cc: GCC Patches
> Subject: RE: [PATCH, Aarch
Ping?
> -Original Message-
> From: Thomas Preud'homme [mailto:thomas.preudho...@arm.com]
> Sent: Tuesday, January 27, 2015 1:38 PM
> To: Thomas Preud'homme; Richard Earnshaw; gcc-patches@gcc.gnu.org
> Cc: Ramana Radhakrishnan
> Subject: RE: [PATCH 2/3, A
Ping?
> > -Original Message-
> > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> > ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> > Sent: Friday, January 23, 2015 4:23 PM
> > To: Ramana Radhakrishnan
> > Cc: gcc-patches
> &
> From: Marcus Shawcroft [mailto:marcus.shawcr...@gmail.com]
> Sent: Thursday, February 05, 2015 5:17 PM
>
> OK but wait for stage-1 to open for general development before you
> commit it please.
> /Marcus
Duly noted.
Best regards,
Thomas
bine.c:9650
>
> #ifdef SHORT_IMMEDIATES_SIGN_EXTEND
> tem = sign_extend_short_imm (tem, GET_MODE (x),
> GET_MODE_PRECISION (mode));
> #endif
>
> Once this is done, the same thing needs to be applied to XEXP
> (reg_equal, 0)
> before it is sent to nonzero_bits
unction. There is no reason for this discrepancy, so they ought to
> be
> handled the same way, either entirely here or entirely in the function.
So I moved all the handling inside the new function and also added a check
before calling num_sign_bit_copies about whether it would
> From: Andrew Pinski [mailto:pins...@gmail.com]
> Sent: Tuesday, February 10, 2015 9:57 AM
> > +#ifdef SHORT_IMMEDIATES_SIGN_EXTEND
> > +/* If MODE has a precision lower than PREC and SRC is a non-negative
> constant
> > + that would appear negative in MODE, sign-extend SRC for use in
> nonzero
Ping?
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Tuesday, January 20, 2015 1:06 PM
> To: gcc-patches@gcc.gnu.org; Richard Earnshaw; Ramana Radhakrishnan;
> Marcus Shaw
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Wednesday, February 11, 2015 2:04 PM
>
> Given the rs6000 is affected, one could do before/after tests natively
> in the gcc farm to ensure that removing that code doesn't change the
> generated code across a bootstrap.
Wouldn't that only tell whe
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Wednesday, February 11, 2015 2:49 PM
> >
> > Wouldn't that only tell whether the macro can stay undefined for
> rs6000?
> > MD files for rs6000 could have been tighten since then but not others
> > backend's MD files.
> It's certainly possible, but
> From: Alan Modra [mailto:amo...@gmail.com]
> Sent: Thursday, February 12, 2015 4:35 PM
> > >
> > >Actually this bit seems unnecessary as there is already some logic in
> > >nonzero_bits1 for the CONST_INT case. So I guess the code can be
> > >removed and the comment be moved there at the very lea
as follows:
*** gcc/ChangeLog ***
2015-01-21 Thomas Preud'homme thomas.preudho...@arm.com
* cprop.c (find_avail_set): Return up to two sets, one whose source is
a register and one whose source is a constant. Sets are returned in
an array passed as parameter rather than as a r
> From: Steven Bosscher [mailto:stevenb@gmail.com]
> Sent: Tuesday, February 17, 2015 4:19 AM
> To: Thomas Preud'homme
> Cc: GCC Patches; Richard Biener
> Subject: Re: [PATCH, GCC, stage1] Fallback to copy-prop if constant-prop
> not possible
>
> On Mon, Feb
Ping?
> -Original Message-
> From: Thomas Preud'homme [mailto:thomas.preudho...@arm.com]
> Sent: Tuesday, January 27, 2015 1:24 PM
> To: Thomas Preud'homme; Ramana Radhakrishnan
> Cc: gcc-patches
> Subject: RE: [PATCH, ARM, ping1] Fix PR64453: live high regi
Ping?
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Tuesday, February 10, 2015 4:47 PM
> To: gcc-patches@gcc.gnu.org; Richard Earnshaw; Ramana Radhakrishnan;
> Marcus
> From: Jakub Jelinek [mailto:ja...@redhat.com]
> Sent: Tuesday, October 28, 2014 12:27 PM
>
> Thomas, you know the code better, can you from the fix figure out
> a testcase that current trunk miscompiles or doesn't optimize
> because of this bug?
Here you are (see attachment).
Best regards,
Th
Bummer. Why didn't my MUA warned me on this one?
Here you are.
Best regards,
Thomas
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Wednesday, October 29, 2014 9:33 A
> From: Nathan Sidwell [mailto:nat...@codesourcery.com]
> Sent: Thursday, October 09, 2014 2:30 PM
> On 10/09/14 09:25, Jason Merrill wrote:
> > I would think we want to handle this up in the existing defaulted_int
> block:
> my thought was to at least put it next to the explicit_int = -1 above.
I
> From: Jakub Jelinek [mailto:ja...@redhat.com]
> Sent: Wednesday, October 29, 2014 9:41 AM
>
> I think this is ok for trunk with proper ChangeLog entry.
Done with following ChangeLog entry:
2014-10-29 Thomas Preud'homme
* gcc.dg/optimize-bswapsi-1.c (swap32_e
oth). I think a tree code should be always prefered to a
> builtin function call - which means a rotate is more canonical than a
> bswap16 call.
Below is the updated patch. ChangeLog entries are as follows:
*** gcc/ChangeLog ***
2014-10-29 Thomas Preud'homme
PR tree-optim
> From: Nathan Sidwell [mailto:nathanmsidw...@gmail.com] On Behalf Of
> Nathan Sidwell
>
> It's not an error to omit it for complex - but of course means something
> different. IMHO it would be confusing to set type to integer_type_node
> when
> that's definitely wrong. But then setting 'default
estsuite/g++.dg/torture/pr63366.C
new file mode 100644
index 000..f089123
--- /dev/null
+++ b/gcc/testsuite/g++.dg/torture/pr63366.C
@@ -0,0 +1,10 @@
+// { dg-do run }
+// { dg-options "-pedantic" }
+
+#include
+
+int
+main (void)
+{
+ return typeid (__complex) != typeid (__com
unrelated to PR63761 (but I have diagnosed the root cause).
ChangeLog entry is as follows:
2014-11-03 Thomas Preud'homme
* expmed.c (expand_shift_1): Expand 8 bit rotate of 16 bit value to
bswaphi if available.
diff --git a/gcc/expmed.c b/gcc/expmed.c
index af14b99..7e86b59 1
Hi Jason, thanks for commiting this change. Note that the following ChangeLog
entry is missing. If you want me to commit it let me know.
> *** testsuite/ChangeLog ***
>
> 2014-11-03 Thomas Preud'homme
>
> PR C++/63366
> * g++.dg/torture/pr63366.C: Ne
> From: Jakub Jelinek [mailto:ja...@redhat.com]
> Sent: Friday, November 07, 2014 8:01 PM
> > Why restrict this to 8 bit rotate of a 16 bit value? Shouldn't it apply to
> > a 16 bit rotate of a 32 bit value, or 32 bit rotate of 64 bit value?
>
> That isn't a byteswap, but halfword swap or wordswa
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Friday, November 07, 2014 8:48 PM
> >
> > ChangeLog entry is as follows:
> >
> > 2014-11-03 Thomas Preud'homme
> >
> > * expmed.c (expand_shift_1): Expand 8 bit rotate of 16 bit value t
output according to their mode. This is a different
approach than the one proposed by Felix Yang at [1].
[1] https://gcc.gnu.org/ml/gcc-patches/2014-11/msg00258.html
ChangeLog entries are as follows:
*** gcc/ChangeLog ***
2014-09-03 Thomas Preud'homme
PR target/
Fixed the subject.
Best regards,
Thomas
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Tuesday, November 11, 2014 3:31 PM
> To: gcc-patches@gcc.gnu.org; Ramana Radhakrishn
Ping?
>
> > -Original Message-
> > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> > ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> > Sent: Wednesday, August 20, 2014 9:28 AM
> > To: gcc-patches@gcc.gnu.org
> > Subject
on of the binutils file causing the ICE and then reduced with
creduce (creduce could not reduce the binutils file directly).
ChangeLog entries are as follows:
*** gcc/ChangeLog ***
2014-11-09 Thomas Preud'homme
PR tree-optimization/63761
* tree-ssa-math-opts.c (bswap_repla
* gcc/ChangeLog ***
2014-09-28 Thomas Preud'homme
* doc/invoke.texi (fno-float): Add to the list of C options and explain
its meaning.
*** gcc/c/ChangeLog ***
2014-09-29 Thomas Preud'homme
* c-decl.c (declspecs_add_type): Set location for typedef, struct,
Committed as obvious with the following ChangeLog entry:
2015-08-25 Thomas Preud'homme
* config/arm/constraints.md: Also list Cs and US ARM-specific
constraints as used.
Best regards,
Thomas
ing that the comparison is against constant
0.
ChangeLog entry is as follow:
*** gcc/ChangeLog ***
2015-12-07 Thomas Preud'homme
* config/arm/arm.c (thumb1_reorg): Check that the comparison is
against the constant 0.
diff --git a/gcc/config/arm/arm.c b/gcc/config/ar
:
*** gcc/ChangeLog ***
2015-12-09 Thomas Preud'homme
* doc/install.texi (--with-multilib-list): Describe the meaning of the
option for arm*-*-* targets.
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index 57399ed..2c93eb0 100644
--- a/gcc/doc/install.texi
+++
the code to
address both issues.
ChangeLog entry is as follows:
2015-11-24 Thomas Preud'homme
* config.gcc: Error out when conflicting multilib is detected. Do not
loop over multilibs since no combination is legal.
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 59
o the user as to what multilib
should be built. To this effect, it takes a list of architecture at configure
time and that list needs to be passed down to t-baremetal Makefile to set the
multilib variables appropriately.
ChangeLog entry is as follows:
*** gcc/ChangeLog ***
2015-12-15 T
Hi,
I'll be posting a patch series intended for trunk whose aim is to add support
for ARMv8-M. This patch series does not include changes to support the security
extensions [nor does it include atomics for ARMv8-M Baseline]. This will be
posted as a separate patch series.
=== Quick overview o
uard for DIV code to not apply to ARMv8-M Baseline
since it uses Thumb-2 instructions.
[1] For a quick overview of ARMv8-M please refer to the initial cover letter.
ChangeLog entries are as follow:
*** gcc/ChangeLog ***
2015-11-13 Thomas Preud'homme
* config/a
100644
--- a/libgcc/config/arm/t-softfp
+++ b/libgcc/config/arm/t-softfp
@@ -1,2 +1,2 @@
-softfp_wrap_start := '\#ifdef __ARM_ARCH_6M__'
+softfp_wrap_start := '\#if !__ARM_ARCH_ISA_ARM && __ARM_ARCH_ISA_THUMB == 1'
softfp_wrap_end := '\#endif'
Best regards,
initial cover letter.
ChangeLog entries are as follow:
*** gcc/ChangeLog ***
2015-11-23 Thomas Preud'homme
* config/arm/arm-arches.def (armv8-m.base): Define new architecture.
(armv8-m.main): Likewise.
(armv8-m.main+dsp): Likewise
* config/arm/arm-pro
Hi,
We decided to apply the following patch to the ARM embedded 5 branch.
Best regards,
Thomas
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Thursday, December 17, 2015
on as the other
patches in the series are accepted.
[1] For a quick overview of ARMv8-M please refer to the initial cover letter.
ChangeLog entry is as follows:
*** gcc/ChangeLog ***
2015-11-06 Thomas Preud'homme
* config/arm/arm-protos.h: Reindent FL_FOR_* macro definitions.
Hi,
We decided to apply the following patch to the ARM embedded 5 branch.
Best regards,
Thomas
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Thursday, December 17, 2015
[Fixed the subject and added ARM maintainers to recipient.]
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Thursday, December 17, 2015 3:51 PM
> To: gcc-patches@gcc.gnu.org
&g
as needed.
[1] For a quick overview of ARMv8-M please refer to the initial cover letter.
ChangeLog entry is as follows:
*** gcc/ChangeLog ***
2015-11-09 Thomas Preud'homme
* config/arm/arm.h (TARGET_USE_MOVT): Check MOVT/MOVW availability
with TARGET_HAVE
Hi,
We decided to apply the following patch to the ARM embedded 5 branch.
Best regards,
Thomas
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Thursday, December 17, 2015
is as follows:
*** gcc/ChangeLog ***
2015-11-13 Thomas Preud'homme
* config/arm/arm.h (TARGET_HAVE_MOVT): Include ARMv8-M as having MOVT.
* config/arm/arm.c (arm_arch_name): (const_ok_for_op): Check MOVT/MOVW
availability with TARGET_HAVE
Hi,
We decided to apply the following patch to the ARM embedded 5 branch.
Best regards,
Thomas
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Thursday, December 17, 2015
for non ARMv8-M Thumb-1 target statically but
genattrtab is not currently capable to do it, so this is for a later patch.
[1] For a quick overview of ARMv8-M please refer to the initial cover letter.
ChangeLog entry is as follows:
*** gcc/ChangeLog ***
2015-11-13 Thomas Preud'
Hi,
We decided to apply the following patch to the ARM embedded 5 branch.
Best regards,
Thomas
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Thursday, December 17, 2015
Hi,
> From: Jakub Jelinek [mailto:ja...@redhat.com]
> Sent: Thursday, December 17, 2015 4:26 PM
> > >
> > > > --- a/gcc/testsuite/lib/target-supports.exp
> > > > +++ b/gcc/testsuite/lib/target-supports.exp
> > > > @@ -1432,7 +1432,12 @@ proc check_effective_target_cilkplus { } {
> > > > if {
Reverted now.
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Wednesday, December 09, 2015 5:56 PM
> To: gcc-patches@gcc.gnu.org
> Subject: [PATCH, testsuite] Fix PR68629: a
Hi,
We decided to apply the following patch to the ARM embedded 5 branch.
Best regards,
Thomas
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Wednesday, December 16, 2015
Hi,
We decided to apply the following patch to the ARM embedded 5 branch.
Best regards,
Thomas
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Wednesday, December 16, 2015
Hi,
We decided to apply the following patch to the ARM embedded 5 branch.
Best regards,
Thomas
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Wednesday, December 16, 2015 8:04
cover letter.
ChangeLog entries are as follow:
*** gcc/ChangeLog ***
2015-12-17 Thomas Preud'homme
* config/arm/arm.h (TARGET_HAVE_LDACQ): Enable for ARMv8-M Mainline.
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index
1f79c37b5c36a410a2d500ba92c62a5ba4c
[Sending on behalf of Andre Vieira]
Hello,
This patch series aims at implementing an alpha status support for ARMv8-M's
Security Extensions. It is only posted as RFC at this stage. You can find the
specification of ARMV8-M Security Extensions in: ARM®v8-M Security Extensions:
Requirements on D
.com/help/topic/com.arm.doc.ecm0359818/index.html).
*** gcc/ChangeLog ***
2015-10-27 Andre Vieira
Thomas Preud'homme
* gcc/config.gcc (extra_headers): Added arm_cmse.h.
* gcc/config/arm/arm-arches.def (ARM_ARCH):
(armv8-m): Add FL2_CMSE.
And even better, with the patch (see below ChangeLog entries)! Sigh...
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Saturday, December 26, 2015 9:41 AM
> To: gcc-patches@gcc.gnu.org; Richard Earnshaw; Ram
[Sending on behalf of Andre Vieira]
Hello,
This patch adds RTL patterns for the push and pop instructions for thumb1.
These are needed by subsequent patches in the series.
*** gcc/ChangeLog ***
2015-10-27 Andre Vieira
Thomas Preud'homme
* gcc/config/ar
ons
(http://infocenter.arm.com/help/topic/com.arm.doc.ecm0359818/index.html).
*** gcc/ChangeLog ***
2015-10-27 Andre Vieira
Thomas Preud'homme
* gcc/config/arm/arm.c (arm_handle_cmse_nonsecure_entry): New.
(arm_attribute_table): Added cmse_
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