bit
domin of 3A4000, should we also use that naming in toolchain?
Thanks.
--
Jiaxun Yang
This patch also add a configure options
--with-mips-fix-loongson3-llsc=[yes|no] to enable fix-loongson3-llsc
by config.
>From 16f0fd9e32d2098637dc0eb3e576444c48c43f22 Mon Sep 17 00:00:00 2001
From: C
Add patchwork configuration, use check_GNU_style.py and git_email.py
to perform prepare and pre-apply checks, disable auto-to-cc preflight
checks as we don't have auto-to-cc script.
It helps with streamlining workflow with b4 so people can use
`b4 prep --check` to check patches before sending or a
Hi all,
This series improved b4 working flow by wire up code style
and changelog checking scripts in b4's automation.
Please help with review and apply.
Thanks!
Signed-off-by: Jiaxun Yang
---
Jiaxun Yang (2):
contrib/gcc-changelog/git_email.py: Rework the script
b4-config
Rework the script to align parameters and output with
git_check_commit.py, also better cooperation with b4.
All changes to usage are backward compatible.
contrib/ChangeLog:
* gcc-changelog/git_email.py: (main) Convert to use
argparser; accept file from stdin; Add --verbose
ewise.
(FP_TRAPPING_EXCEPTIONS): Likewise.
(FP_HANDLE_EXCEPTIONS): Implement with _FPU_SETCW.
Signed-off-by: Jiaxun Yang
---
libgcc/config/sh/sfp-machine.h | 46 ++
1 file changed, 46 insertions(+)
diff --git a/libgcc/config/sh/sfp-machine.h b/libgcc/config/s
TIONS): Likewise.
(FP_HANDLE_EXCEPTIONS): Implement with _FPU_SETCW.
Signed-off-by: Jiaxun Yang
---
Changes in v2:
- Use builtins tp implement _FPU_GETCW/_FPU_SETCW.
- Link to v1:
https://inbox.sourceware.org/20250101-sh4-fenv-exception-v1-1-9bafef83a...@flygoat.com
---
libgcc/config/s
在2025年1月1日一月 下午2:57，Oleg Endo写道：
> On Wed, 2025-01-01 at 14:43 +0000, Jiaxun Yang wrote:
>>
>> +#ifdef __SH_FPU_ANY__
>> +#define _FPU_GETCW(fpscr) __asm__ volatile ("sts fpscr,%0" : "=r" (fpscr))
>> +#define _FPU_SETCW(fpscr) __asm__ volatile (
.
(_FP_NANFRAC_Q): Likewise.
(_FP_KEEPNANFRACP): Enable for target.
(_FP_QNANNEGATEDP): Enable for target.
(_FP_CHOOSENAN): Port from MIPS.
gcc/testsuite/ChangeLog:
* gcc.target/sh/pr111814.c: New test.
Signed-off-by: Jiaxun Yang
---
Changes in v2:
- Fix compile
.
(_FP_NANFRAC_Q): Likewise.
(_FP_KEEPNANFRACP): Enable for target.
(_FP_QNANNEGATEDP): Enable for target.
(_FP_CHOOSENAN): Port from MIPS.
gcc/testsuite/ChangeLog:
* gcc.target/sh/pr111814.c: New test.
Signed-off-by: Jiaxun Yang
---
gcc/config/sh/sh-modes.def
在2024年12月31日十二月 下午4:56，Jiaxun Yang写道：
> As per architecture, SuperH has a reversed NaN signalling bit
> vs IEEE754-2008, it also has a NaN propgation rule similar to
> MIPS style.
Oops, please don't apply this version, it seems like auto style fixes
messed up building, sorry
> 2023年4月28日 13:33，YunQiang Su 写道：
>
> speculation_barrier for MIPS needs sync+jr.hb (r2+),
> so we implement __speculation_barrier in libgcc, like arm32 does.
>
> gcc/ChangeLog:
> * config/mips/mips-protos.h (mips_emit_speculation_barrier): New
>prototype.
> * config/mips/mips.cc (sp
> 2023年5月3日 22:04，Maciej W. Rozycki 写道：
>
> On Wed, 3 May 2023, Richard Sandiford wrote:
>
>>> speculation_barrier for MIPS needs sync+jr.hb (r2+),
>>> so we implement __speculation_barrier in libgcc, like arm32 does.
>>
>> Looks reasonable, but do you have a source for the fallback
>> pre-r
> 2023年5月7日 18:34，Maciej W. Rozycki 写道：
>
> On Wed, 3 May 2023, Jiaxun Yang wrote:
>
>> Since it’s possible to run R2- binary on R2+ processor, we’d better find a
>> semantic that do eliminate speculation on all processors. While SSNOPs
>> on R2+ processors is p
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