[PATCH, rs6000] Enable and document some additional builtin overloads

otstrapped and regtested this on powerpc64le-unknown-linux-gnu with no regressions, and this new test passes. Is this ok for trunk? Thanks, Bill [gcc] 2014-08-20 Bill Schmidt * config/rs6000/altivec.h (vec_cpsgn): New #define. (vec_mergee): Likewise. (vec_mergeo)

[PATCH,rs6000] Add some more vector built-ins

couldn't come up with a magic sequence for multiply at this width. Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions. Is this ok for trunk? Thanks, Bill [gcc] 2014-08-26 Bill Schmidt * config/rs6000/altivec.h (vec_xl): New #define. (vec_xst): Lik

[PATCH, rs6000] A few more vector builtins

on powerpc64le-unknown-linux-gnu with no regressions. Ok for trunk? Thanks, Bill [gcc] 2014-08-29 Bill Schmidt * config/rs6000/rs6000-builtin.def (XVCVSXDDP_SCALE): New built-in definition. (XVCVUXDDP_SCALE): Likewise. (XVCVDPSXDS_SCALE): Likewise

[PATCH, rs6000] Correct optimization of VSX extract-load for little endian

e now-failing vsx-extract-1.c test. Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions. Ok for trunk? (This should eventually be backported to 4.8 and 4.9 as well...) Thanks, Bill [gcc] 2014-09-03 Bill Schmidt * config/rs6000/vsx.md (*vsx_extract_

[PATCH, rs6000] Handle vec_extract and splat patterns in analyze_swaps

[gcc] 2014-09-03 Bill Schmidt * config/rs6000/rs6000.c (special_handling_values): Add SH_EXTRACT. (rtx_is_swappable_p): Look for patterns with a VEC_SELECT, perhaps wrapped in a VEC_DUPLICATE, representing an extract. Mark these as swappable with special

[PATCH, rs6000] Add handling for UNSPEC_VSPLT_DIRECT to analyze_swaps

demonstrate the UNSPEC_VSPLT_DIRECT case. Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions. Ok for trunk? Thanks, Bill [gcc] 2014-09-06 Bill Schmidt * config/rs6000/rs6000.c (special_handling_values): Add SH_SPLAT. (rtx_is_swappable_p): Convert U

Re: libsanitizer merge from upstream r191666

Hi Kostya, As an aside, all of these asan tests have failed on powerpc64le-unknown-linux-gnu since we began testing that target. I have not yet had time to investigate why. Do you think there may be an implicit or explicit assumption anywhere that PowerPC64 is big endian? This is generally not s

[PATCH, rs6000] Enable VSX code generation in little endian mode

be committed until then. With that restriction, is this ok for trunk? Thanks, Bill 2013-11-05 Bill Schmidt * config/rs6000/rs6000.c (rs6000_option_override_internal): Remove restriction against use of VSX instructions when generating code for little endian mode

Re: [Patch, RTL] Eliminate redundant vec_select moves.

On Wed, 2013-11-06 at 15:01 +0100, Richard Biener wrote: > On Wed, Nov 6, 2013 at 2:24 PM, Tejas Belagod wrote: > > > > Hi, > > > > The attached patch eliminates moves of the form > > > > set( (reg:DI n) vec_select:DI ( (reg:V2DI n) (parallel [const 0] > > > > i.e. eliminates lower lan

Re: [Patch, RTL] Eliminate redundant vec_select moves.

On Wed, 2013-11-06 at 10:42 -0600, Bill Schmidt wrote: > On Wed, 2013-11-06 at 15:01 +0100, Richard Biener wrote: > > On Wed, Nov 6, 2013 at 2:24 PM, Tejas Belagod wrote: > > > > > > Hi, > > > > > > The attached patch eliminates moves o

Re: [Patch, RTL] Eliminate redundant vec_select moves.

On Wed, 2013-11-06 at 17:34 +, Richard Sandiford wrote: > Tejas Belagod writes: > > Richard Sandiford wrote: > >> Tejas Belagod writes: > >>> Richard Sandiford wrote: > Tejas Belagod writes: > > + /* This is big-endian-safe because the elements are kept in target > > + memo

Re: [PATCH] Optional alternative base_expr in finding basis for CAND_REFs

Hi Yufeng, The idea is a good one but I don't like your implementation of adding an extra expression parameter to look at on the find_basis_for_candidate lookup. This goes against the design of the pass and may not be sufficiently general (might there be situations where a third possible basis co

Re: [PATCH] Optional alternative base_expr in finding basis for CAND_REFs

Hi Yufeng, On Tue, 2013-11-12 at 22:34 +, Yufeng Zhang wrote: > Hi Bill, > > Many thanks for the review. > > I find your suggestion on using the next_interp field quite > enlightening. I prepared a patch which adds changes without modifying > the framework. With the patch, the slsr pass

Re: [PATCH] Optional alternative base_expr in finding basis for CAND_REFs

Hi Yufeng, On Wed, 2013-11-13 at 19:32 +, Yufeng Zhang wrote: > Hi Bill, > > On 11/13/13 18:04, Bill Schmidt wrote: > > Hi Yufeng, > > > > On Tue, 2013-11-12 at 22:34 +, Yufeng Zhang wrote: > >> Hi Bill, > >> > >> Many thanks for the

Re: [PATCH] Optional alternative base_expr in finding basis for CAND_REFs

Hi Yufeng, The second version of your original patch is ok with me with the following changes. Sorry for the little side adventure into the next-interp logic; in the end that's going to hurt more than it helps in this case. Thanks for having a look at it, anyway. Thanks also for cleaning up thi

[PATCH, rs6000] Correct programmer access to vperm for little endian

ls to little endian. Bootstrapped and tested on powerpc64{,le}-unknown-linux-gnu with no regressions. Is this ok for trunk? Thanks, Bill gcc: 2013-11-15 Bill Schmidt * config/rs6000/altivec.md (UNSPEC_VPERM_X, UNSPEC_VPERM_UNS_X): Remove. (altivec_vperm_): Revert ea

[PATCH, rs6000] Emit correct note for DWARF CFI information on LE prolog VSX stores

with that. Otherwise bootstrapped and tested on powerpc64-unknown-linux-gnu with no regressions on the big-endian side, also bootstrapped with --with-cpu=power7. Is this ok for trunk? Thanks, Bill 2011-11-16 Bill Schmidt * config/rs6000/rs6000.c (rs6000_frame_related): Add split_reg

[PATCH, rs6000] Fix libcpp/lex.c Altivec code to be correct for little endian

Bill Schmidt * lex.c (search_line_fast): Correct for little endian. Index: libcpp/lex.c === --- libcpp/lex.c(revision 204928) +++ libcpp/lex.c(working copy) @@ -559,8 +559,13 @@ search_line_fast (const uchar

[PATCH, rs6000] Fix V16QI vector splat for little endian

powerpc64{,le}-unknown-linux-gnu using --with-cpu=power7 with no regressions. Is this ok for trunk? Thanks, Bill 2013-11-19 Bill Schmidt * config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Adjust V16QI vector splat case for little endian. Index: gcc/config/rs6000/rs6000.c

[PATCH, rs6000] Correct vsx_set and vsx_extract patterns for little endian

d this test for little endian. Bootstrapped and tested on powerpc64{,le}-unknown-linux-gnu with no regressions. Is this ok for trunk? Thanks, Bill gcc: 2013-11-20 Bill Schmidt * config/rs6000/vsx.md (vsx_set_): Adjust for little endian. (vsx_extr

Re: [PATCH, rs6000] Correct vsx_set and vsx_extract patterns for little endian

On Wed, 2013-11-20 at 13:00 -0600, Bill Schmidt wrote: > Extracting element zero for big endian V2DI or V2DF mode is optimized > using the scalar register equivalence. Since we can similarly optimize > extraction of element one for big endian V2DI or V2DF mode,

[PATCH, rs6000] More vector LE cleanups

x27;t. Bootstrapped and tested on powerpc64{,le}-unknown-linux-gnu with no regressions. Is this ok for trunk? Thanks, Bill 2013-11-21 Bill Schmidt * config/rs6000/vector.md (vec_pack_trunc_v2df): Revert previous little endian change. (vec_pack_sfix_trunc_v2df): Lik

[PATCH, rs6000] Generate correct constant permutes using xxpermdi

this directly in the pattern for xxpermdi, because that pattern is used by the corresponding intrinsic. Bootstrapped and tested on powerpc64{,le}-unknown-linux-gnu with no regressions. Ok for trunk? Thanks, Bill 2013-11-22 Bill Schmidt * config/rs6000/rs6000.c (rs6000_expand_vec_perm_co

[PATCH, rs6000] Document issues with permutes for analyze_swaps

es successfully on powerpc64le-unknown-linux-gnu. Is this ok for trunk? Thanks, Bill 2014-10-05 Bill Schmidt * config/rs6000/rs6000.c (analyze_swaps commentary): Add discussion of permutes and why we don't handle them. Index: gcc/co

Re: [PATCH, rs6000] Remove splat calls with out-of-range arguments from gcc.dg/vmx/ops.c

Edelsohn wrote: > On Mon, Sep 29, 2014 at 1:27 PM, Bill Schmidt > wrote: > > Hi, > > > > While working on another patch, I observed that the test case > > gcc.dg/vmx/ops.c contains numerous calls to vec_splat and friends for > > which the second argument (the el

[PATCH, rs6000] Fix PR61542 - V4SF vector extract for little endian

Bill Schmidt * config/rs6000/vsx.md (vsx_extract_v4sf): Fix bug with element extraction other than index 3. Index: gcc/config/rs6000/vsx.md === --- gcc/config/rs6000/vsx.md(revision 211741) +++ gcc/config/rs6000

Re: [PATCH, rs6000] Fix PR61542 - V4SF vector extract for little endian

n 17, 2014 at 6:44 PM, BIll Schmidt > > wrote: > >> Hi, > >> > >> As described in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61542, a > >> new test case (gcc.dg/vect/vect-nop-move.c) was added in 4.9. This > >> exposes a bug on PowerPC little e

[PATCH, rs6000] Remove XFAIL of gfortran.dg/nint_2.f90 for powerpc64le

wild-carding to exclude it. Is this OK for trunk, 4.9, and 4.8? Thanks, Bill 2014-06-26 Bill Schmidt * gfortran.dg/nint_2.f90: Don't XFAIL for powerpc64le-*-linux*. Index: gcc/testsuite/gfortran.dg/nint_2.f90 === --

[PATCH, rs6000, testsuite] Skip gfortran.dg/round_4.f90 for PowerPC Linux

is supported by the PowerPC port, we should revisit this. Is this ok for trunk and 4.9? Thanks, Bill 2014-06-29 Bill Schmidt * gfortran.dg/round_4.f90: Skip for powerpc*-*-linux* since the test requires greater precision than the current PowerPC long double

Re: Reuse predicate code analysis for constraints

Hi Richard, Unfortunately this broke the Power builds: /home/wschmidt/gcc/gcc-mainline-base/gcc/config/rs6000/constraints.md:211: reference to unknown predicate 'mem_operand_gpr' /home/wschmidt/gcc/gcc-mainline-base/gcc/config/rs6000/constraints.md:242: reference to unknown predicate 'small_dat

Re: Fwd: PING^3: [PATCH]: New configure options that make the compiler use -fPIE and -pie as default option

Hi H.J., I tried your patch on powerpc64le-linux-gnu, and it fails to bootstrap as follows: > g++ -std=c++98 -c -g -DIN_GCC-fno-exceptions -fno-rtti > -fasynchronous-unwi > nd-tables -W -Wall -Wno-narrowing -Wwrite-strings -Wcast-qual -Wno-format > -Wmiss > ing-format-attribute -Woverload

Re: Fwd: PING^3: [PATCH]: New configure options that make the compiler use -fPIE and -pie as default option

Ah, never mind. I guess I need to run automake first. Bill On Tue, 2015-05-26 at 16:39 -0500, Bill Schmidt wrote: > Hi H.J., > > I tried your patch on powerpc64le-linux-gnu, and it fails to bootstrap > as follows: > > > g++ -std=c++98 -c -g -DIN_GCC-fno

[PATCH, 5.1, rs6000] Fix PR65787

ete I will investigate whether we need to backport this to 4.8 and 4.9 also. Thanks, Bill [gcc] 2015-04-16 Bill Schmidt PR target/65787 * config/rs6000/rs6000.c (rtx_is_swappable_p): Handle case where vec_extract operation is wrapped in a PARALLEL with a CL

Re: [PATCH, 5.1, rs6000] Fix PR65787

Note that Jakub requested a small change in the bugzilla commentary, which I've implemented. I'm doing a regstrap now. Bill On Thu, 2015-04-16 at 16:46 -0500, Bill Schmidt wrote: > Hi, > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65787 identifies an issue > where

Re: [PATCH, 5.1, rs6000] Fix PR65787

On Fri, 2015-04-17 at 07:27 -0500, Bill Schmidt wrote: > Note that Jakub requested a small change in the bugzilla commentary, > which I've implemented. I'm doing a regstrap now. > > Bill > Here's the revised and tested patch. OK for trunk and gcc-5-branch? Th

Re: [PATCH, 5.1, rs6000] Fix PR65787

On Fri, 2015-04-17 at 16:49 +0200, Jakub Jelinek wrote: > On Fri, Apr 17, 2015 at 08:28:02AM -0500, Bill Schmidt wrote: > > On Fri, 2015-04-17 at 07:27 -0500, Bill Schmidt wrote: > > > Note that Jakub requested a small change in the bugzilla commentary, > > > which I&#

Re: [PATCH, 5.1, rs6000] Fix PR65787

Hi, On Fri, 2015-04-17 at 10:02 -0500, Bill Schmidt wrote: > On Fri, 2015-04-17 at 16:49 +0200, Jakub Jelinek wrote: > > You have actually mailed the original patch again, not the revised one. > > > That said, PARALLEL seems to be already handled by rtx_is_swappable_p, > >

Re: [PATCH, 5.1, rs6000] Fix PR65787

handling a few lines earlier (both the added > > "if (special_op == SH_NONE) continue;" there and > > removal of " && special_op != SH_NONE". > > In particular, this is what I had in mind. > > 2015-04-17 Bill Schmidt > > PR tar

Re: [PATCH, 5.1, rs6000] Fix PR65787

On Fri, 2015-04-17 at 20:27 +0200, Jakub Jelinek wrote: > On Fri, Apr 17, 2015 at 01:06:22PM -0500, Bill Schmidt wrote: > > Yep, thanks -- I just finished testing that, and it fixes the problem > > with no regressions. Thanks for the help. > > > > Is this ok to commi

Re: [PATCH, rs6000] Force lvx and stvx for prologue saves and epilogue restores of Altivec regs

ut we should still be on the lookout for such behavior in the future. I'll commit this version after 5.1 is released, if there are no objections. Thanks, Bill 2015-04-20 Bill Schmidt * config/rs6000/altivec.md (*altivec_lvx__internal): Remove asterisk from name so t

[PATCH, rs6000, testsuite, committed] Clean up one more test for unaligned loads handling

Hi, Between the time my unaligned-loads patch was approved and trunk reopened for business, another test showed up that needs to be cleaned up in the same way as the others. This patch does that. Verified on powerpc64le-unknown-linux-gnu, committed as obvious. Thanks, Bill 2015-04-23 Bill

[PATCH, rs6000, committed] Change documentation of -mcrypto to reflect ISA 2.07B changes

Hi, The recently released POWER ISA 2.07B replaced Category:Vector.Crypto with Category:Vector.AES and Category:Vector.SHA2, which outdated the description of the -mcrypto option. This patch fixes that. Verified on powerpc64le-linux-gnu, committed as obvious. Thanks, Bill 2015-04-23 Bill

Re: [PATCH, rs6000, testsuite, PR65456] Changes for unaligned vector load/store support on POWER8

On Mon, 2015-04-27 at 14:23 +0800, Bin.Cheng wrote: > On Mon, Mar 30, 2015 at 1:42 AM, Bill Schmidt > wrote: > > > Index: gcc/testsuite/gcc.dg/vect/vect-33.c > > === > > --- gcc/testsuite/gcc.dg/vect

[PATCH, testsuite, committed] Remove spurious comment line from gcc.dg/vect/vect-33.c

AArch64. This patch removes the comment. Committed as obvious. Thanks, Bill 2015-04-28 Bill Schmidt * gcc.dg/vect/vect-33.c: Remove spurious line. Index: gcc/testsuite/gcc.dg/vect/vect-33.c === --- gcc/testsuite/gcc.dg

Re: [PATCH, rs6000, testsuite, PR65456] Changes for unaligned vector load/store support on POWER8

On Thu, 2015-04-30 at 18:26 +0800, Bin.Cheng wrote: > On Mon, Apr 27, 2015 at 9:26 PM, Bill Schmidt > wrote: > > On Mon, 2015-04-27 at 14:23 +0800, Bin.Cheng wrote: > >> On Mon, Mar 30, 2015 at 1:42 AM, Bill Schmidt > >> wrote: > > > >> >

Re: [PATCH,rs6000] Change -mcrypto to only affect Category:Vector.Crypto instructions

Hi David, I agree, and I'll fix the test as described and backport everywhere, assuming I don't encounter any problems. Thanks for catching this! Bill On Wed, 2015-04-29 at 09:21 -0400, David Edelsohn wrote: > On Wed, Mar 4, 2015 at 3:14 PM, Bill Schmidt > wrote: > >

[PATCH, rs6000, committed] gcc.target/powerpc/crypto-builtin-2.c only applies for power8-vector support

-unknown-linux-gnu, committed as obvious, and backported to 5.1, 4.9, and 4.8. Thanks, Bill 2015-04-30 Bill Schmidt * gcc.target/powerpc/crypto-builtin-2.c: Replace powerpc_vsx_ok with powerpc_p8vector_ok. Index: gcc/testsuite/gcc.target/powerpc/crypto-builtin-2.c

[PATCH, rs6000] Fix PR63673 -- missing prototype for vec_vsx_ld/vec_vsx_st

ght. This patch corrects the problem both for vec_vsx_ld and vec_vsx_st. Bootstrapped and tested on powerpc64-unknown-linux-gnu with no regressions. Ok for trunk, 4.9, and 4.8? Thanks, Bill 2014-11-20 Bill Schmidt * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Allow

[PATCH, rs6000] Fix PR65171

have one. Since this is a pretty obvious fix I would like to go forward with the patch, and add a test case at a later time, if that's ok with you. Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions. Is this ok for trunk? Thanks, Bill 2015-02-25 Bi

Re: [PATCH, rs6000, testsuite] Changes for unaligned vector load/store support on POWER8

On Thu, 2015-02-26 at 10:36 -0500, David Edelsohn wrote: > My one concern is the interaction between TARGET_ALLOW_MOVMISALIGN and > TARGET_EFFICIENT_UNALIGNED_VSX in the movmisalign pattern in > vector.md. Your patch changes > rs6000_builtin_support_vector_misalignment to return TRUE if > TARGET_

Re: [PATCH, rs6000, testsuite] Changes for unaligned vector load/store support on POWER8

On Thu, 2015-02-26 at 14:40 -0600, Bill Schmidt wrote: > On Thu, 2015-02-26 at 10:36 -0500, David Edelsohn wrote: > > > My one concern is the interaction between TARGET_ALLOW_MOVMISALIGN and > > TARGET_EFFICIENT_UNALIGNED_VSX in the movmisalign pattern in > > vector

Re: [PATCH, rs6000, testsuite] Changes for unaligned vector load/store support on POWER8

Hi, On Thu, 2015-02-26 at 16:48 -0600, Bill Schmidt wrote: > > Except this didn't pass regression testing. I'll continue to poke at > it. I figured out the issue here. My handling of the TARGET_ALLOW_MOVMISALIGN and TARGET_EFFICIENT_UNALIGNED_VSX macros was correct, bu

[PATCH,rs6000] Change -mcrypto to only affect Category:Vector.Crypto instructions

cates. Let me know if there's a better way. Ok for trunk once GCC 5 branches? I would eventually like to fix this in 4.8, 4.9, and 5 as well. Thanks, Bill [gcc] 2015-03-04 Bill Schmidt * config/rs6000/crypto.md (crypto_vpmsum): Change TARGET_CRYPTO to TARGET

[PATCH, rs6000, 4.9] Backport little endian swap optimization to 4.9

patch is straightforward backporting of the target-specific pieces and test cases. There have been a few infrastructural changes to adjust to, but nothing major. After this goes in, I'll work on taking it back to 4.8 as well. OK for 4.9? Thanks, Bill gcc: 2015-03-25 Bi

Re: [PATCH, rs6000, 4.9] Backport little endian swap optimization to 4.9

On Wed, 2015-03-25 at 17:56 -0400, David Edelsohn wrote: > On Wed, Mar 25, 2015 at 12:42 PM, Bill Schmidt > wrote: > > Hi, > > > > The POWER-specific little-endian swap optimization pass has been burning > > in on mainline since last August. Since then there have b

[PATCH, rs6000, 4.8] Fix V2DI/V2DF load/extract logic for LE

This patch corrects the bug and expands the test case to cover this case. Tested on powerpc64le-unknown-linux-gnu with no regressions. Ok for 4.8? Thanks, Bill [gcc] 2015-03-26 Bill Schmidt * config/rs6000/vsx.md (*vsx_extract__zero): Remove endianness requir

[PATCH, rs6000, 4.8]

atile registers and end up saving non-volatiles to the stack in the prologue, which generates load/swap sequences for now.) Tested on powerpc64le-unknown-linux-gnu with no regressions. Is this OK for 4.8? Thanks, Bill [gcc] 2015-03-26 Bill Schmidt Backport of r214242, r214254, an

Re: [PATCH, rs6000, 4.8] Backport little endian swap optimization to 4.8

Oops. Fixed post title. On Thu, 2015-03-26 at 10:23 -0500, Bill Schmidt wrote: > Hi, > > This is a follow-up to > https://gcc.gnu.org/ml/gcc-patches/2015-03/msg01310.html, which > backported the POWER-specific little-endian swap optimization pass to > the 4.9 branch. We als

[PATCH, rs6000, testsuite, PR65456] Changes for unaligned vector load/store support on POWER8

. Is this ok for trunk after 5 branches, and backports to 4.8, 4.9, 5 thereafter? Thanks, Bill [gcc] 2015-03-29 Bill Schmidt * config/rs6000/rs6000.c (rs6000_option_override_internal): For VSX + POWER8, enable TARGET_ALLOW_MOVMISALIGN and TARGET_EFFICIENT_UNALIGNED_VSX

Re: [PATCH, rs6000, testsuite, PR65456] Changes for unaligned vector load/store support on POWER8

Hi, David correctly pointed out offline that I used the wrong macro to test for efficient unaligned access. Here's a corrected version, which still fixes PR65456 without causing regressions. Sorry for the error! Thanks, Bill On Sun, 2015-03-29 at 12:42 -0500, Bill Schmidt wrote:

[PATCH, rs6000] Force lvx and stvx for prologue saves and epilogue restores of Altivec regs

, and adjusted the callers. Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions, and one fixed failure. Is this ok for trunk after 5.1 branches? I'd also like to backport this as far as 4.8 for the performance improvement. Thanks, Bill 2015-04-06 Bill Schmidt

[PATCH, rs6000, libstdc++] Add baseline_symbols.txt for powerpc64le-linux-gnu

s ok for stage4, or should I hold it until after 5.1 branches? (Apologies for attempting to send the whole file -- didn't see how large it was...) Thanks, Bill 2015-04-06 Bill Schmidt * config/abi/post/powerpc64le-linux-gnu/baseline_symbols.txt: New b

Re: [PATCH, rs6000, libstdc++] Add baseline_symbols.txt for powerpc64le-linux-gnu

On Tue, 2015-04-07 at 14:18 +0100, Jonathan Wakely wrote: > On 07/04/15 15:09 +0200, Jakub Jelinek wrote: > >On Mon, Apr 06, 2015 at 09:31:28PM -0500, Bill Schmidt wrote: > >> It was recently pointed out that we still don't have a separate > >> baseline_symbols.txt

Re: [PATCH, rs6000, libstdc++] Add baseline_symbols.txt for powerpc64le-linux-gnu

On Tue, 2015-04-07 at 09:49 -0400, David Edelsohn wrote: > On Tue, Apr 7, 2015 at 9:45 AM, Jakub Jelinek wrote: > > On Tue, Apr 07, 2015 at 08:39:37AM -0500, Bill Schmidt wrote: > >> Posted below the differences from powerpc64-linux-gnu. A surprising > >> number of a

Re: [PATCH, rs6000] Force lvx and stvx for prologue saves and epilogue restores of Altivec regs

On Tue, 2015-04-07 at 15:20 -0500, Segher Boessenkool wrote: > On Tue, Apr 07, 2015 at 11:11:37AM -0400, David Edelsohn wrote: > > This is okay after GCC 5 branches. But please insert a space between > > (void) and emit_insn when casting the result. > > Or get rid of the cast completely, it isn't

Re: [PATCH, rs6000, testsuite, PR65456] Changes for unaligned vector load/store support on POWER8

On Fri, 2015-06-12 at 17:36 +0100, Vidya Praveen wrote: > On Thu, Apr 30, 2015 at 01:34:18PM +0100, Bill Schmidt wrote: > > On Thu, 2015-04-30 at 18:26 +0800, Bin.Cheng wrote: > > > On Mon, Apr 27, 2015 at 9:26 PM, Bill Schmidt > > > wrote: > > > > On Mo

[4.8, testsuite] Correct backported fix to gcc.dg/vect/vect-33.c

l { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" { target { { ! powerpc*-*-* } || { ! vect_hw_misalign } } } } } */ which leaves things alone for other architectures. Ok for 4.8? Thanks, Bill 2015-06-15 Bill Schmidt * gcc.dg/vect/vect-33.c: Don&

Re: [4.8, testsuite] Correct backported fix to gcc.dg/vect/vect-33.c

I just was reading the gcc mailing list and realized that changes to 4.8 now require release manager approval. Adding Richard to the CC list for consideration. Thanks! Bill On Mon, 2015-06-15 at 14:54 -0500, Bill Schmidt wrote: > Hi, > > When I backported support for unaligned ve

Re: [PATCH] Altivec mulv4si3 and mulv8hi3 cleanup

FWIW, this patch looks good to me. Bill On Mon, 2015-06-15 at 18:15 -0400, David Edelsohn wrote: > POWER8 added a multiply instruction that makes mulv4si more efficient. > And vmladduhm can be used for mulv8hi3. This patch also changes > vmladduhm from a black box UNSPEC to descriptive RTL. > >

Re: [PATCH, rs6000, testsuite, PR65456] Changes for unaligned vector load/store support on POWER8

On Tue, 2015-06-16 at 14:37 +0100, Vidya Praveen wrote: > On Mon, Jun 15, 2015 at 08:14:31PM +0100, Bill Schmidt wrote: > > On Fri, 2015-06-12 at 17:36 +0100, Vidya Praveen wrote: > > > On Thu, Apr 30, 2015 at 01:34:18PM +0100, Bill Schmidt wrote: > > > > On

[PATCH, rs6000] Fix PR65914

powerpc64le-unknown-linux-gnu with no regressions. Is this ok for trunk? After it burns in, I would propose to backport it to GCC 5.1 and GCC 4.9 (when the tree is open). Thanks, Bill [gcc] 2015-05-19 Bill Schmidt * config/rs6000/predicates.md (altivec_register_operand): Permit

Re: [PATCH, rs6000] Fix PR65914

On Sat, 2015-06-20 at 13:37 -0700, Mike Stump wrote: > On Jun 19, 2015, at 5:36 PM, David Edelsohn wrote: > > Maybe you should ask Richi or Jakub about the testcase because you are > > placing it in a non-target-specific location. It should succeed on > > all targets, but it may expose latent bug

Re: [PATCH, rs6000] Fix PR65914

On Fri, 2015-06-19 at 20:36 -0400, David Edelsohn wrote: > On Fri, Jun 19, 2015 at 6:35 PM, Bill Schmidt > wrote: > > Hi, > > > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65914 demonstrates that we > > fail to match vector predicates with pseudos that are in

[PATCH, rs6000] Add more overloaded built-ins for vec_cmpge and vec_cmple

lify-rtx.c. Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions. Ok for trunk? Thanks, Bill [gcc] 2015-06-29 Bill Schmidt * config/rs6000/rs6000-builtin.def (CMPGE_16QI): New built-in definition. (CMPGE_8HI): Likewise. (CMPGE_4SI)

[PATCH] Simplify vector compare-not-select sequence

remove the logical NOT by reversing the outcomes of the select. I've added a POWER-specific test case that demonstrates that the issue is fixed. Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions. Is this ok for trunk? Thanks, Bill [gcc] 2015-07-06 Bill Sc

Re: [RFC] POWER8 default for PPC64LE

Hi David, Something's not quite right here -- we've been having bootstrap failures with BE and LE PPC64 Linux. Maybe a missing include? g++ -c -g -DIN_GCC-fno-exceptions -fno-rtti -fasynchronous-unwind-tables - W -Wall -Wno-narrowing -Wwrite-strings -Wcast-qual -Wno-format -Wmissing-format

Re: [RFC] POWER8 default for PPC64LE

On Fri, 2015-01-16 at 09:52 -0600, Bill Schmidt wrote: > Hi David, > > Something's not quite right here -- we've been having bootstrap failures > with BE and LE PPC64 Linux. Maybe a missing include? Correction, just on LE. The issue on BE was a different failure. >

[PATCH, rs6000, testsuite] Changes for unaligned vector load/store support on POWER8

but pending that, will this be ok for trunk? After it burns in I would like to backport it to 4.8, 4.9, and 5. Thanks! Bill [gcc] 2015-01-23 Bill Schmidt * config/rs6000/rs6000.c (rs6000_builtin_mask_for_load): Return 0 for POWER8 so that the vectorizer will use direct un

[PATCH, rs6000] Allow swap removal for convert-splat idiom

original code. Is this ok for trunk after GCC 5 branches? I would also like to backport it to GCC 5 subsequently. Thanks, Bill [gcc] 2015-01-25 Bill Schmidt * config/rs6000/rs6000.c (rtx_is_swappable_p): Commentary adjustments. (insn_is_swappable_p): Return 1 for a

Re: [PATCH, rs6000, testsuite] Changes for unaligned vector load/store support on POWER8

Hi David, Sorry I haven't gotten back to this sooner. I've tried to address your comments about the previous patch. Please let me know if I'm off base. Test results are the same as previously. Thanks, Bill [gcc] 2015-02-10 Bill Schmidt * config/

Re: [PATCH 10/11][RS6000] Migrate reduction optabs to reduc_..._scal

On Fri, 2014-10-24 at 19:49 -0400, David Edelsohn wrote: > On Fri, Oct 24, 2014 at 8:06 AM, Alan Lawrence wrote: > > This migrates the reduction patterns in altivec.md and vector.md to the new > > names. I've not touched paired.md as I wasn't really sure how to fix that > > (how do I vec_extractv2

Re: [PATCH 10/11][RS6000] Migrate reduction optabs to reduc_..._scal

ince the reductions are being done on byte values. (Each word in the vector result is the sum of the corresponding four byte values in the vector source, added to the other value, which here is zero.) Thanks, Bill > > A. > > Bill Schmidt wrote: > > On Fri, 2014-10-24 at 19:49 -

Re: [PATCH GCC]Correct cand_chain and stmt_cand_map for copy/cast

On 5/15/19 6:09 AM, Richard Biener wrote: > On Wed, May 15, 2019 at 7:54 AM bin.cheng wrote: >> Hi, >> I noticed that cand_chain (first_interp/next_interp) is not maintained >> correctly >> in slsr_process_copy/slsr_process_cast (now slsr_process_copycast). This one >> fixes the issue, as well a

Re: [PATCH PR57534]Support strength reduction for MEM_REF in slur

Hi Bin, On 5/16/19 11:00 AM, Bin.Cheng wrote: > On Thu, May 16, 2019 at 11:50 PM Bill Schmidt wrote: >> Thanks, Bin and Richard -- I am out of the office until Tuesday, so will >> review >> when I get back. Bin, please CC me on SLSR patches as otherwise I might miss >&

[PATCH] rs6000: Infrastructure for future arch

represent a future architecture level, as yet unnamed. [gcc] 2019-05-22 Bill Schmidt Michael Meissner Segher Boessenkool * config.gcc: Add future cpu. * config.in (HAVE_AS_FUTURE): New #define. * config/rs6000/driver-rs6000.c (asm_names

[PATCH] rs6000: Add basic infrastructure for PC-relative addressing

function. Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions. Is this okay for trunk? Thanks, Bill 2019-05-22 Bill Schmidt Michael Meissner Segher Boessenkool * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Add

[PATCH] rs6000: One more bit of PC-relative enablement

Hi, My last patch was a result of refactoring, and I missed one important line. Bootstrapped and tested on powerpc64le-unknown-linux-gnu; okay for turnk with the other patch? Thanks, Bill 2019-05-22 Bill Schmidt Michael Meissner * config/rs6000/rs6000.c

[PATCH] rs6000: Entry point generation for functions using PC-relative addressing

-gnu with no regressions. Is this okay for trunk? Thanks, Bill [gcc] 2019-05-22 Bill Schmidt * config/rs6000/rs6000.c (rs6000_global_entry_point_needed_p): Return false for PC-relative functions. (rs6000_output_function_prologue): Emit ".localentry name,1" for

Re: [PATCH] rs6000: Infrastructure for future arch

On 5/22/19 6:05 PM, Segher Boessenkool wrote: > Hi Bill, > > On Wed, May 22, 2019 at 12:51:50PM -0500, Bill Schmidt wrote: >> +/* Define if your assembler supports FUTURE instructions. */ >> +#ifndef USED_FOR_TARGET >> +#undef HAVE_AS_FUTURE >> +#endif > Let

Re: [PATCH] rs6000: Infrastructure for future arch

On 5/22/19 8:54 PM, Alan Modra wrote: > On Wed, May 22, 2019 at 12:51:50PM -0500, Bill Schmidt wrote: >> * config/rs6000/rs6000.c (rs6000_option_override_internal): Treat >> PROCESSOR_FUTURE similarly to PROCESSOR_POWER9 for now. >> (rs6000_machine_from_flag

Re: [PATCH] rs6000: Add basic infrastructure for PC-relative addressing

On 5/22/19 3:29 PM, Bill Schmidt wrote: > Hi, > > This patch adds basic infrastructure support to enable PC-relative addressing. > It adds the -mpcrel / -mno-pcrel option (defaulted on for -mcpu=future, > otherwise > off), and provides a couple of interfaces to determine w

[PATCH v2] rs6000: Infrastructure for future arch

this okay for trunk? Thanks, Bill Add infrastructure to support -mcpu=future to represent a future architecture level, as yet unnamed. [gcc] 2019-05-23 Bill Schmidt Michael Meissner Segher Boessenkool * config.gcc: Add future cpu. * config/rs6000

Re: [PATCH] rs6000: Add basic infrastructure for PC-relative addressing

On 5/23/19 4:27 AM, Segher Boessenkool wrote: > Hi! > > On Wed, May 22, 2019 at 03:29:17PM -0500, Bill Schmidt wrote: >> + /* -mpcrel requires the prefixed load/store support on FUTURE systems. */ >> + if (!TARGET_FUTURE && TARGET_PCREL) >> +{ >&

Re: [PATCH] rs6000: Entry point generation for functions using PC-relative addressing

On 5/23/19 6:06 AM, Segher Boessenkool wrote: > Hi! > > On Wed, May 22, 2019 at 06:39:55PM -0500, Bill Schmidt wrote: >> @@ -26191,6 +26191,10 @@ rs6000_global_entry_point_needed_p (void) >>if (TARGET_SINGLE_PIC_BASE) >> return false; >> >> + /*

[PATCH v2] rs6000: Entry point generation for functions using PC-relative addressing

decl off of paths where it will not be executed, per previous comments by Segher. Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions. Is this okay for trunk? Thanks! Bill [gcc] 2019-05-23 Bill Schmidt * config/rs6000/rs6000.c

[PATCH] Add LABEL_REF_P to rtl.h

Hi, This patch just adds a convenience macro to be used in subsequent patches. Bootstrapped successfully on powerpc64le-unknown-linux-gnu. Okay for trunk? Thanks, Bill 2019-05-23 Michael Meissner * rtl.h (LABEL_REF_P): New #define. Index: gcc/rtl.h ==

[PATCH} rs6000: Enable PC-relative by default and test

[gcc] 2019-05-23 Bill Schmidt Michael Meissner * config/rs6000/rs6000-cpus.def (OTHER_FUTURES_MASK): New #define. [gcc/testsuite] 2019-05-23 Bill Schmidt * gcc.target/powerpc/pcrel-detect-1.c: New file. diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc

[PATCH] rs6000: Call flow implementation for PC-relative addressing

Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions. Is this okay for trunk? Thanks! Bill [gcc] 2019-05-23 Bill Schmidt Alan Modra * config/rs6000/rs6000.c (rs6000_call_template_1): Handle pcrel calls here... (rs6000_indirect_ca

Re: [PATCH] rs6000: Call flow implementation for PC-relative addressing

Hm, I got ahead of myself on this one.  I haven't done the regstrap yet, so please hold off reviewing for now. Sorry for the noise.  I shouldn't post when I'm tired... Thanks, Bill On 5/23/19 9:11 PM, Bill Schmidt wrote: > Hi, > > This patch contains the changes to im

Re: [PATCH] rs6000: Call flow implementation for PC-relative addressing

New test case ICEs, so consider this withdrawn.  Sorry again about this. Bill On 5/23/19 9:17 PM, Bill Schmidt wrote: > Hm, I got ahead of myself on this one.  I haven't done the regstrap yet, > so please hold off reviewing for now. > > Sorry for the noise.  I shouldn'

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