Reverted. (was Re: [PATCH v4] libstdc++: stringstream ctors from string_view [PR119741])

2025-06-04 Thread Nathan Myers
On 6/4/25 20:30, H.J. Lu wrote: On Wed, Jun 4, 2025 at 8:02 PM Jonathan Wakely wrote: On Thu, 29 May 2025 at 20:30, Nathan Myers wrote: Change in V4: * Rename tests to string_view.cc * Adapt tests to cons/wchar_t directories * Define symbol __cpp_lib_sstream_from_string_view as 202406

[PATCH v1] RISC-V: Fix ICE for gcc.dg/graphite/pr33576.c with rv32gcv

2025-06-04 Thread pan2 . li
From: Pan Li The div of rvv has not such insn v2 = div (vec_dup (x), v1), thus the generated rtl like that hit the unreachable assert when expand insn. This patch would like to remove op div from the binary op form (vec_dup (x), v) to avoid pattern matching by mistake. No new test introduced as

Re: [PATCH] real: Fix up real_from_integer [PR120547]

2025-06-04 Thread Richard Biener
> Am 04.06.2025 um 23:04 schrieb Jakub Jelinek : > > Hi! > > The function has 2 problems, one is _BitInt specific and the other is > most likely also reproduceable only with it. > > The first issue is that I've missed updating the function for _BitInt, > maxbitlen as MAX_BITSIZE_MODE_ANY_INT

[PATCH] [x86] [PR103750] Also handle avx512 kmask & immediate 15 or 3 when VF is 4/2.

2025-06-04 Thread liuhongt
like r16-105-g599bca27dc37b3, the patch handles redunduant clean up of upper-bits for maskload. .i.e Successfully matched this instruction: (set (reg:V4DF 175) (vec_merge:V4DF (unspec:V4DF [ (mem:V4DF (plus:DI (reg/v/f:DI 155 [ b ]) (reg:DI 143 [ ivtmp.56

Re: [PATCH] widening_mul: Make better use of overflowing operations in codegen of min/max(a, add/sub(a, b))

2025-06-04 Thread Dhruv Chawla
On 04/06/25 23:14, Andrew Pinski wrote: External email: Use caution opening links or attachments On Wed, Jun 4, 2025 at 6:27 AM Richard Biener wrote: On Thu, May 29, 2025 at 10:04 AM wrote: From: Dhruv Chawla This patch folds the following patterns: - max (a, add (a, b)) -> [sum, ovf] =

[PATCH] PR target/120528 -- Simplify zero extend from memory to VSX register on power10

2025-06-04 Thread Michael Meissner
Previously GCC would zero extend a DImode value in memory to a TImode target in a vector register by firt zero extending the DImode value into a GPR TImode register pair, and then do a MTVSRDD to move this value to a VSX register. For example, consider the following code: #ifndef TYPE

Re: [PATCH v1] RISC-V: Fix ICE for gcc.dg/graphite/pr33576.c with rv32gcv

2025-06-04 Thread 钟居哲
LGTM juzhe.zh...@rivai.ai From: pan2.li Date: 2025-06-05 13:01 To: gcc-patches CC: juzhe.zhong; kito.cheng; jeffreyalaw; rdapp.gcc; ken.chen; hongtao.liu; Pan Li Subject: [PATCH v1] RISC-V: Fix ICE for gcc.dg/graphite/pr33576.c with rv32gcv From: Pan Li The div of rvv has not such insn v2

Re: [PATCH v6 6/8] libstdc++: Implement layout_stride from mdspan.

2025-06-04 Thread Daniel Krügler
Am Mi., 4. Juni 2025 um 17:18 Uhr schrieb Luc Grosheintz < luc.groshei...@gmail.com>: > Implements the remaining parts of layout_left and layout_right; and all > of layout_stride. > > The implementation of layout_stride::mapping::is_exhaustive applies > the following change to the standard: > >

[PATCH, V3] PR target/108958 -- simplify mtvsrdd to zero extend GPR DImode to VSX TImode

2025-06-04 Thread Michael Meissner
Before this patch GCC would zero extend a DImode GPR value to TImode by first zero extending the DImode value into a GPR TImode register pair, and then do a MTVSRDD to move this value to a VSX register. For example, consider the following code: #ifndef TYPE #define TYPE unsigned l

Re: [PATCH] widening_mul: Make better use of overflowing operations in codegen of min/max(a, add/sub(a, b))

2025-06-04 Thread Dhruv Chawla
On 30/05/25 13:35, Andrew Pinski wrote: External email: Use caution opening links or attachments On Thu, May 29, 2025 at 1:05 AM wrote: From: Dhruv Chawla This patch folds the following patterns: - max (a, add (a, b)) -> [sum, ovf] = addo (a, b); !ovf ? sum : a - max (a, sub (a, b)) -> [su

Ping: PR 99293: Optimize splat of a V2DF/V2DI extract with constant element

2025-06-04 Thread Michael Meissner
Ping patch for PR target/99293 https://gcc.gnu.org/pipermail/gcc-patches/2025-May/683038.html -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA, 01432 email: meiss...@linux.ibm.com

Re: [PATCH] ranger: Add support for float <-> float casts [PR120231]

2025-06-04 Thread Aldy Hernandez
Andrew MacLeod writes: > Fine with me.  I don't think Aldy got to many of the cast conversions. None is the right answer :). Thanks Jakub. Aldy

[PATCH 2/7] RISC-V: Support Smrnmi extension.

2025-06-04 Thread Jiawei
Support the Smrnmi extension, which provides new CSRs for Machine mode Non-Maskable Interrupts. gcc/ChangeLog: * config/riscv/riscv-ext.def: New extension definition. * config/riscv/riscv-ext.opt: New extension mask. * doc/riscv-ext.texi: Document the new extension. gcc/t

[PATCH 0/7] Support privileged RISC-V extensions

2025-06-04 Thread Jiawei
These patches add support for several privileged RISC-V extensions, including Sm/scsrind, Smrnmi, Ssccptr, Sscounterenw, Sstvala, Sstvecd, and Ssu64xl. The CSRs definition in Binutils part, and gcc part just let the compiler and user know these extensions are supported. Jiawei (7): RISC-V: Supp

[PATCH 4/7] RISC-V: Support Sscounterenw extension.

2025-06-04 Thread Jiawei
Support the Sscounterenw extension, which allows writeable enables for any supported counter. gcc/ChangeLog: * config/riscv/riscv-ext.def: New extension definition. * config/riscv/riscv-ext.opt: New extension mask. * doc/riscv-ext.texi: Document the new extension.

[PATCH 7/7] RISC-V: Support Ssu64xl extension.

2025-06-04 Thread Jiawei
Support the Ssu64xl extension, which requires UXLEN to be 64. gcc/ChangeLog: * config/riscv/riscv-ext.def: New extension definition. * config/riscv/riscv-ext.opt: New extension mask. * doc/riscv-ext.texi: Document the new extension. gcc/testsuite/ChangeLog: * gcc

[PATCH 1/7] RISC-V: Support Sm/scsrind extensions.

2025-06-04 Thread Jiawei
Support the Sm/scsrind extensions, which provide indirect access to machine-level CSRs. gcc/ChangeLog: * config/riscv/riscv-ext.def: New extension definition. * config/riscv/riscv-ext.opt: New extension mask. * doc/riscv-ext.texi: Document the new extension. gcc/testsuite

[PATCH 5/7] RISC-V: Support Sstvala extension.

2025-06-04 Thread Jiawei
Support the Sstvala extension, which provides all needed values in Supervisor Trap Value register (stval). gcc/ChangeLog: * config/riscv/riscv-ext.def: New extension definition. * config/riscv/riscv-ext.opt: New extension mask. * doc/riscv-ext.texi: Document the new extens

[PATCH 3/7] RISC-V: Support Ssccptr extension.

2025-06-04 Thread Jiawei
Support the Ssccptr extension, which allows the main memory to support page table reads. gcc/ChangeLog: * config/riscv/riscv-ext.def: New extension definition. * config/riscv/riscv-ext.opt: New extension mask. * doc/riscv-ext.texi: Document the new extension. gcc/testsuit

[PATCH 6/7] RISC-V: Support Sstvecd extension.

2025-06-04 Thread Jiawei
Support the Sstvecd extension, which allows Supervisor Trap Vector Base Address register (stvec) to support Direct mode. gcc/ChangeLog: * config/riscv/riscv-ext.def: New extension definition. * config/riscv/riscv-ext.opt: New extension mask. * doc/riscv-ext.texi: Document

Re: [PATCH] i386: Fix vmovvdup's mem attribute

2025-06-04 Thread Uros Bizjak
On Thu, Jun 5, 2025 at 3:29 AM Hu, Lin1 wrote: > > Hi, > > Some vmovvdup pattern's type attribute is sselog1 and then mem attribute is > both. Modify type attribute according to other patterns about vmovvdup. > > Bootstrapped and regtested on x86_64-linux-pc-gnu, OK for trunk? OK. Thanks, Uros.

Re: [PATCH] widening_mul: Make better use of overflowing operations in codegen of min/max(a, add/sub(a, b))

2025-06-04 Thread Richard Biener
On Wed, Jun 4, 2025 at 7:44 PM Andrew Pinski wrote: > > On Wed, Jun 4, 2025 at 6:27 AM Richard Biener > wrote: > > > > On Thu, May 29, 2025 at 10:04 AM wrote: > > > > > > From: Dhruv Chawla > > > > > > This patch folds the following patterns: > > > - max (a, add (a, b)) -> [sum, ovf] = addo (a,

Re: [PATCH 0/7] Support privileged RISC-V extensions

2025-06-04 Thread Kito Cheng
LGTM :) On Thu, Jun 5, 2025 at 2:21 PM Jiawei wrote: > > These patches add support for several privileged RISC-V extensions, including > Sm/scsrind, Smrnmi, Ssccptr, Sscounterenw, Sstvala, Sstvecd, and Ssu64xl. > > The CSRs definition in Binutils part, and gcc part just let the compiler and > use

Re: RISC-V frm mode switching and late_combine2

2025-06-04 Thread Vineet Gupta
On 6/4/25 04:45, Richard Sandiford wrote: > I think the issue is that: > > (insn 9 8 27 2 (parallel [ > (asm_operands/v ("fsrm %0") ("") 0 [ > (reg:SI 15 a5 [139]) > ] > [ > (asm_inp

[pushed] c++: constexpr prvalues vs genericize [PR120502]

2025-06-04 Thread Jason Merrill
Tested x86_64-pc-linux-gnu, applying to trunk. -- 8< -- Here constexpr evaluation was getting confused by the result of split_nonconstant_init, which leaves an INIT_EXPR from an empty CONSTRUCTOR to be followed by member initialization. As a result CONSTRUCTOR_NO_CLEARING was set for the time_zo

Re: [PATCH 5/6] RISC-V: frm/mode-switch: Reduce FRM restores on DYN transition

2025-06-04 Thread Vineet Gupta
On 6/4/25 10:36, Jeff Law wrote: > On 5/9/25 2:27 PM, Vineet Gupta wrote: >> FRM mode switching state machine has DYN as default state which it also >> fallsback to after transitioning to other states such as DYN_CALL. >> Currently TARGET_MODE_EMIT generates a FRM restore on any transition to >> DY

Re: [PATCH v2] ext-dce: Don't refine live width with SUBREG mode if !TRULY_NOOP_TRUNCATION_MODES_P [PR 120050]

2025-06-04 Thread Jeff Law
On 6/4/25 9:40 AM, Xi Ruoyao wrote: On Wed, 2025-05-28 at 18:17 +0100, Richard Sandiford wrote: Sorry for the slow reply, had a few days off. Xi Ruoyao writes: If we see a promoted subreg and TRULY_NOOP_TRUNCATION says the truncation is not a noop, then all bits of the inner reg are live. 

Re: [PATCH] ext-dce: Only transform extend to subreg if TRULY_NOOP_TRUNCATION [PR 120050]

2025-06-04 Thread Jeff Law
On 5/12/25 5:59 AM, Richard Sandiford wrote: Xi Ruoyao writes: The tranform would be unsafe if !TRULY_NOOP_TRUNCATION because on these machines the hardware may look at bits outside of the given mode. gcc/ChangeLog: PR rtl-optimization/120050 * ext-dce.cc (ext_dce_try_optim

Re: RISC-V frm mode switching and late_combine2

2025-06-04 Thread Jeff Law
On 6/3/25 11:11 AM, Richard Sandiford wrote: Vineet Gupta writes: On 6/3/25 08:24, Richard Sandiford wrote: I think the issue is that: (insn 9 8 27 2 (parallel [ (asm_operands/v ("fsrm %0") ("") 0 [ (reg:SI 15 a5 [139]) ]

SPEC2017 526 blender regression (was Re: [PATCH v2 1/2] RISC-V: Add pattern for vector-scalar multiply-add/sub [PR119100])

2025-06-04 Thread Vineet Gupta
Hi Paul, On 5/30/25 03:04, Paul-Antoine Arras wrote: > This pattern enables the combine pass (or late-combine, depending on the case) > to merge a vec_duplicate into a plus-mult or minus-mult RTL instruction. > > Before this patch, we have two instructions, e.g.: > vfmv.v.fv6,fa0 > vfm

Re: SPEC2017 526 blender regression (was Re: [PATCH v2 1/2] RISC-V: Add pattern for vector-scalar multiply-add/sub [PR119100])

2025-06-04 Thread Paul-Antoine Arras
Hi Vineet, On 04/06/2025 20:29, Vineet Gupta wrote: Hi Paul, On 5/30/25 03:04, Paul-Antoine Arras wrote: This pattern enables the combine pass (or late-combine, depending on the case) to merge a vec_duplicate into a plus-mult or minus-mult RTL instruction. Before this patch, we have two instr

[PATCH] libstdc++: Fix std::format thousands separators when sign present [PR120548]

2025-06-04 Thread Jonathan Wakely
The leading sign character should be skipped when deciding whether to insert thousands separators into a floating-point format. libstdc++-v3/ChangeLog: PR libstdc++/120548 * include/std/format (__formatter_fp::_M_localize): Do not * include a leading sign character in the

Re: SPEC2017 526 blender regression (was Re: [PATCH v2 1/2] RISC-V: Add pattern for vector-scalar multiply-add/sub [PR119100])

2025-06-04 Thread Paul-Antoine Arras
On 04/06/2025 20:43, Vineet Gupta wrote: On 6/4/25 11:34, Paul-Antoine Arras wrote: Hi Vineet, On 04/06/2025 20:29, Vineet Gupta wrote: Hi Paul, On 5/30/25 03:04, Paul-Antoine Arras wrote: This pattern enables the combine pass (or late-combine, depending on the case) to merge a vec_duplicate

Re: SPEC2017 526 blender regression (was Re: [PATCH v2 1/2] RISC-V: Add pattern for vector-scalar multiply-add/sub [PR119100])

2025-06-04 Thread Vineet Gupta
On 6/4/25 11:34, Paul-Antoine Arras wrote: > Hi Vineet, > > On 04/06/2025 20:29, Vineet Gupta wrote: >> Hi Paul, >> >> On 5/30/25 03:04, Paul-Antoine Arras wrote: >>> This pattern enables the combine pass (or late-combine, depending on the >>> case) >>> to merge a vec_duplicate into a plus-mult or

Re: [PATCH] libstdc++: Implement P0849R8 auto(x) library changes

2025-06-04 Thread Patrick Palka
On Wed, 5 Mar 2025, Patrick Palka wrote: > On Wed, 5 Mar 2025, Patrick Palka wrote: > > > On Thu, 24 Oct 2024, Jonathan Wakely wrote: > > > > > On Wed, 9 Oct 2024 at 14:02, Patrick Palka wrote: > > > > > > > > On Mon, 7 Oct 2024, Patrick Palka wrote: > > > > > > > > > Tested on x86_64-pc-linux-

[committed v2] libstdc++: Make system_clock::to_time_t always_inline [PR99832]

2025-06-04 Thread Jonathan Wakely
For some 32-bit targets Glibc supports changing the size of time_t to be 64 bits by defining _TIME_BITS=64. That causes an ABI change which would affect std::chrono::system_clock::to_time_t. Because to_time_t is not a function template, its mangled name does not depend on the return type, so it has

[PATCH] OpenMP: Fix regressions in metadirective-target-device-2.c [PR120518]

2025-06-04 Thread Sandra Loosemore
My previous patch that added a CLEANUP_POINT_EXPR around the device_num selector expression in the C++ front end broke the testcase c-c++-common/gomp/metadirective-target-device-2.c on offload targets. It confused the code in omp_device_num_check that tries to bypass error checking and do early res

Re: [PATCH] OpenMP: Fix regressions in metadirective-target-device-2.c [PR120518]

2025-06-04 Thread Tobias Burnus
Sandra Loosemore wrote: gcc/ChangeLog PR c++/120518 * omp-general.cc (omp_device_num_check): Look inside a CLEANUP_POINT_EXPR when trying to optimize special cases. LGTM. Thanks, Tobias […] + tree t = *device_num; + if (TREE_CODE (t) == CLEANUP_POINT_EXPR) +t =

Re: [PATCH 2/4] c++/modules: Implement streaming of uncontexted TYPE_DECLs [PR98735]

2025-06-04 Thread Jason Merrill
On 5/26/25 8:55 AM, Nathaniel Shead wrote: On Fri, May 23, 2025 at 11:31:26AM -0400, Jason Merrill wrote: On 5/21/25 10:15 PM, Nathaniel Shead wrote: Another approach would be to fix 'write_class_def' to handle these declarations better, but that ended up being more work and felt fragile. It al

Re: [PATCH] xtensa: Implement l(ceil|floor|round|)sfsi2 insn patterns and their scaled variants

2025-06-04 Thread Max Filippov
Hi Suwa-san, On Tue, Jun 3, 2025 at 7:44 AM Takayuki 'January June' Suwa wrote: > > By using the previously unused CEIL|FLOOR|ROUND.S floating-point coprocessor > instructions. In addition, two instruction operand format codes are added > to output the scale value as assembler source. > > /

Re: [PATCH] libstdc++: Fix formatting of 3-digits months, day, weekday and hour [PR120481]

2025-06-04 Thread Jonathan Wakely
On 02/06/25 13:19 +0200, Tomasz Kamiński wrote: This patch fixes the handle multiple digits values for the month, day, weekday and hour, when used with the %m, %d, %e, %m, %u, %w, %H, and %D, %F specifiers. The values are now printed unmodified. This patch also fixes printing negative year with

[PATCH] real: Fix up real_from_integer [PR120547]

2025-06-04 Thread Jakub Jelinek
Hi! The function has 2 problems, one is _BitInt specific and the other is most likely also reproduceable only with it. The first issue is that I've missed updating the function for _BitInt, maxbitlen as MAX_BITSIZE_MODE_ANY_INT + HOST_BITS_PER_WIDE_INT obviously isn't guaranteed to be larger than

[committed] libstdc++: Skip time zone format testing for COW std::string

2025-06-04 Thread Jonathan Wakely
This is needed when testing with -D_GLIBCXX_USE_CXX11_ABI=0 to fix: FAIL: std/time/format/empty_spec.cc -std=gnu++20 (test for excess errors) libstdc++-v3/ChangeLog: * testsuite/std/time/format/empty_spec.cc: Only test time zones for cxx11 string ABI. --- Pushed to trunk. libs

Re: simple frm save/restore strategy (was Re: [PATCH 3/6] RISC-V: frm/mode-switch: remove dubious frm edge insertion before call_insn)

2025-06-04 Thread Vineet Gupta
On 6/4/25 10:40, Jeff Law wrote: > > On 5/23/25 12:22 PM, Vineet Gupta wrote: > >> 3. NOK: We loose the ability to instrument local RM writes - especially in >> the >> testsuite. >>   e.g. >>      a.  instrinsic setting a static RM >> b. get_frm() to ensure that happened (inline asm to rea

[PATCH] More use MEM_EXPR only if MEM_P is true

2025-06-04 Thread H.J. Lu
On Wed, Jun 4, 2025 at 4:13 PM Richard Sandiford wrote: > > Richard Biener writes: > > On Wed, Jun 4, 2025 at 7:28 AM H.J. Lu wrote: > >> > >> On s390x, for input: > >> > >> (call_insn/u 7 6 11 2 (parallel [ > >> (set (reg:SI 2 %r2) > >> (call (subreg:QI (symbol_ref:S

[PATCH] aarch64: Add testcase for vld2 which was fixed by r16-1113 [PR89606]

2025-06-04 Thread Andrew Pinski
This aarch64 specific vld2 intrinsics testcase was fixed by r16-1113-g069caa5cea91f (simple copy propagation for aggregates). I didn't include it in the original patch as I was testing on x86_64 but I got around to testing this and now we don't have any more extra movs so let's add a testcase. Te

Re: SPEC2017 526 blender regression (was Re: [PATCH v2 1/2] RISC-V: Add pattern for vector-scalar multiply-add/sub [PR119100])

2025-06-04 Thread Vineet Gupta
On 6/4/25 11:43, Vineet Gupta wrote: > On 6/4/25 11:34, Paul-Antoine Arras wrote: >> Hi Vineet, >> >> On 04/06/2025 20:29, Vineet Gupta wrote: >>> Hi Paul, >>> >>> On 5/30/25 03:04, Paul-Antoine Arras wrote: This pattern enables the combine pass (or late-combine, depending on the case

[PATCH 2/2] libstdc++: Add assertions to atomic waiting functions that need platform wait

2025-06-04 Thread Jonathan Wakely
These overloads should never be used for proxy waits, so add assertions to ensure that they aren't used accidentally. The reason they can't be used is that they don't call __args._M_setup_wait to obtain a __wait_state pointer. Even if that was changed, they would wait on a proxy wait which is pote

[PATCH 1/2] libstdc++: Optimize std::counting_semaphore for futex path

2025-06-04 Thread Jonathan Wakely
Rename __semaphore_base to __semaphore_impl, because it's not used as a base class. Replace the three identical lambda expressions with a named class, __semaphore_impl::_Can_acquire, which stores the most recent value of the counter as a data member. Add a new __platform_semaphore_impl class templ

Re: simple frm save/restore strategy (was Re: [PATCH 3/6] RISC-V: frm/mode-switch: remove dubious frm edge insertion before call_insn)

2025-06-04 Thread Jeff Law
On 6/4/25 3:23 PM, Vineet Gupta wrote: On 6/4/25 10:40, Jeff Law wrote: On 5/23/25 12:22 PM, Vineet Gupta wrote: 3. NOK: We loose the ability to instrument local RM writes - especially in the testsuite.   e.g.      a.  instrinsic setting a static RM b. get_frm() to ensure that h

Re: simple frm save/restore strategy (was Re: [PATCH 3/6] RISC-V: frm/mode-switch: remove dubious frm edge insertion before call_insn)

2025-06-04 Thread Vineet Gupta
On 6/4/25 15:06, Jeff Law wrote: >> static int >> get_frm () >> { >>   int frm = -1; >>   __asm__ volatile ( "frrm %0" :"=r"(frm) : :); >>   return frm; >> } >> >> int >> test_float_point_frm_static (float *out, vfloat32m1_t op1, vfloat32m1_t >> op2, >>

[to-be-committed][RISC-V] Improve sequences to generate -1, 1 in some cases.

2025-06-04 Thread Jeff Law
This patch has a minor improvement to if-converted sequences based on observations I found while evaluating another patch from Shreya to handle more cases with zicond insns. Specifically there is a smaller/faster way than zicond to generate a -1,1 result when the condition is testing the sign

Re: [PATCH v4] libstdc++: stringstream ctors from string_view [PR119741]

2025-06-04 Thread H.J. Lu
On Wed, Jun 4, 2025 at 8:02 PM Jonathan Wakely wrote: > > On Thu, 29 May 2025 at 20:30, Nathan Myers wrote: > > > > Change in V4: > > * Rename tests to string_view.cc > > * Adapt tests to cons/wchar_t directories > > * Define symbol __cpp_lib_sstream_from_string_view as 202406 > > * Define sy

Re: [to-be-committed][RISC-V] Improve sequences to generate -1, 1 in some cases.

2025-06-04 Thread Palmer Dabbelt
On Wed, 04 Jun 2025 17:25:20 PDT (-0700), Jeff Law wrote: This patch has a minor improvement to if-converted sequences based on observations I found while evaluating another patch from Shreya to handle more cases with zicond insns. Specifically there is a smaller/faster way than zicond to genera

Re: [to-be-committed][RISC-V] Improve sequences to generate -1, 1 in some cases.

2025-06-04 Thread Jeff Law
On 6/4/25 6:37 PM, Palmer Dabbelt wrote: On Wed, 04 Jun 2025 17:25:20 PDT (-0700), Jeff Law wrote: This patch has a minor improvement to if-converted sequences based on observations I found while evaluating another patch from Shreya to handle more cases with zicond insns. Specifically there is

[PATCH] i386: Fix vmovvdup's mem attribute

2025-06-04 Thread Hu, Lin1
Hi, Some vmovvdup pattern's type attribute is sselog1 and then mem attribute is both. Modify type attribute according to other patterns about vmovvdup. Bootstrapped and regtested on x86_64-linux-pc-gnu, OK for trunk? BRs, Lin gcc/ChangeLog: * config/i386/sse.md (avx512f_movddup

[PATCH] RISC-V: Update extension defination.

2025-06-04 Thread Jiawei
Update the defination of RISC-V extensions in riscv-ext.def. gcc/ChangeLog: * config/riscv/riscv-ext.def: Update declaration. Signed-off-by: Jiawei --- gcc/config/riscv/riscv-ext.def | 282 - 1 file changed, 141 insertions(+), 141 deletions(-) diff --gi

Re: [Patch][RFC?] OpenMP: Add omp_get_initial_device/omp_get_num_devices builtins

2025-06-04 Thread Sandra Loosemore
On 6/4/25 08:15, Tobias Burnus wrote: This came up when looking at some context selectors that use 'target_device', but is largely unrelated to it. (target_device has its own special casing). Namely, it makes omp_get_initial_device and omp_get_num_devices PURE, which attributes don't permit for

Re: [PATCH] RISC-V: Update extension defination.

2025-06-04 Thread Jiawei
Committed since it is a simply typo fix. Thanks 在 2025/6/5 9:38, Jiawei 写道: Update the defination of RISC-V extensions in riscv-ext.def. gcc/ChangeLog: * config/riscv/riscv-ext.def: Update declaration. Signed-off-by: Jiawei --- gcc/config/riscv/riscv-ext.def | 282

[AutoFDO] Profile merging for clone test

2025-06-04 Thread Kugan Vivekanandarajah
This patch introduces a new testcase to verify the merging of profiles is performed for cloned functions. Since this is invoked very early, before the pass manager, we need to set up the dumping explicitly. This is similar to the handling in finish_optimization_passes. gcc/ChangeLog: * a

RE: [PATCH] vect: Improve vectorization for small-trip-count loops using subvectors

2025-06-04 Thread Richard Biener
On Tue, 3 Jun 2025, Tamar Christina wrote: > > -Original Message- > > From: Richard Biener > > Sent: Tuesday, June 3, 2025 2:12 PM > > To: Tamar Christina > > Cc: Richard Biener ; Richard Sandiford > > ; Pengfei Li ; gcc- > > patc...@gcc.gnu.org; ktkac...@nvidia.com > > Subject: Re: [PAT

Re: [PATCH] opt: Detect the wrong case of flags option

2025-06-04 Thread Richard Biener
On Tue, Jun 3, 2025 at 9:16 PM Joseph Myers wrote: > > On Tue, 3 Jun 2025, Andrew Pinski wrote: > > > This is just a simple check to see if the flags like LangEnabledBy > > have the correct case. By putting everything into upper case and > > seeing if there is a match (if previously there was not

Re: [PATCH] libstdc++: Support _TIME_BITS=64 for system_clock::to_time_t [PR99832]

2025-06-04 Thread Tomasz Kaminski
On Tue, Jun 3, 2025 at 7:53 PM Jonathan Wakely wrote: > > > On Tue, 3 Jun 2025, 16:07 Tomasz Kaminski, wrote: > >> >> >> On Tue, Jun 3, 2025 at 4:40 PM Jonathan Wakely >> wrote: >> >>> On Tue, 3 Jun 2025 at 14:46, Jonathan Wakely wrote: >>> > >>> > For some 32-bit targets Glibc supports changi

Re: [PATCH v5 0/8] Implement layouts from mdspan.

2025-06-04 Thread Tomasz Kaminski
On Tue, Jun 3, 2025 at 6:56 PM Luc Grosheintz wrote: > Thank you Tomasz for the round of review. IIUC we have several > cases of if there's a v6, please change this, and no mandatory > changes. > > Would you like me to submit a v6? > If you could fix to the test on 32bit architectures, that would

RE: [PATCH] vect: Improve vectorization for small-trip-count loops using subvectors

2025-06-04 Thread Tamar Christina
> -Original Message- > From: Richard Biener > Sent: Wednesday, June 4, 2025 8:04 AM > To: Tamar Christina > Cc: Richard Biener ; Richard Sandiford > ; Pengfei Li ; gcc- > patc...@gcc.gnu.org; ktkac...@nvidia.com > Subject: RE: [PATCH] vect: Improve vectorization for small-trip-count loops

Re: [Fortran, Patch, PR120483, v2] Fix wrong type of saved allocatable strings.

2025-06-04 Thread Andre Vehreschild
Hi Harald, merged as gcc-16-1096-gafa2de8093a. Thanks again for the review. Regards, Andre On Tue, 3 Jun 2025 21:59:52 +0200 Harald Anlauf wrote: > Hi Andre, > > On 6/3/25 13:31, Andre Vehreschild wrote: > > Hi all, > > > > thanks for the explanations, Christophe. This is very much a

[PATCH] i386: Add a new peeophole2 for PR91384 under APX_F

2025-06-04 Thread Hu, Lin1
gcc/ChangeLog: PR target/91384 * config/i386/i386.md: Add new peeophole2 for optimize *negsi_1 followed by *cmpsi_ccno_1 with APX_F. gcc/testsuite/ChangeLog: PR target/91384 * gcc.target/i386/pr91384-1.c: New test. --- gcc/config/i386/i386.md

RE: [PATCH] vect: Improve vectorization for small-trip-count loops using subvectors

2025-06-04 Thread Richard Biener
On Wed, 4 Jun 2025, Tamar Christina wrote: > > -Original Message- > > From: Richard Biener > > Sent: Wednesday, June 4, 2025 8:04 AM > > To: Tamar Christina > > Cc: Richard Biener ; Richard Sandiford > > ; Pengfei Li ; gcc- > > patc...@gcc.gnu.org; ktkac...@nvidia.com > > Subject: RE: [P

RE: [PATCH] vect: Improve vectorization for small-trip-count loops using subvectors

2025-06-04 Thread Tamar Christina
> -Original Message- > From: Richard Biener > Sent: Wednesday, June 4, 2025 8:34 AM > To: Tamar Christina > Cc: Richard Biener ; Richard Sandiford > ; Pengfei Li ; gcc- > patc...@gcc.gnu.org; ktkac...@nvidia.com > Subject: RE: [PATCH] vect: Improve vectorization for small-trip-count loops

RE: [PATCH] vect: Improve vectorization for small-trip-count loops using subvectors

2025-06-04 Thread Richard Biener
On Wed, 4 Jun 2025, Tamar Christina wrote: > > -Original Message- > > From: Richard Biener > > Sent: Wednesday, June 4, 2025 8:34 AM > > To: Tamar Christina > > Cc: Richard Biener ; Richard Sandiford > > ; Pengfei Li ; gcc- > > patc...@gcc.gnu.org; ktkac...@nvidia.com > > Subject: RE: [P

Re: [PATCH] i386: Implement Thread Local Storage on Windows

2025-06-04 Thread Jan-Benedict Glaw
Hi Julian, On Fri, 2025-05-02 09:59:13 +, Julian Waters wrote: > After a long hiatus, I've returned to address review comments on the > Windows TLS patch. Attached here is the final patch from this > effort. Ok for merge? Will need help from Windows maintainers to > commit once this is appro

Re: [PATCH] i386: Implement Thread Local Storage on Windows

2025-06-04 Thread Julian Waters
Hi Jan, I'll add that to my to do list, thanks for the report! It may take a while for me to do since I am a university student however. best regards, Julian On Wed, Jun 4, 2025 at 4:31 PM Jan-Benedict Glaw wrote: > > Hi Julian, > > On Fri, 2025-05-02 09:59:13 +, Julian Waters > wrote: >

Re: [PATCH] vect: Improve vectorization for small-trip-count loops using subvectors

2025-06-04 Thread Richard Sandiford
Sorry for responding late. Richard Biener writes: >> > > > > > OK, so SVE VLS -msve-vector-bits=128 modes are indistinguishable >> > > > > > from >> > Adv. >> > > > > > SIMD >> > > > > > modes by the middle-end? >> > > > > >> > > > > I believe so, the ACLE types have an annotation on them to lif

Re: [PATCH 1/2]AArch64 docs: add itemx for outline-atomics docs

2025-06-04 Thread Richard Sandiford
Tamar Christina writes: > The documentation for outline atomics is missing the entry for > -mno-outline-atomics which this patch adds. > > Bootstrapped Regtested on aarch64-none-linux-gnu and no issues. > > Ok for master? > > Thanks, > Tamar > > gcc/ChangeLog: > > * doc/extend.texi (outline-

[PATCH] Extend nonnull_if_nonzero attribute [PR120520]

2025-06-04 Thread Jakub Jelinek
Hi! C2Y voted in the https://www.open-std.org/jtc1/sc22/wg14/www/docs/n3466.pdf paper, which clarifies some of the conditional nonnull cases. For strncat/__strncat_chk no changes are necessary, we already use __attribute__((nonnull (1), nonnull_if_nonzero (2, 3))) attributes on the builtin and gli

Re: [PATCH] vect: Improve vectorization for small-trip-count loops using subvectors

2025-06-04 Thread Pengfei Li
Thank you for all suggestions above. > > I see. So this clearly is a feature on instructions then, not modes. > > In fact it might be profitable to use unpredicated add to avoid > > computing the loop mask for a specific element width completely even > > when that would require more operation for

Libang Precision Mold Factory

2025-06-04 Thread sales1
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[PATCH] libstdc++: Fix format call and test formatting with empty specs for durations.

2025-06-04 Thread Tomasz Kamiński
This patches fixes an obvious error, where the output iterator argument was missing for call to format_to, when duration with custom representation types are used. It's also adding the test for behavior of ostream operator and the formatting with empty chron-spec for the chrono types. Current cove

Re: [PATCH] i386: Implement Thread Local Storage on Windows

2025-06-04 Thread LIU Hao
在 2025-6-4 16:31, Jan-Benedict Glaw 写道: With automated builds (configured with --enable-languages=all --enable-languages=c,c++ --disable-gcov --disable-shared --disable-threads --target=i686-mingw32crt --without-headers), I see new warnings about unused parameters (`model` and `for_mov`) and vari

Re: [PATCH] vect: Improve vectorization for small-trip-count loops using subvectors

2025-06-04 Thread Richard Biener
On Wed, 4 Jun 2025, Richard Sandiford wrote: > Sorry for responding late. > > Richard Biener writes: > >> > > > > > OK, so SVE VLS -msve-vector-bits=128 modes are indistinguishable > >> > > > > > from > >> > Adv. > >> > > > > > SIMD > >> > > > > > modes by the middle-end? > >> > > > > > >> > >

[RFC] RISC-V: Support -mcpu for XiangShan Kunminghu cpu.

2025-06-04 Thread Jiawei
This patch adds support for the XiangShan Kunminghu CPU in GCC, allowing the use of the `-mcpu=xiangshan-kunminghu` option. XiangShan-KunMingHu is the third-generation open-source high-performance RISC-V processor.[1] You can find the corresponding ISA extension from the XiangShan Github repositor

RE: [PATCH] vect: Improve vectorization for small-trip-count loops using subvectors

2025-06-04 Thread Tamar Christina
> -Original Message- > From: Richard Biener > Sent: Wednesday, June 4, 2025 10:43 AM > To: Richard Sandiford > Cc: Tamar Christina ; Richard Biener > ; Pengfei Li ; gcc- > patc...@gcc.gnu.org; ktkac...@nvidia.com > Subject: Re: [PATCH] vect: Improve vectorization for small-trip-count loop

Re: [RFC] RISC-V: Support -mcpu for XiangShan Kunminghu cpu.

2025-06-04 Thread Yangyu Chen
> On 4 Jun 2025, at 18:20, Xi Ruoyao wrote: > > On Wed, 2025-06-04 at 17:56 +0800, Jiawei wrote: >> +RISCV_CORE("xiangshan-kunminghu", >> "rv64imafdcbvh_sdtrig_sha_shcounterenw_" >> + >> "shgatpa_shlcofideleg_shtvala_shvsatpa_shvstvala_shvstvecd_" >> + >> "smaia_smcsrind_smdbltrp

Re: [PATCH v5 3/8] libstdc++: Add tests for layout_left.

2025-06-04 Thread Luc Grosheintz
On 6/3/25 15:10, Tomasz Kaminski wrote: On Tue, Jun 3, 2025 at 2:50 PM Luc Grosheintz wrote: On 6/3/25 14:31, Tomasz Kaminski wrote: On Mon, Jun 2, 2025 at 9:07 AM Luc Grosheintz wrote: On 5/30/25 18:42, Luc Grosheintz wrote: Implements a suite of tests for the currently implemente

Re: [PATCH] libstdc++: Fix format call and test formatting with empty specs for durations.

2025-06-04 Thread Jonathan Wakely
On Wed, 4 Jun 2025, 10:27 Tomasz Kamiński, wrote: > This patches fixes an obvious error, where the output iterator argument was > missing for call to format_to, when duration with custom representation > types > are used. > > It's also adding the test for behavior of ostream operator and the > fo

Re: [PATCH] libstdc++: Fix format call and test formatting with empty specs for durations.

2025-06-04 Thread Daniel Krügler
Am Mi., 4. Juni 2025 um 11:27 Uhr schrieb Tomasz Kamiński < tkami...@redhat.com>: > This patches fixes an obvious error, where the output iterator argument was > missing for call to format_to, when duration with custom representation > types > are used. > > It's also adding the test for behavior o

Re: [PATCH] Use MEM_EXPR only if MEM_P is true

2025-06-04 Thread Richard Sandiford
Richard Biener writes: > On Wed, Jun 4, 2025 at 7:28 AM H.J. Lu wrote: >> >> On s390x, for input: >> >> (call_insn/u 7 6 11 2 (parallel [ >> (set (reg:SI 2 %r2) >> (call (subreg:QI (symbol_ref:SI ("__tls_get_offset") >> [flags 0x1]) 3) >> (const_int

Re: [PATCH] Use MEM_EXPR only if MEM_P is true

2025-06-04 Thread Richard Biener
On Wed, Jun 4, 2025 at 7:28 AM H.J. Lu wrote: > > On s390x, for input: > > (call_insn/u 7 6 11 2 (parallel [ > (set (reg:SI 2 %r2) > (call (subreg:QI (symbol_ref:SI ("__tls_get_offset") > [flags 0x1]) 3) > (const_int 0 [0]))) > (clobber (

Re: [PATCH] libstdc++: Fix format call and test formatting with empty specs for durations.

2025-06-04 Thread Tomasz Kaminski
On Wed, Jun 4, 2025 at 12:43 PM Daniel Krügler wrote: > Am Mi., 4. Juni 2025 um 11:27 Uhr schrieb Tomasz Kamiński < > tkami...@redhat.com>: > >> This patches fixes an obvious error, where the output iterator argument >> was >> missing for call to format_to, when duration with custom representatio

Re: [PATCH v5 3/8] libstdc++: Add tests for layout_left.

2025-06-04 Thread Tomasz Kaminski
On Wed, Jun 4, 2025 at 12:36 PM Luc Grosheintz wrote: > > > On 6/3/25 15:10, Tomasz Kaminski wrote: > > On Tue, Jun 3, 2025 at 2:50 PM Luc Grosheintz > > wrote: > > > >> > >> > >> On 6/3/25 14:31, Tomasz Kaminski wrote: > >>> On Mon, Jun 2, 2025 at 9:07 AM Luc Grosheintz < > luc.groshei...@gmail

Re: [PATCH v5 7/8] libstdc++: Add tests for layout_stride.

2025-06-04 Thread Luc Grosheintz
On 6/3/25 15:24, Tomasz Kaminski wrote: On Fri, May 30, 2025 at 6:44 PM Luc Grosheintz wrote: Implements the tests for layout_stride and for the features of the other two layouts that depend on layout_stride. libstdc++-v3/ChangeLog: * testsuite/23_containers/mdspan/layouts/class_

Re: [PATCH] libstdc++: Fix format call and test formatting with empty specs for durations.

2025-06-04 Thread Daniel Krügler
Am Mi., 4. Juni 2025 um 12:57 Uhr schrieb Tomasz Kaminski < tkami...@redhat.com>: > > > On Wed, Jun 4, 2025 at 12:43 PM Daniel Krügler > wrote: > >> Am Mi., 4. Juni 2025 um 11:27 Uhr schrieb Tomasz Kamiński < >> tkami...@redhat.com>: >> >>> [...] >>> + >>> +template >>> + requires std::is_integr

[PATCH v2] libstdc++: Test for formatting with empty spec for time points.

2025-06-04 Thread Tomasz Kamiński
Adding a tests for behavior of the ostream operator and the formatting with empty chronio-spec for the chrono types. Current coverage is: * time point, zoned_time and local_time_format in this commit, * duration and hh_mm_ss in r16-1099-gac0a04b7a254fb, * calendar types in r16-1016-g28a17985dd34

Re: [PATCH] libstdc++: Fix format call and test formatting with empty specs for durations.

2025-06-04 Thread Tomasz Kaminski
On Wed, Jun 4, 2025 at 1:06 PM Daniel Krügler wrote: > Am Mi., 4. Juni 2025 um 12:57 Uhr schrieb Tomasz Kaminski < > tkami...@redhat.com>: > >> >> >> On Wed, Jun 4, 2025 at 12:43 PM Daniel Krügler >> wrote: >> >>> Am Mi., 4. Juni 2025 um 11:27 Uhr schrieb Tomasz Kamiński < >>> tkami...@redhat.co

Re: [PATCH v5 7/8] libstdc++: Add tests for layout_stride.

2025-06-04 Thread Tomasz Kaminski
Ah, sorry I got confused in the review suggestions, and latter when checking the code. What I meant is: Because the incoming strided_layout is required to be unique, that implies that for each of strides are greater or equal to the extents. As a consequence, other.required_span_size() is always gr

Re: [PATCH] libstdc++: Fix format call and test formatting with empty specs for durations.

2025-06-04 Thread Jonathan Wakely
On Wed, 4 Jun 2025, 12:05 Daniel Krügler, wrote: > Am Mi., 4. Juni 2025 um 12:57 Uhr schrieb Tomasz Kaminski < > tkami...@redhat.com>: > >> >> >> On Wed, Jun 4, 2025 at 12:43 PM Daniel Krügler >> wrote: >> >>> Am Mi., 4. Juni 2025 um 11:27 Uhr schrieb Tomasz Kamiński < >>> tkami...@redhat.com>:

Re: [PATCH v5 7/8] libstdc++: Add tests for layout_stride.

2025-06-04 Thread Tomasz Kaminski
On Wed, Jun 4, 2025 at 1:19 PM Tomasz Kaminski wrote: > Ah, sorry I got confused in the review suggestions, and latter when > checking the code. > What I meant is: > > Because the incoming strided_layout is required to be unique, > that implies that for each of strides are greater or equal to the

Re: [PATCH v2] libstdc++: Test for formatting with empty spec for time points.

2025-06-04 Thread Tomasz Kaminski
On Wed, Jun 4, 2025 at 1:08 PM Tomasz Kamiński wrote: > Adding a tests for behavior of the ostream operator and the formatting > with empty chronio-spec for the chrono types. Current coverage is: > This should say "chron-spec", consider it to be fixed locally. > * time point, zoned_time and loc

Re: [PATCH v2 0/7] Mips64r6 improvements

2025-06-04 Thread Aleksandar Rakic
HTEC Public Hi, Could you please let us know if you have any comments on this patch series? Kind regards, Aleksandar Rakic From: Aleksandar Rakic Sent: Monday, March 17, 2025 2:11 PM To: gcc-patches@gcc.gnu.org Cc: Djordje Todorovic; c...@mips.com; rich

Re: [PATCH v5 6/8] libstdc++: Implement layout_stride from mdspan.

2025-06-04 Thread Luc Grosheintz
On 6/3/25 14:49, Tomasz Kaminski wrote: On Fri, May 30, 2025 at 6:47 PM Luc Grosheintz wrote: Implements the remaining parts of layout_left and layout_right; and all of layout_stride. The implementation of layout_stride::mapping::is_exhaustive applies the following change to the standard:

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