Re: [PATCH] RISC-V: Add pattern for vector-scalar multiply-add/sub [PR119100]

2025-03-29 Thread Jeff Law
On 3/27/25 1:39 PM, Robin Dapp wrote: Hi Paul-Antoine, This pattern enables the combine pass to merge a vec_duplicate into a plus-mult or minus-mult RTL instruction. Before this patch, we have two instructions, e.g.:   vfmv.v.f    v6,fa0   vfmadd.vv   v9,v6,v7 After, we get only o

Re: [PATCH] avoid-store-forwarding: Fix reg init on load-elimination [PR119160]

2025-03-29 Thread Jeff Law
On 3/28/25 5:12 AM, Konstantinos Eleftheriou wrote: In the case that we are eliminating the load instruction, we use zero_extend for the initialization of the base register for the zero-offset store. This causes issues when the store and the load use the same mode, as we are trying to generate

Re: [PATCH] combine: Special case set_noop_p in two spots

2025-03-29 Thread Jeff Law
On 3/28/25 5:20 AM, Jakub Jelinek wrote: Hi! Here is the incremental patch I was talking about. For noop sets, we don't need to test much, they can go to i2 unless that would violate i3 JUMP condition. With this the try_combine on the pr119291.c testcase doesn't fail, but succeeds and we get

[PATCH] gcc.dg/analyzer/torture/switch-3.c: fix llp64 warnings

2025-03-29 Thread Jonathan Yong
Patch OK for master branch? gcc/testsuite/ChangeLog: * gcc.dg/analyzer/torture/switch-3.c: fix llp64 warnings diff --git a/gcc/testsuite/gcc.dg/analyzer/torture/switch-3.c b/gcc/testsuite/gcc.dg/analyzer/torture/switch-3.c index 57b8acdb292..b40be664d38 100644 --- a/gcc/testsuite/gcc.dg/analy

Re: [PATCH v3 16/19] Refactor FMV frontend hooks and logic.

2025-03-29 Thread Yangyu Chen
> On 27 Mar 2025, at 16:45, Alfie Richards wrote: > > > This change refactors FMV handling in the frontend to allows greater > reasoning about versions in shared code. > > This is needed for target_version semantics and allowing target_clones > and target_versions to both be used for the dec

[PATCH v2] RISC-V: vsetvl: skip abnormal edge on vsetvl insertion [PR119533]

2025-03-29 Thread Vineet Gupta
changes since v2 - dump log sanfu --- vsetvl phase4 uses LCM guided info to insert VSETVL insns. It has an additional loop to insert missing vsetvls on certain edges. Currently it asserts/aborts on encountering EDGE_ABNORMAL. When enabling go frontend with V enabled, libgo build hits the assert.

Re: [PATCH] RISC-V: vsetvl: skip abnormal edge on vsetvl insertion [PR119533]

2025-03-29 Thread Vineet Gupta
On 3/29/25 13:36, Andreas Schwab wrote: >> + if (eg->flags & EDGE_ABNORMAL) >> +{ >> + fprintf (dump_file, "\nskipping EDGE_ABNORMAL\n"); > This will crash if dump_file is NULL. Sorry, last minute update. Fixed, v2 posted. Thx, -Vineet

Re: [PATCH] gcc/mingw: Align `.refptr.` to 8-byte boundaries for 64-bit targets

2025-03-29 Thread Jonathan Yong
On 3/29/25 5:56 PM, LIU Hao wrote: This is a minor change, bootstrapped on x86_64-w64-mingw32. Thanks, applied to master branch as obvious/trivial.

Re: [PATCH v2] RISC-V: vsetvl: skip abnormal edge on vsetvl insertion [PR119533]

2025-03-29 Thread Jeff Law
On 3/29/25 6:49 PM, Vineet Gupta wrote: changes since v2 - dump log sanfu --- vsetvl phase4 uses LCM guided info to insert VSETVL insns. It has an additional loop to insert missing vsetvls on certain edges. Currently it asserts/aborts on encountering EDGE_ABNORMAL. When enabling go frontend

Re: [PATCH RFC] c++: optimize push_to_top_level [PR64500]

2025-03-29 Thread Richard Biener
> Am 29.03.2025 um 00:05 schrieb Jason Merrill : > > Tested x86_64-pc-linux-gnu, initially with extra checking to make sure that > indeed nothing got saved from a namespace level. > > This isn't a regression, but a 20% speedup for a simple change is pretty > attractive; what do people think a

[COMMITTED 096/146] gccrs: nr2.0: Resolve type aliases inside trait definitions

2025-03-29 Thread arthur . cohen
From: Owen Avery gcc/rust/ChangeLog: * resolve/rust-toplevel-name-resolver-2.0.cc (TopLevel::visit): Add visitor for TraitItemType. * resolve/rust-toplevel-name-resolver-2.0.h (TopLevel::visit): Likewise. gcc/testsuite/ChangeLog: * rust/compile/nr2/exclu

[PATCH] RISC-V: vsetvl: skip abnormal edge on vsetvl insertion [PR119533]

2025-03-29 Thread Vineet Gupta
vsetvl phase4 uses LCM guided info to insert VSETVL insns. It has an additional loop to insert missing vsetvls on certain edges. Currently it asserts/aborts on encountering EDGE_ABNORMAL. When enabling go frontend with V enabled, libgo build hits the assert. It seems to be safe to just skip the ab

Re: [PATCH] libstdc++: Constrain formatters for chrono types [PR119517]

2025-03-29 Thread Tomasz Kaminski
On Fri, Mar 28, 2025 at 9:33 PM Jonathan Wakely wrote: > On 28/03/25 16:31 +0100, Tomasz Kamiński wrote: > >The formatters for chrono types defined the parse/format methods > >as accepting unconstrained types, this in combination with lack > >of constrain on _CharT lead to them falsy statisfying

Re: [PATCH] cobol: Fix up cobol/{charmaps,valconv}.cc rules

2025-03-29 Thread Iain Sandoe
> On 29 Mar 2025, at 15:56, Jakub Jelinek wrote: > > On Sat, Mar 29, 2025 at 03:50:54PM +, Iain Sandoe wrote: >>> I'm not sure if sed -E is portable enough (sure, I know it is in POSIX, but >>> that is not enough). >>> How about just >>> sed -e '/^#include/s,"\([^"]*.h\)","../../libgco

Re: [PATCH] cobol: Fix up cobol/{charmaps,valconv}.cc rules

2025-03-29 Thread Iain Sandoe
> On 29 Mar 2025, at 16:12, Jakub Jelinek wrote: > > On Sat, Mar 29, 2025 at 04:03:07PM +, Iain Sandoe wrote: >> >> >>> On 29 Mar 2025, at 15:56, Jakub Jelinek wrote: >>> >>> On Sat, Mar 29, 2025 at 03:50:54PM +, Iain Sandoe wrote: > I'm not sure if sed -E is portable enough (s

[committed] c++: Fix comment typo

2025-03-29 Thread Jakub Jelinek
Hi! Found a typo in a comment. Committed as obvious. 2025-03-29 Jakub Jelinek * name-lookup.cc (maybe_lazily_declare): Fix comment typo, anout -> about. --- gcc/cp/name-lookup.cc.jj2025-03-27 19:13:58.168298922 +0100 +++ gcc/cp/name-lookup.cc 2025-03-29 11:29:48.42

[PATCH] cobol, libgcobol: Currently libgcobol depends on libstdc++.

2025-03-29 Thread Iain Sandoe
Tested on x86_64 linux, darwin, aarch64 linux, OK for trunk? thanks, Iain --- 8< --- We need to add libstdc++ to link lines even when the link is not '-static' since libgcobol depends on libstdc++. gcc/cobol/ChangeLog: * gcobolspec.cc (lang_specific_driver): Add libstdc++ for an

Re: [PATCH 7/8] target/119010 - Zen4/Zen5 reservations for movlhps loads

2025-03-29 Thread Jan Hubicka
> The following fixes up the ssemov2 type introduction, amending > the znver4_sse_mov_fp_load reservation. This fixes > > ;; 14--> b 0: i1436 xmm6=vec_concat(xmm6,[ax+0x8]) :nothing > > Bootstrapped and tested on x86_64-unknown-linux-gnu, OK? > > PR target/119010 > *

Re: [PATCH 2/8] target/119010 - missing reservations for Zen4/5 and SSE compares

2025-03-29 Thread Jan Hubicka
> There's the znver4_sse_test reservation which matches the memory-less > SSE compares but currently requires prefix_extra == 1. The old > znver automata in this case sometimes uses znver1-double instead of > znver1-direct, but it's quite a maze. The following simply drops prefix_extra is used to

Re: [PATCH 3/8] target/119010 - add reservations for integer vector compares to zen4/zen5

2025-03-29 Thread Jan Hubicka
> The following handles TI, OI and XI mode in the respective EVEX > compare reservations that do not use memory (I've not yet run into > ones with). The znver automata has separate reservations for > integer compares (but only for zen1, for zen2 and zen3 there are > no compare reservations at all)

[pushed] c++/modules: unexported friend template

2025-03-29 Thread Jason Merrill
Tested x86_64-pc-linux-gnu, applying to trunk. Do you agree with my choice of how to adjust duplicate_decls? -- 8< -- Here we were failing to match the injected friend declaration to the definition because the latter isn't exported. But the friend is attached to the module, so we need to look f

Re: [PATCH] ipa-sra: Don't change return type to void if there are musttail calls [PR119484]

2025-03-29 Thread Jan Hubicka
> Hi! > > The following testcase is rejected, because IPA-SRA decides to > turn bar.constprop call into bar.constprop.isra which returns void. > While there is no explicit lhs on the call, as it is a musttail call > the tailc pass checks if IPA-VRP returns singleton from that function > and the fu

Re: [PATCH 8/8] target/119010 - add mode attribute to *vmovv16si_constm1_pternlog_false_dep

2025-03-29 Thread Jan Hubicka
> Like the other instances. This avoids > > ;; 1--> b 0: i6540 {xmm2=const_vector;unspec[xmm2] 38;}:nothing > > Bootstrapped and tested on x86_64-unknown-linux-gnu, OK? > > PR target/119010 > * config/i386/sse.md (*vmov_constm1_pternlog_false_dep): > Add mode attrib

Re: [PATCH] cobol: Fix up cobol/{charmaps,valconv}.cc rules

2025-03-29 Thread Jakub Jelinek
On Sat, Mar 29, 2025 at 03:18:20PM +, Iain Sandoe wrote: > Hi Jakub > > Thanks for doing this... > > > On 28 Mar 2025, at 14:39, Jakub Jelinek wrote: > > > > +cobol/charmaps.cc cobol/valconv.cc: cobol/%.cc: $(LIB_SOURCE)/%.cc > > + -l='ec\|common-defs\|io\|gcobolio\|libgcobol\|gfileio\|ch

[pushed] jit, Darwin: Update exports with ABI 28 through 34.

2025-03-29 Thread Iain Sandoe
Tested on x86-64-darwin21, pushed to trunk, thanks, Iain --- 8< --- Synchronise the darwin export list with the current map. gcc/jit/ChangeLog: * libgccjit.exports: Add symbols for ABI 28 to 34. Signed-off-by: Iain Sandoe --- gcc/jit/libgccjit.exports | 21 + 1 fi

Re: [PATCH 1/8] target/119010 - fixup zn4zn5 reservation for move from const_vector

2025-03-29 Thread Jan Hubicka
> movv8si_internal uses sselog1 and V4SFmode for an instruction like > > (insn 363 2437 371 97 (set (reg:V8SI 46 xmm10 [1125]) > (const_vector:V8SI [ > (const_int 0 [0]) repeated x8 > ])) "ComputeNonbondedUtil.C":185:21 2402 {movv8si_internal} > > this wasn't c

Re: [PATCH 5/8] target/119010 - fixup Zen4/Zen5 fp<->int convert reservations

2025-03-29 Thread Jan Hubicka
> They were using ssecvt instead of sseicvt, I've also added handling > for sseicvt2 which was introduced without fixing up automata, and > the relevant instruction uses DFmode. IMO this is a quite messy > area that could need TLC in the machine description itself. > > Bootstrapped and tested on

Re: [PATCH 4/8] target/119010 - handle DFmode in SSE divide reservations for Zen4/Zen5

2025-03-29 Thread Jan Hubicka
> Like the other DFmode cases. > > Bootstrapped and tested on x86_64-unknown-linux-gnu, OK? > > PR target/119010 > * config/i386/zn4zn5.md (znver4_sse_div_pd, > znver4_sse_div_pd_load, znver5_sse_div_pd_load): Handle DFmode. OK, thanks! Honza > --- > gcc/config/i386/zn4zn5.md |

Re: [PATCH] cobol: Fix up cobol/{charmaps,valconv}.cc rules

2025-03-29 Thread Jakub Jelinek
On Sat, Mar 29, 2025 at 03:50:54PM +, Iain Sandoe wrote: > > I'm not sure if sed -E is portable enough (sure, I know it is in POSIX, but > > that is not enough). > > How about just > > sed -e '/^#include/s,"\([^"]*.h\)","../../libgcobol/\1",' $& > $@ > > This, unfortunately, works too well

Re: [PATCH] cobol: Fix up cobol/{charmaps,valconv}.cc rules

2025-03-29 Thread Iain Sandoe
> On 29 Mar 2025, at 15:28, Jakub Jelinek wrote: > > On Sat, Mar 29, 2025 at 03:18:20PM +, Iain Sandoe wrote: >> Hi Jakub >> >> Thanks for doing this... >> >>> On 28 Mar 2025, at 14:39, Jakub Jelinek wrote: >>> >>> +cobol/charmaps.cc cobol/valconv.cc: cobol/%.cc: $(LIB_SOURCE)/%.cc >>>

Re: [PATCH v3 05/19] Update is_function_default_version to work with target_version.

2025-03-29 Thread Yangyu Chen
> On 27 Mar 2025, at 16:45, Alfie Richards wrote: > > > Notably this respects target_version semantics where an unannotated > function can be the default version. > > gcc/ChangeLog: > > * attribs.cc (is_function_default_version): Add target_version logic. > --- > gcc/attribs.cc | 27 +++

[PATCH] gcc/mingw: Align `.refptr.` to 8-byte boundaries for 64-bit targets

2025-03-29 Thread LIU Hao
This is a minor change, bootstrapped on x86_64-w64-mingw32. -- Best regards, LIU Hao From 83c3e90432f9ebc97785d81be7a94066d9923920 Mon Sep 17 00:00:00 2001 From: LIU Hao Date: Sat, 29 Mar 2025 22:47:54 +0800 Subject: [PATCH] gcc/mingw: Align `.refptr.` to 8-byte boundaries for 64-bit targets

[ping] [PATCH] includes, Darwin: Handle modular use for macOS SDKs [PR116827].

2025-03-29 Thread Iain Sandoe
C++ modules are not really usable on latest Darwin without resolving this, thanks Iain > On 23 Mar 2025, at 12:29, Iain Sandoe wrote: > > From: Iain Sandoe > > Tested on x86_64/aarch64 Darwin and x86_64-linux, > OK for trunk? > backports to branches supporting modules? > thanks > Iain > > ---

Re: [gcc-wwwdocs PATCH] gcc-14/15: Mention recent change for Intel x86_64

2025-03-29 Thread Gerald Pfeifer
On Mon, 24 Mar 2025, Haochen Jiang wrote: > Mention AVX10.1 option changes, revise AVX10.2 option and mention > APX_F new feature in GCC 15. > --- >New ISA extension support for Intel AVX10.1 was added. > - AVX10.1 intrinsics are available via the -mavx10.1 or > - -mavx10.1-256 compi

Re: [PATCH] libstdc++: Constrain formatters for chrono types [PR119517]

2025-03-29 Thread Jonathan Wakely
On Sat, 29 Mar 2025 at 18:16, Tomasz Kaminski wrote: > > > > On Fri, Mar 28, 2025 at 9:33 PM Jonathan Wakely wrote: >> >> On 28/03/25 16:31 +0100, Tomasz Kamiński wrote: >> >The formatters for chrono types defined the parse/format methods >> >as accepting unconstrained types, this in combination

Re: [PATCH v3 14/19] Add reject_target_clone hook and filter target_clone versions.

2025-03-29 Thread Yangyu Chen
Hi Alfie, It appears that you've duplicated patch 14/19. The only difference between them is the title, which replaces "and" with "in order to". I think the latter version is what you intended. Thanks, Yangyu Chen

Re: [PATCH 6/8] target/119010 - reservations for Zen4/Zen5 movhlps to memory

2025-03-29 Thread Jan Hubicka
> The following adds missing reservations for the store variant of > sselog reservations covering > > ;; 112--> b 0: i1499 [dx-0x10]=vec_select(xmm10,parallel):nothing > > Bootstrapped and tested on x86_64-unknown-linux-gnu, OK? > > PR target/119010 > * config/i386/zn4zn5.md

[PATCH] testsuite: arm: fixup more dg-final syntax

2025-03-29 Thread Sam James
... as Richard E mentioned on the ML. Followup to r15-8956-ge90d6c2639c392. gcc/testsuite/ChangeLog: * gcc.target/arm/short-vfp-1.c: Add whitespace around brace. --- Pushed. gcc/testsuite/gcc.target/arm/short-vfp-1.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff

[PATCH] gas: m68k M680LC040 F-LINE NOP insertion fixing emulation of fpu instructions

2025-03-29 Thread Nathanial Sloss
Hi, The m68k m68lc040 (early revisions) have an issue after executing f-line (co processor mmu/fpu) instructions and executing a trap in the case of fpu emulation. Unfornately due to time passed the processor errata as to how to address the issue has been lost. Fortunately the issue was docum

[COMMITTED 138/146] gccrs: derive(Clone): Use lang item for PhantomData in Clone

2025-03-29 Thread arthur . cohen
From: Arthur Cohen gcc/rust/ChangeLog: * expand/rust-derive-clone.cc (DeriveClone::visit_union): Create a lang item path instead of a regular path. --- gcc/rust/expand/rust-derive-clone.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/rust/expand/rust-

RE: [PATCH] RISC-V: Add pattern for vector-scalar multiply-add/sub [PR119100]

2025-03-29 Thread Li, Pan2
> Note that since this isn't a regression it'll need to wait for gcc-16 > development to open before the patch can go forward. > Pan Li sent a similar patch for vadd.vv/vadd.vx I think in November and I > believe he intended to continue when stage 1 opens. Yes, thanks Robin and Jeff, I will re-