Re: [Patch, v2] OpenMP/Fortran: Fix handling of 'declare target' with 'link' clause [PR11555]

Hi Tobias, I am wondering why the testcase has no `!{ dg-do ... }` line. What will dejagnu do then? Sorry for the may be stupid question, but I never encountered a testcase without a dg-do line. It was the minimum for me. Besides that the patch looks ok to me. - Andre On Fri, 26 Jul 2024 20:34

Re: [Patch, v2] OpenMP/Fortran: Fix handling of 'declare target' with 'link' clause [PR11555]

Hi Andre, Andre Vehreschild wrote: I am wondering why the testcase has no `!{ dg-do ... }` line. What will dejagnu do then? Sorry for the may be stupid question, but I never encountered a testcase without a dg-do line. It was the minimum for me. Well, then you need look harder ;-) In gcc/test

Re: [PATCH v3 1/3] aarch64: Add march flags for +fp8 arch extensions

Hi Claudio, > On 26 Jul 2024, at 18:32, Claudio Bantaloukas > wrote: > > External email: Use caution opening links or attachments > > > This introduces the relevant flags to enable access to the fpmr register and > fp8 intrinsics, which will be added subsequently. > > gcc/ChangeLog: > >

Re: [PATCH v3 3/3] aarch64: Add fpm register helper functions.

Hi Claudio, > On 26 Jul 2024, at 18:32, Claudio Bantaloukas > wrote: > > External email: Use caution opening links or attachments > > > The ACLE declares several helper types and functions to facilitate > construction > of `fpm` arguments. These are available when one of the arm_neon.h, arm_

[committed] testsuite: Fix up consteval-prop21.C for 32-bit targets [PR115986]

On Sat, Jul 27, 2024 at 04:26:07PM -0400, Jason Merrill wrote: > * g++.dg/cpp2a/consteval-prop21.C: New test. The test fails on 32-bit targets (which don't support __int128 type). Using unsigned long long instead still ICEs before the fix and passes after it on those targets. Tested on x86_

Re: [Patch, v2] OpenMP/Fortran: Fix handling of 'declare target' with 'link' clause [PR11555]

Thanks a lot Tobias, yes, I could have looked harder :-) This isn't by any chance documented on the developer website of gcc somewhere? It would be sad, if that knowledge is not publicy available for the future. Thanks again for the explanation and keep up the good work. Regards, Andre

[PATCH] c++: Fix up error recovery of invalid structured bindings used in conditions [PR116113]

Hi! The following testcase ICEs, because for structured binding error recovery DECL_DECOMP_BASE is kept NULL and the newly added code to pick up saved value from the base assumes that on structured binding bases the TARGET_EXPR will be always there (that is the case if there are no errors). The f

[PING^0][Patch, rs6000, middle-end] v7: Add implementation for different targets for pair mem fusion

Hello Richard: Did you get a chance to look at the changes. Ok to install? Thanks & Regards Ajit Forwarded Message Subject: [Patch, rs6000, middle-end] v7: Add implementation for different targets for pair mem fusion Date: Fri, 19 Jul 2024 14:46:13 +0530 From: Ajit Agarwal

Re: [Patch, v2] OpenMP/Fortran: Fix handling of 'declare target' with 'link' clause [PR11555]

Hi Andre, hi all, Andre Vehreschild wrote: yes, I could have looked harder 🙂 I wrote ;-) on purpose as this feature is somewhat hidden and writing 'dg-do compile' doesn't harm. In case of gcc/testsuite, the 'run' is also needed and were often missed (or rather caused by invalid variants su

Re: [PATCH] MATCH: add abs support for half float

On Thu, Jul 25, 2024 at 10:19 PM Richard Biener wrote: > > On Thu, Jul 25, 2024 at 4:42 AM Kugan Vivekanandarajah > wrote: > > > > On Tue, Jul 23, 2024 at 11:56 PM Richard Biener > > wrote: > > > > > > On Tue, Jul 23, 2024 at 10:27 AM Kugan Vivekanandarajah > > > wrote: > > > > > > > > On Tue,

[PATCH v1] Internal-fn: Handle vector bool type for type strict match mode [PR116103]

From: Pan Li For some target like target=amdgcn-amdhsa, we need to take care of vector bool types prior to general vector mode types. Or we may have the asm check failure as below. gcc.target/gcn/cond_smax_1.c scan-assembler-times \\tv_cmp_gt_i32\\tvcc, s[0-9]+, v[0-9]+ 80 gcc.target/gcn/cond

[PATCH] LoongArch: Rework bswap{hi,si,di}2 definition

Per a gcc-help thread we are generating sub-optimal code for __builtin_bswap{32,64}. To fix it: - Use a single revb.d instruction for bswapdi2. - Use a single revb.2w instruction for bswapsi2 for TARGET_64BIT, revb.2h + rotri.w for !TARGET_64BIT. - Use a single revb.2h instruction for bswapsi2

[PATCH] LoongArch: Relax ins_zero_bitmask_operand and remove and3_align

In r15-1207 I was too stupid to realize we just need to relax ins_zero_bitmask_operand to allow using bstrins for aligning, instead of adding a new split. And, "> 12" in ins_zero_bitmask_operand also makes no sense: it rejects bstrins for things like "x & ~4l" with no good reason. So fix my error

Re: [PATCH] MATCH: add abs support for half float

On Mon, Jul 29, 2024 at 12:57 AM Kugan Vivekanandarajah wrote: > > On Thu, Jul 25, 2024 at 10:19 PM Richard Biener > wrote: > > > > On Thu, Jul 25, 2024 at 4:42 AM Kugan Vivekanandarajah > > wrote: > > > > > > On Tue, Jul 23, 2024 at 11:56 PM Richard Biener > > > wrote: > > > > > > > > On Tue,

[patch,wwwdocs,avr,applied] Mention recent additions to the avr backend

Applied the patch below Johann -- diff --git a/htdocs/gcc-15/changes.html b/htdocs/gcc-15/changes.html index 3b3a6c0b..aa8d7609 100644 --- a/htdocs/gcc-15/changes.html +++ b/htdocs/gcc-15/changes.html @@ -99,7 +99,27 @@ a work-in-progress. - +AVR + + + Support has been added for the signal

Re: [Patch] libgomp: Fix declare target link with offset array-section mapping [PR116107]

On Fri, Jul 26, 2024 at 08:05:43PM +0200, Tobias Burnus wrote: > --- a/libgomp/target.c > +++ b/libgomp/target.c > @@ -1820,8 +1820,11 @@ gomp_map_vars_internal (struct gomp_device_descr > *devicep, > if (k->aux && k->aux->link_key) > { > /* Set link

Re: [Patch, v2] OpenMP/Fortran: Fix handling of 'declare target' with 'link' clause [PR11555]

On Mon, Jul 29, 2024 at 09:53:47AM +0200, Tobias Burnus wrote: > Hi Andre, hi all, > > Andre Vehreschild wrote: > > yes, I could have looked harder 🙂 > > I wrote ;-) on purpose as this feature is somewhat hidden and writing 'dg-do > compile' doesn't harm. I think an explicit dg-do is better, oth

Re: [RFC v1 1/2] Merge definitions of array_type_nelts_top()

On Sun, Jul 28, 2024 at 4:16 PM Alejandro Colomar wrote: > > There were two identical definitions, and none of them are available > where they are needed for implementing _Lengthof(). Merge them, and > provide the single definition in gcc/tree.{h,cc}, where it's available > for _Lengthof(). > > S

Re: [PATCH-1v4] Value Range: Add range op for builtin isinf

Hi Jeff, Do you have further questions? Thanks Gui Haochen 在 2024/7/24 6:39, Andrew MacLeod 写道: > > On 7/23/24 15:18, Jeff Law wrote: >> >> >> On 7/11/24 9:17 PM, HAO CHEN GUI wrote: >> So why the test for real_isinf on the upper/lower bound?  If op1 is known to be a NaN, then why t

Performance improvement for std::to_chars(char* first, char* last, /* integer-type */ value, int base = 10 );

Hi, I'm attaching two files: 1.: *to_chars10.h*: This is intended to be included in libstdc++ / gcc to achieve performance improvements. It is an implementation of to_chars10(char* first, char* last,  /* integer-type */ value); Parameters are identical to std::to_chars(char* first, char* l

Re: [PATCH v2] i386: Fix AVX512 intrin macro typo

On Mon, Jul 29, 2024 at 02:07:24AM +, Jiang, Haochen wrote: > > LGTM with the above ChangeLog nit fixed, for trunk/release branches, even > > for > > 14.2 if committed RSN. > > Ok. I will commit them and backport them to GCC13 and GCC12 now. For GCC14, > we could wait for GCC14.3 since it has

RE: [PATCH v2] i386: Fix AVX512 intrin macro typo

> -Original Message- > From: Jakub Jelinek > Sent: Monday, July 29, 2024 4:41 PM > To: Jiang, Haochen > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao ; > ubiz...@gmail.com > Subject: Re: [PATCH v2] i386: Fix AVX512 intrin macro typo > > On Mon, Jul 29, 2024 at 02:07:24AM +, Jiang, Hao

Re: [PATCH v1] Internal-fn: Handle vector bool type for type strict match mode [PR116103]

On Mon, Jul 29, 2024 at 9:57 AM wrote: > > From: Pan Li > > For some target like target=amdgcn-amdhsa, we need to take care of > vector bool types prior to general vector mode types. Or we may have > the asm check failure as below. > > gcc.target/gcn/cond_smax_1.c scan-assembler-times \\tv_cmp_

Re: [PATCH] MATCH: add abs support for half float

On Mon, Jul 29, 2024 at 10:11 AM Andrew Pinski wrote: > > On Mon, Jul 29, 2024 at 12:57 AM Kugan Vivekanandarajah > wrote: > > > > On Thu, Jul 25, 2024 at 10:19 PM Richard Biener > > wrote: > > > > > > On Thu, Jul 25, 2024 at 4:42 AM Kugan Vivekanandarajah > > > wrote: > > > > > > > > On Tue, J

Re: [RFC v1 1/2] Merge definitions of array_type_nelts_top()

Hi Richard, On Mon, Jul 29, 2024 at 10:27:35AM GMT, Richard Biener wrote: > On Sun, Jul 28, 2024 at 4:16 PM Alejandro Colomar wrote: > > > > There were two identical definitions, and none of them are available > > where they are needed for implementing _Lengthof(). Merge them, and > > provide th

Fix ICE with -fdump-tree-moref

Hi, this patch fixes sanity check in modref dumping which is no longer correct now when we give up on parameters being readonly after store merging. Bootstrapped/regtested x86_64-linux, comitted. gcc/ChangeLog: PR ipa/116055 * ipa-modref.cc (analyze_function): Do not ICE when fla

Re: [PATCH v1] Widening-Mul: Try .SAT_SUB for PLUS_EXPR when one op is IMM

On Sun, Jul 28, 2024 at 5:25 AM wrote: > > From: Pan Li > > After add the matching for .SAT_SUB when one op is IMM, there > will be a new root PLUS_EXPR for the .SAT_SUB pattern. For example, > > Form 3: > #define DEF_SAT_U_SUB_IMM_FMT_3(T, IMM) \ > T __attribute__((noinline)) \

Re: [C++ coroutines 6/6] Testsuite.

Hi Iain! On 2019-11-17T10:28:26+, Iain Sandoe wrote: > There are two categories of test: > > 1. Checks for correctly formed source code and the error reporting. > 2. Checks for transformation and code-gen. > > The second set are run as 'torture' tests for the standard options > set, including

Re: [RFC v1 1/2] Merge definitions of array_type_nelts_top()

On Mon, Jul 29, 2024 at 10:55 AM Alejandro Colomar wrote: > > Hi Richard, > > On Mon, Jul 29, 2024 at 10:27:35AM GMT, Richard Biener wrote: > > On Sun, Jul 28, 2024 at 4:16 PM Alejandro Colomar wrote: > > > > > > There were two identical definitions, and none of them are available > > > where the

Re: [C++ coroutines 6/6] Testsuite.

Hi Thomas, > On 29 Jul 2024, at 10:06, Thomas Schwinge wrote: > On 2019-11-17T10:28:26+, Iain Sandoe wrote: >> There are two categories of test: >> >> 1. Checks for correctly formed source code and the error reporting. >> 2. Checks for transformation and code-gen. >> >> The second set are

Re: Performance improvement for std::to_chars(char* first, char* last, /* integer-type */ value, int base = 10 );

On Mon, 29 Jul 2024 at 09:42, Ehrnsperger, Markus wrote: > > Hi, > > > I'm attaching two files: > > 1.: to_chars10.h: > > This is intended to be included in libstdc++ / gcc to achieve performance > improvements. It is an implementation of > > to_chars10(char* first, char* last, /* integer-type

Re: [PATCH v1 1/3] aarch64: store signing key and signing method in DWARF _Unwind_FrameState

On 2024-07-19 15:54, Matthieu Longo wrote: This patch is only a refactoring of the existing implementation of PAuth and returned-address signing. The existing behavior is preserved. _Unwind_FrameState already contains several CIE and FDE information (see the attributes below the comment "The inf

Support streaming of poly_int for offloading when it's degree <= accel's NUM_POLY_INT_COEFFS

Hi Richard, Thanks for your suggestions on RFC email, the attached patch adds support for streaming of poly_int when it's degree <= accel's NUM_POLY_INT_COEFFS. The patch changes streaming of poly_int as follows: Streaming out poly_int: degree = poly_int.degree(); stream out degree; for (i = 0;

Re: Performance improvement for std::to_chars(char* first, char* last, /* integer-type */ value, int base = 10 );

On Mon, 29 Jul 2024 at 10:45, Jonathan Wakely wrote: > > On Mon, 29 Jul 2024 at 09:42, Ehrnsperger, Markus > wrote: > > > > Hi, > > > > > > I'm attaching two files: > > > > 1.: to_chars10.h: > > > > This is intended to be included in libstdc++ / gcc to achieve performance > > improvements. It

Re: [PATCH ver 2] rs6000, Add new overloaded vector shift builtin int128, varients

Hi Carl, on 2024/7/27 06:37, Carl Love wrote: > GCC developers: > > Version 2, updated rs6000-overload.def to remove adding additonal internal > names and to change XXSLDWI_Q to XXSLDWI_1TI per comments from Kewen.  Move > new documentation statement for the PIVPR built-ins per comments from Ke

Re: [PATCH] rs6000, add comment to VEC_IC definition

Hi Carl, on 2024/7/27 07:31, Carl Love wrote: > GCC maintainers: > > This patch adds a comment to the VEC_IC definitions to clarify the V1TI > "TARGET_POWER10" mode per the request by Segher in the feedback to patch > "https://gcc.gnu.org/pipermail/gcc-patches/2024-July/658156.html";. > > http

Re: [PATCH v1 1/2] PR116080: Fix tail call dejagnu checks

Hi Andi! I'm lacking all possible context here, but I noticed: On 2024-07-25T15:55:01-0700, Andi Kleen wrote: > - Run the target_effective tail_call checks without optimization to > match the actual test cases. > --- a/gcc/testsuite/lib/target-supports.exp > +++ b/gcc/testsuite/lib/target-suppo

Re: [PATCH v1 0/3][libgcc] store signing key and signing method in DWARF _Unwind_FrameState

On 2024-07-19 15:54, Matthieu Longo wrote: This patch series is only a refactoring of the existing implementation of PAuth and returned-address signing. The existing behavior is preserved. 1. aarch64: store signing key and signing method in DWARF _Unwind_FrameState _Unwind_FrameState already c

Ping: [PATCH] recog: Disallow subregs in mode-punned value [PR115881]

Ping Richard Sandiford writes: > In g:9d20529d94b23275885f380d155fe8671ab5353a, I'd extended > insn_propagation to handle simple cases of hard-reg mode punning. > The punned "to" value was created using simplify_subreg rather > than simplify_gen_subreg, on the basis that hard-coded subregs > aren

Re: [PATCHv2 2/2] libiberty/buildargv: handle input consisting of only white space

Hi! On 2024-02-10T17:26:01+, Andrew Burgess wrote: > --- a/libiberty/argv.c > +++ b/libiberty/argv.c > @@ -439,17 +442,8 @@ expandargv (int *argcp, char ***argvp) > } >/* Add a NUL terminator. */ >buffer[len] = '\0'; > - /* If the file is empty or contains only wh

Re: [RFC v1 0/2] c: Add _Lengthof operator

On Sun, 28 Jul 2024, Alejandro Colomar wrote: > gcc/Makefile.in | 1 + > gcc/c-family/c-common.cc | 20 + > gcc/c-family/c-common.def | 4 ++ > gcc/c-family/c-common.h | 2 + > gcc/c/c-parser.cc | 35 +++ > gcc/c/c-tree.h

Re: Support streaming of poly_int for offloading when it's degree <= accel's NUM_POLY_INT_COEFFS

On Mon, 29 Jul 2024, Prathamesh Kulkarni wrote: > Hi Richard, > Thanks for your suggestions on RFC email, the attached patch adds support for > streaming of poly_int when it's degree <= accel's NUM_POLY_INT_COEFFS. > The patch changes streaming of poly_int as follows: > > Streaming out poly_int:

Looking for someone to do paid work on SH backend

Hello, the SH backend in GCC is currently in rather poor shape and could need some overhaul and for that matter, I'm looking for an experienced GCC developer who might be willing to fix some bugs in the backend for money. I have started similar efforts in the past for the avr, m68k and vax backen

Re: [PATCH] doc: Improve punctuation and grammar in -fdiagnostics-format docs

On 15/03/24 13:02 +, Jonathan Wakely wrote: OK for trunk? Ping -- >8 -- The hyphen can be misunderstood to mean "emitted to -" i.e. stdout. Refer to both forms by name, rather than using "the former" for one and referring to the other by name. gcc/ChangeLog: * doc/invoke.texi (

[Patch] libgomp.texi: Update 'Device Information Routines' section

I recently stumbled over omp_get_default_device returning -1 (= omp_initial_device) vs. returning omp_get_num_devices(). Thus, it makes sense to document this properly. I also updated some wording and made a tiny step to documenting the missing functions by adding a title to the commented @menu

Re: [PATCH v3 2/3] aarch64: Add support for moving fpm system register

Claudio Bantaloukas writes: > Unlike most system registers, fpmr can be heavily written to in code that > exercises the fp8 functionality. That is because every fp8 instrinsic call > can potentially change the value of fpmr. > Rather than just use a an unspec, we treat the fpmr system register lik

[PATCH 1/3] Add TARGET_MODE_CAN_TRANSFER_BITS

The following adds a target hook to specify whether regs of MODE can be used to transfer bits. The hook is supposed to be used for value-numbering to decide whether a value loaded in such mode can be punned to another mode instead of re-loading the value in the other mode and for SRA to decide whe

[PATCH 2/3] [x86] implement TARGET_MODE_CAN_TRANSFER_BITS

The following implements the hook, excluding x87 modes. * i386.cc (TARGET_MODE_CAN_TRANSFER_BITS): Define. (ix86_mode_can_transfer_bits): New function. --- gcc/config/i386/i386.cc | 11 +++ 1 file changed, 11 insertions(+) diff --git a/gcc/config/i386/i386.cc b/gcc/config

[PATCH 3/3] tree-optimization/114659 - VN and FP to int punning

The following addresses another case where x87 FP loads mangle the bit representation and thus are not suitable for a representative in other types. VN was value-numbering a later integer load of 'x' as the same as a former float load of 'x'. We can use the new TARGET_MODE_CAN_TRANSFER_BITS hook

Re: [PATCH 4/5] RISC-V: Add support to vector stack-clash protection

On Fri, Jul 26, 2024 at 6:48 PM Jeff Law wrote: > > > > On 7/24/24 12:00 PM, Raphael Moreira Zinsly wrote: > > Adds basic support to vector stack-clash protection using a loop to do > > the probing and stack adjustments. > > > > gcc/ChangeLog: > > * config/riscv/riscv.cc > > (riscv_all

RE: [PATCH v1] Widening-Mul: Try .SAT_SUB for PLUS_EXPR when one op is IMM

> OK Committed, thanks Richard. Pan -Original Message- From: Richard Biener Sent: Monday, July 29, 2024 5:03 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; tamar.christ...@arm.com; jeffreya...@gmail.com; rdapp@gmail.com Subject: Re: [PATC

[PATCH 1/2] c++: fix ICE on FUNCTION_DECLs inside coroutines [PR115906]

When register_local_var_uses iterates a BIND_EXPRs BIND_EXPR_VARS, it fails to account for the fact that FUNCTION_DECLs might be present, and later passes it to DECL_HAS_VALUE_EXPR_P. This leads to a tree check failure in DECL_HAS_VALUE_EXPR_P: tree check: expected var_decl or parm_decl or resu

[PATCH 2/2] c++: diagnose usage of co_await and co_yield in default args [PR115906]

This is a partial fix for PR115906. Per [expr.await] 2s3, "An await-expression shall not appear in a default argument ([dcl.fct.default])". This patch introduces the diagnostic in that case, and in the case of a co_yield (as co_yield is defined in terms of co_await, so prerequisites of co_await h

[PATCH] c++: make BUILTIN_SOURCE_LOCATION follow DECL_RAMP_FN

This fixes the value of current_function in compiler generated coroutine code. PR c++/110855 - std::source_location doesn't work with C++20 coroutine gcc/cp/ChangeLog: PR c++/110855 * cp-gimplify.cc (fold_builtin_source_location): Use the name of the DECL_RAMP_FN of the c

RE: [PATCH v1] Internal-fn: Handle vector bool type for type strict match mode [PR116103]

> OK. Thanks Richard, will wait the confirmation from Thomas in case I missed some more failed cases. Pan -Original Message- From: Richard Biener Sent: Monday, July 29, 2024 4:44 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; tamar.christ...

Re: [PATCH 1/3] Add TARGET_MODE_CAN_TRANSFER_BITS

On Mon, Jul 29, 2024 at 02:14:40PM +0200, Richard Biener wrote: > The following adds a target hook to specify whether regs of MODE can be > used to transfer bits. The hook is supposed to be used for value-numbering > to decide whether a value loaded in such mode can be punned to another > mode ins

Re: [PATCH] RISC-V: Expand subreg move via slide if necessary [PR116086].

Jeff Law writes: > On 7/26/24 2:42 PM, Robin Dapp wrote: >> Hi, >> >> when the source mode is potentially larger than one vector (e.g. an >> LMUL2 mode for VLEN=128) we don't know which vector the subreg actually >> refers to. For zvl128b and LMUL=2 the subreg in (subreg:V2DI (reg:V4DI)) >> coul

Re: [PATCH] RISC-V: Expand subreg move via slide if necessary [PR116086].

Richard Sandiford writes: > A somewhat similar situation can happen for SVE with subregs like: > > (subreg:V4SI (reg:VNx8SI R) 16) > > IMO, what ought to happen here is that the RA should spill > the inner register to memory and load the V4SI back from there. > (Or vice versa, for an lvalue.) O

Re: [PATCHv2 2/2] libiberty/buildargv: handle input consisting of only white space

Thomas Schwinge writes: > Hi! > > On 2024-02-10T17:26:01+, Andrew Burgess wrote: >> --- a/libiberty/argv.c >> +++ b/libiberty/argv.c > >> @@ -439,17 +442,8 @@ expandargv (int *argcp, char ***argvp) >> } >>/* Add a NUL terminator. */ >>buffer[len] = '\0'; >> - /* If

Re: [PATCH 1/3] Add TARGET_MODE_CAN_TRANSFER_BITS

On Mon, 29 Jul 2024, Jakub Jelinek wrote: > On Mon, Jul 29, 2024 at 02:14:40PM +0200, Richard Biener wrote: > > The following adds a target hook to specify whether regs of MODE can be > > used to transfer bits. The hook is supposed to be used for value-numbering > > to decide whether a value load

Re: [PATCH 1/3] Add TARGET_MODE_CAN_TRANSFER_BITS

On Mon, Jul 29, 2024 at 02:52:24PM +0200, Richard Biener wrote: > > mode = GET_MODE_INNER (mode); > > ? > > I specifically wanted to avoid this (at least for the purpose of the > hook). > > > I mean say XCmode has similar problems as XFmode, or > > V4SFmode as SFmode if i?86 -mno-sse. > > Thoug

Re: [PATCH 2/3] [x86] implement TARGET_MODE_CAN_TRANSFER_BITS

On Mon, 29 Jul 2024, Richard Biener wrote: > The following implements the hook, excluding x87 modes. Jakub correctly pointed out complex modes, so I've adjusted the hook to the following which might be easier to parse (and handles decimal FP modes as returning true). Re-testing in progress. /*

Re: [patch,avr] PR115830: Improve code by using more condition code

Am 10.07.24 um 01:17 schrieb Jeff Law: On 7/9/24 4:03 AM, Georg-Johann Lay wrote: Hi Jeff, This patch adds peephole2s and insns to make better use of instructions that set condition code (SREG) as a byproduct. Of course with cc0 all this was *much* simpler... so here we go; adding CCNmode and

Re: [PATCH 1/3] Add TARGET_MODE_CAN_TRANSFER_BITS

On Mon, Jul 29, 2024 at 02:59:58PM +0200, Jakub Jelinek wrote: > On Mon, Jul 29, 2024 at 02:52:24PM +0200, Richard Biener wrote: > > > mode = GET_MODE_INNER (mode); > > > ? > > > > I specifically wanted to avoid this (at least for the purpose of the > > hook). > > > > > I mean say XCmode has si

Re: [PATCH 1/3] Add TARGET_MODE_CAN_TRANSFER_BITS

On Mon, 29 Jul 2024, Jakub Jelinek wrote: > On Mon, Jul 29, 2024 at 02:52:24PM +0200, Richard Biener wrote: > > > mode = GET_MODE_INNER (mode); > > > ? > > > > I specifically wanted to avoid this (at least for the purpose of the > > hook). > > > > > I mean say XCmode has similar problems as XF

Re: [PATCH] RISC-V: Add configure check for B extention support

LGTM, although I said no binutils check for zacas and zabha, but B is a different situation since GCC will add that if zba, zbb and zbs are all present. On Thu, Jul 25, 2024 at 7:51 AM Edwin Lu wrote: > > Binutils 2.42 and before don't recognize the B extension in the march > strings even thoug

Re: [RFH PATCH] c++: Implement C++26 P2963R3 - Ordering of constraints involving fold expressions [PR115746]

On Fri, Jul 26, 2024 at 06:00:12PM -0400, Patrick Palka wrote: > On Fri, 26 Jul 2024, Jakub Jelinek wrote: > > > On Fri, Jul 26, 2024 at 04:42:36PM -0400, Patrick Palka wrote: > > > > // P2963R3 - Ordering of constraints involving fold expressions > > > > // { dg-do compile { target c++20 } } > >

Re: [PATCH v3] RISC-V: Implement __init_riscv_feature_bits, __riscv_feature_bits, and __riscv_vendor_feature_bits

> > This API is intended to provide the capability to query minimal common > > available extensions on the system. > > > > Proposal in riscv-c-api-doc: > > https://github.com/riscv-non-isa/riscv-c-api-doc/pull/74 > > That's not merged, but I'm not sure what the rules are on stability for > the C

Re: [RFC/RFA][PATCH 0/2] SVE intrinsics: Add strength reduction for division by constant.

On 17 Jul 2024, at 09:29, Richard Sandiford wrote: > > External email: Use caution opening links or attachments > > > Jennifer Schmitz writes: >> This patch series is part of an ongoing effort to replace the SVE intrinsic >> svdiv >> by lower-strength instructions for division by constant. To

Re: [PATCH 1/2] SVE intrinsics: Add strength reduction for division by constant.

Dear Richard, I revised the patch according to your comments and also implemented the transform for unsigned division; more comments inline below. The new patch was bootstrapped and tested again. Looking forward to your feedback. Thanks, Jennifer 0001-SVE-intrinsics-Add-strength-reduction-for-d

Re: [Patch] libgomp.texi: Update 'Device Information Routines' section

On 7/29/24 06:12, Tobias Burnus wrote: I recently stumbled over omp_get_default_device returning -1 (= omp_initial_device) vs. returning omp_get_num_devices(). Thus, it makes sense to document this properly. I also updated some wording and made a tiny step to documenting the missing functions

Re: [PATCH 4/5] RISC-V: Add support to vector stack-clash protection

On 7/29/24 6:18 AM, Raphael Zinsly wrote: On Fri, Jul 26, 2024 at 6:48 PM Jeff Law wrote: On 7/24/24 12:00 PM, Raphael Moreira Zinsly wrote: Adds basic support to vector stack-clash protection using a loop to do the probing and stack adjustments. gcc/ChangeLog: * config/riscv/ris

[r15-2378 Regression] FAIL: gfortran.dg/compiler-directive_2.f -O (test for excess errors) on Linux/x86_64

On Linux/x86_64, 29b1587e7d34667a1fd63071c1e4f5475cd71026 is the first bad commit commit 29b1587e7d34667a1fd63071c1e4f5475cd71026 Author: Tobias Burnus Date: Mon Jul 29 11:46:57 2024 +0200 OpenMP/Fortran: Fix handling of 'declare target' with 'link' clause [PR115559] caused FAIL: gfortr

[PATCH] btf: Protect BTF_KIND_INFO against invalid kind

If the user provides a kind value that is more than 5 bits, the BTF_KIND_INFO macro would emit incorrect values for info (by clobbering values of the kind flag). Tested on x86_64-redhat-linux. include/ChangeLog: * btf.h (BTF_TYPE_INFO): Protect against user providing invalid ki

Re: [PATCH 4/5] RISC-V: Add support to vector stack-clash protection

On Mon, Jul 29, 2024 at 11:20 AM Jeff Law wrote: > > > > On 7/29/24 6:18 AM, Raphael Zinsly wrote: > > On Fri, Jul 26, 2024 at 6:48 PM Jeff Law wrote: > >> > >> > >> > >> On 7/24/24 12:00 PM, Raphael Moreira Zinsly wrote: > >>> Adds basic support to vector stack-clash protection using a loop to d

[PATCH v1] gcc/: Rename array_type_nelts() => array_type_nelts_minus_one()

The old name was misleading. While at it, also rename some temporary variables that are used with this function, for consistency. Link: https://inbox.sourceware.org/gcc-patches/9fffd80-dca-2c7e-14b-6c9b509a7...@redhat.com/T/#m2f661c67c8f7b2c405c8c7fc3152dd85dc729120 Cc: Gabriel Ravier Cc: Marti

Re: [PATCH] rs6000, add comment to VEC_IC definition

Kewen: On 7/29/24 3:21 AM, Kewen.Lin wrote: index 0d3e0a24e11..75d95ccfb47 100644 --- a/gcc/config/rs6000/vector.md +++ b/gcc/config/rs6000/vector.md @@ -26,7 +26,8 @@  ;; Vector int modes  (define_mode_iterator VEC_I [V16QI V8HI V4SI V2DI]) -;; Vector int modes for comparison, shift and rota

Re: [PATCH v2] gimple ssa: Teach switch conversion to optimize powers of 2 switches

Hi Richard, > > Sorry, I'm not sure if I understand. Are you suggesting something like > > this? > > > > if (idom(default bb) == cond bb) > > { > > if (exists a path from default bb to final bb) > > { > > idom(final bb) = cond bb; > > } > > else > > { > > idom(final bb) = swit

Ping * 2: [PATCH v2] Provide more contexts for -Warray-bounds warning messages

The 2nd ping for the following patch: https://gcc.gnu.org/pipermail/gcc-patches/2024-July/657150.html thanks. Qing > On Jul 22, 2024, at 09:01, Qing Zhao wrote: > > Hi, Richard, > > Could you please take a look at the patch and let me know any comment you > have (especially on the middle-en

[PATCH] c++: generic lambda as default template argument [PR88313]

Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for trunk and perhaps 14.3? It should only make a differenc for C++20 code where lambdas are permitted as template arguments. -- >8 -- Here we're rejecting the generic lambda inside the default template argument ultimately beca

Re: [PATCH ver 2] rs6000, Add new overloaded vector shift builtin int128, varients

On 7/29/24 5:21 AM, Kewen.Lin wrote: > on 2024/7/27 06:37, Carl Love wrote: >> --- /dev/null >> +++ b/gcc/testsuite/gcc.target/powerpc/vec-shift-double-runnable-int128.c >> @@ -0,0 +1,358 @@ >> +/* { dg-do run { target power10_hw } } */ >> +/* { dg-do link { target { ! power10_hw } } } */ >> +/* {

Polish libstdc++ 'dg-final' action 'file-io-diff' (was: [PATCH 4/8] libstdc++: Add file-io-diff to replace @diff@ markup in I/O tests)

Hi Jonathan! On 2024-07-22T17:28:38+0100, Jonathan Wakely wrote: > This adds a new dg-final action to compare two files after a test has > run, [...] Nice! > --- a/libstdc++-v3/testsuite/lib/libstdc++.exp > +++ b/libstdc++-v3/testsuite/lib/libstdc++.exp > +# Compare output file written by test

Re: [PATCH v1 1/2] PR116080: Fix tail call dejagnu checks

> ..., that means that a number of the new test cases are UNSUPPORTED, for > example, x86_64 GNU/Linux: > > +UNSUPPORTED: c-c++-common/musttail1.c -Wc++-compat > +UNSUPPORTED: c-c++-common/musttail12.c -Wc++-compat > +PASS: c-c++-common/musttail13.c -Wc++-compat (test for errors

Re: [PATCH v1] Internal-fn: Handle vector bool type for type strict match mode [PR116103]

pan2...@intel.com writes: > From: Pan Li > > For some target like target=amdgcn-amdhsa, we need to take care of > vector bool types prior to general vector mode types. Or we may have > the asm check failure as below. > > gcc.target/gcn/cond_smax_1.c scan-assembler-times \\tv_cmp_gt_i32\\tvcc, >

Re: Polish libstdc++ 'dg-final' action 'file-io-diff' (was: [PATCH 4/8] libstdc++: Add file-io-diff to replace @diff@ markup in I/O tests)

On Mon, 29 Jul 2024 at 17:02, Thomas Schwinge wrote: > > Hi Jonathan! > > On 2024-07-22T17:28:38+0100, Jonathan Wakely wrote: > > This adds a new dg-final action to compare two files after a test has > > run, [...] > > Nice! > > > --- a/libstdc++-v3/testsuite/lib/libstdc++.exp > > +++ b/libstdc++

Re: Support streaming of poly_int for offloading when it's degree <= accel's NUM_POLY_INT_COEFFS

Richard Biener writes: > On Mon, 29 Jul 2024, Prathamesh Kulkarni wrote: > >> Hi Richard, >> Thanks for your suggestions on RFC email, the attached patch adds support >> for streaming of poly_int when it's degree <= accel's NUM_POLY_INT_COEFFS. >> The patch changes streaming of poly_int as follow

[COMMITTED] [PATCH] testsuite: make PR115277 test an execute one

PR middle-end/115277 * gcc.c-torture/compile/pr115277.c: Rename to... * gcc.c-torture/execute/pr115277.c: ...this. --- ACKed on IRC by honza. Pushed. gcc/testsuite/gcc.c-torture/{compile => execute}/pr115277.c | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename gc

Re: [PATCH 1/3] Add TARGET_MODE_CAN_TRANSFER_BITS

Richard Biener writes: > On Mon, 29 Jul 2024, Jakub Jelinek wrote: >> And, for the GET_MODE_INNER, I also meant it for Aarch64/RISC-V VL vectors, >> I think those should be considered as true by the hook, not false >> because maybe_ne. > > I don't think relevant modes will have size/precision mism

Re: [PATCH 6/4] libbacktrace: Add loaded dlls after initialize

On Fri, Mar 15, 2024 at 1:41 PM Björn Schäpers wrote: > > Am 10.01.2024 um 13:34 schrieb Eli Zaretskii: > >> Date: Tue, 9 Jan 2024 21:02:44 +0100 > >> Cc: i...@google.com, gcc-patches@gcc.gnu.org, g...@gcc.gnu.org > >> From: Björn Schäpers > >> > >> Am 07.01.2024 um 18:03 schrieb Eli Zaretskii: >

Re: [PATCH v1 1/2] PR116080: Fix tail call dejagnu checks

I'm going to revert the patch for now. There are two problems: - The new tests don't have a unique name so the caching confuses the results. - To test with -O2 we need explicit musttail checks because tail call doesn't run with -O0 w/o musttail.

Re: [PATCH 6/4] libbacktrace: Add loaded dlls after initialize

> From: Ian Lance Taylor > Date: Mon, 29 Jul 2024 09:46:46 -0700 > Cc: Eli Zaretskii , gcc-patches@gcc.gnu.org, g...@gcc.gnu.org > > On Fri, Mar 15, 2024 at 1:41 PM Björn Schäpers wrote: > > > > Am 10.01.2024 um 13:34 schrieb Eli Zaretskii: > > >> Date: Tue, 9 Jan 2024 21:02:44 +0100 > > >> Cc:

[PATCH 1/2] libstdc++: Fix std::format output for std::chrono::zoned_time

My first attempt to fix this was an overly complex kluge, but there was a nice simple solution staring me in the face. I'm pretty happy with this now. Tested x86_64-linux. -- >8 -- When formatting a chrono::zoned_time with an empty chrono-specs, we were only formatting its _M_time member, but th

[PATCH 2/2] libstdc++: Fix formatter for low-resolution chrono::zoned_time (LWG 4124)

Tested x86_64-linux. -- >8 -- This implements the proposed resolution of LWG 4124, so that low-resolution chrono::zoned_time objects can be formatted. The formatter for zoned_time needs to account for get_local_time returning local_time> not local_time. libstdc++-v3/ChangeLog: * include

[PATCH] PR116080: Fix test suite checks for musttail

From: Andi Kleen This is a new attempt to fix PR116080. The previous try was reverted because it just broke a bunch of tests, hiding the problem. - musttail behaves differently than tailcall at -O0. Some of the test run at -O0, so add separate effective target tests for musttail. - New effective

Re: [PATCH] btf: Protect BTF_KIND_INFO against invalid kind

On 7/29/24 07:42, Will Hawkins wrote: > If the user provides a kind value that is more than 5 bits, the > BTF_KIND_INFO macro would emit incorrect values for info (by clobbering > values of the kind flag). > > Tested on x86_64-redhat-linux. OK, thanks. > > include/ChangeLog: > > * btf.

[COMMITTED] gcc: xtensa: disable late-combine by default

gcc/ * config/xtensa/xtensa.cc (xtensa_option_override_after_change): New function. (TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE): Define as xtensa_option_override_after_change. (xtensa_option_override): Call xtensa_option_override_after_change. --- gcc/con

Re: [PATCH] doc: Improve punctuation and grammar in -fdiagnostics-format docs

On Fri, 2024-03-15 at 13:02 +, Jonathan Wakely wrote: > OK for trunk? LGTM, thanks Dave > > -- >8 -- > > The hyphen can be misunderstood to mean "emitted to -" i.e. stdout. > Refer to both forms by name, rather than using "the former" for one > and > referring to the other by name. > > gc

[Patch] gimplify.cc: Handle VALUE_EXPR of MEM_REF's ADDR_EXPR argument [PR115637]

The problem is code like: MEM [(c_char * {ref-all})&arr2] where arr2 is the value expr '*arr2$13$linkptr' (i.e. indirect ref + decl name). Insidepass_omp_target_link::execute, there is a call to gimple_regimplify_operands but the value expression is not expanded.There are two problems: ADD

Re: [PATCH] c++: generic lambda as default template argument [PR88313]

On 7/29/24 11:38 AM, Patrick Palka wrote: Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for trunk and perhaps 14.3? It should only make a differenc for C++20 code where lambdas are permitted as template arguments. OK for both. -- >8 -- Here we're rejecting the generic

Re: [PATCH] c++: make BUILTIN_SOURCE_LOCATION follow DECL_RAMP_FN

I don't know what all-caps BUILTIN_SOURCE_LOCATION refers to specifically (it doesn't match CP_BUILT_IN_SOURCE_LOCATION, for instance); let's just refer to source_location. On 7/29/24 8:20 AM, Arsen Arsenović wrote: This fixes the value of current_function in compiler generated coroutine code.

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