Hi Paul,
this looks good to me and is OK for mainline. When it has survived a
week or two, backporting at least to 14-branch (ideally before 14.2
release) would be a good thing!
Regarding the following excerpt of the testcase:
+! Commented out lines give implicit type warnings with gfortran an
On Thu, Jun 13, 2024 at 5:32 AM Jonathan Wakely wrote:
>
> On 11/05/24 02:01 -0700, Ken Matsui wrote:
> >This patch optimizes the compilation performance of std::is_pointer
> >by dispatching to the new __is_pointer built-in trait.
> >
> >libstdc++-v3/ChangeLog:
> >
> > * include/bits/cpp_typ
I triggered an ICE on Ubuntu 24.04 when compiling code that uses
function attributes. Looking into the sources shows that we have
a systematic issue in the attribute handling code:
* we determine the length with strlen() (excluding the terminating null)
* we allocate a buffer with this length
* we
2024. május 18., szombat 3:01 keltezéssel, Barnabás Pőcze
írta:
> Hi
>
>
> 2024. március 13., szerda 12:43 keltezéssel, Jonathan Wakely
> írta:
>
> > On Mon, 11 Mar 2024 at 23:36, Barnabás Pőcze wrote:
> > >
> > > Previously, calling erase(key) on both std::map and std::set
> > > would execut
On Fri, 14 Jun 2024, Richard Biener wrote:
> > I hope you'll find this all useful. As it happens I don't need to verify
> > my needs with a RISC-V target anymore, so I'm leaving it all up to you now
> > as I need to switch back to Alpha, which has been my actual objective, and
> > these rebuilds
Xi Ruoyao 于2024年6月9日周日 21:50写道：
>
> A move/bstrins pair is as fast as a (addi.w|lu12i.w|lu32i.d|lu52i.d)/and
> pair, and twice fast as a srli/slli pair. When the src reg and the dst
Just want to know that why not adjust the RTX cost of bstrins vs srli/slli?
It may benefit more cases.
> reg happ
On 6/13/24 10:26 PM, Peter Bergner wrote:
> On 6/13/24 9:26 PM, Kewen.Lin wrote:
I understand this is just copied from the if arm, but if I read this
right, it can be
simplified as:
>>>
>>> Ok, I'll retest with that simplification.
>
> So I retested a normal powerpc64le-linux build
GCC maintainers:
Per the additional feedback after patch:
commit c892525813c94b018464d5a4edc17f79186606b7
Author: Carl Love
Date: Tue Jun 11 14:01:16 2024 -0400
rs6000, altivec-2-runnable.c should be a runnable test
The test case has "dg-do compile" set not "dg-do run"
Hi!
On Fri, Jun 14, 2024 at 11:37:46AM -0700, Carl Love wrote:
> /* { dg-do run } */
> -/* { dg-options "-mvsx" } */
> -/* { dg-additional-options "-mdejagnu-cpu=power8" { target { ! has_arch_pwr8
> } } } */
> -/* { dg-require-effective-target powerpc_vsx } */
> +/* { dg-options "-O2 -mdejagnu-c
From: Pan Li
Separate the vector part code to one standalone header file, which
is independent with the scalar part.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-1.c: Leverage
the new header file for vector part.
* gcc.target/riscv/rvv/aut
LGTM
juzhe.zh...@rivai.ai
From: pan2.li
Date: 2024-06-15 10:44
To: gcc-patches
CC: juzhe.zhong; kito.cheng; jeffreyalaw; rdapp.gcc; Pan Li
Subject: [PATCH v1] RISC-V: Refine the SAT_ARITH test help header files [NFC]
From: Pan Li
Separate the vector part code to one standalone header file,
"Kewen.Lin" writes:
> Hi Gaius,
>
>>> static tree
>>> build_m2_short_real_node (void)
>>> {
>>> - tree c;
>>> -
>>> - /* Define `REAL'. */
>>> -
>>> - c = make_node (REAL_TYPE);
>>> - TYPE_PRECISION (c) = FLOAT_TYPE_SIZE;
>>> - layout_type (c);
>>> - return c;
>>> + /* Define `SHORTREA
Oooops, thanks for catching that! It's LGTM:)
Christoph Müllner 於 2024年6月15日 週六 04:58 寫道：
> I triggered an ICE on Ubuntu 24.04 when compiling code that uses
> function attributes. Looking into the sources shows that we have
> a systematic issue in the attribute handling code:
> * we determine th
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