Hi!
The Linux kernel and the following testcase distilled from it is
miscompiled, because tree-outof-ssa.cc (eliminate_phi) emits some
fixups on some of the edges (but doesn't commit edge insertions).
Later expand_asm_stmt emits further instructions on the same edge.
Now the problem is that expand
On Wed, 14 Feb 2024, Richard Sandiford wrote:
> Richard Biener writes:
> > On Wed, 14 Feb 2024, Richard Sandiford wrote:
> >
> >> Richard Biener writes:
> >> > The following avoids accessing out-of-bound vector elements when
> >> > native encoding a boolean vector with sub-BITS_PER_UNIT precisio
> -Original Message-
> From: Richard Sandiford
> Sent: Thursday, February 1, 2024 4:42 PM
> To: Tamar Christina
> Cc: Andrew Pinski ; gcc-patches@gcc.gnu.org; nd
> ; Richard Earnshaw ; Marcus
> Shawcroft ; Kyrylo Tkachov
>
> Subject: Re: [PATCH]AArch64: update vget_set_lane_1.c test outp
On Fri, Sep 15, 2023 at 11:43 AM Kees Cook via Gcc-patches
wrote:
>
> On Fri, Sep 15, 2023 at 05:47:08PM +, Qing Zhao wrote:
> >
> >
> > > On Sep 15, 2023, at 1:26 PM, Richard Biener
> > > wrote:
> > >
> > >
> > >
> > >> Am 15.09.2023 um 17:37 schrieb Qing Zhao :
> > >>
> > >>
> > >>
> > >
On Thu, 15 Feb 2024, Jakub Jelinek wrote:
> Hi!
>
> The build_bitint_stmt_ssa_conflicts hook has a special case for
> multiplication, division and modulo, where to ensure there is no overlap
> between lhs and rhs1/rhs2 arrays we make the lhs conflict with the
> operands.
> On the following testca
On Fri, Feb 09, 2024 at 11:03:38AM +0100, Jakub Jelinek wrote:
> On Wed, Feb 07, 2024 at 12:43:59PM +0100, arthur.co...@embecosm.com wrote:
> > From: Philip Herron
> >
> > This patch introduces one regression because generics are getting better
> > understood over time. The code here used to appl
Hi Edwin,
Sorry for late reply due to holiday. I double-checked the
calling-convernsion-*.c dump, it is safe to adjust the asm check to the number
as you mentioned.
Pan
-Original Message-
From: Edwin Lu
Sent: Tuesday, February 6, 2024 2:42 AM
To: Li, Pan2 ; juzhe.zh...@rivai.ai; gcc-
Richard Biener writes:
> On Wed, 14 Feb 2024, Richard Sandiford wrote:
>
>> Richard Biener writes:
>> > On Wed, 14 Feb 2024, Richard Sandiford wrote:
>> >
>> >> Richard Biener writes:
>> >> > The following avoids accessing out-of-bound vector elements when
>> >> > native encoding a boolean vecto
On 2/14/24 3:55 PM, Richard Earnshaw (lists) wrote:
On 14/02/2024 09:20, Tejas Belagod wrote:
On 2/7/24 11:41 PM, Richard Earnshaw (lists) wrote:
On 07/02/2024 07:59, Tejas Belagod wrote:
This patch fixes a bug that causes indirect calls in PAC-enabled functions
to be tailcalled incorrectly wh
The output of -march=help is like below:
```
All available -march extensions for RISC-V:
NameVersion
i 2.0, 2.1
e 2.0
m 2.0
a 2.0, 2.1
f
The following avoids recording BB dependences for debug stmt uses.
Bootstrap and regtest running on x86_64-unknown-linux-gnu.
It's unlikely a dependence is just because of debug stmts so
actual compare-debug issues are very unlikely. Still spotted
while investigating a CI regression mail (for an
On 15/02/2024 07:49, Richard Biener wrote:
On Wed, 14 Feb 2024, Andrew Stubbs wrote:
On 14/02/2024 13:43, Richard Biener wrote:
On Wed, 14 Feb 2024, Andrew Stubbs wrote:
On 14/02/2024 13:27, Richard Biener wrote:
On Wed, 14 Feb 2024, Andrew Stubbs wrote:
On 13/02/2024 08:26, Richard Biene
On Thu, Feb 15, 2024 at 11:00:29AM +0100, Richard Biener wrote:
> The following avoids recording BB dependences for debug stmt uses.
>
> Bootstrap and regtest running on x86_64-unknown-linux-gnu.
>
> It's unlikely a dependence is just because of debug stmts so
> actual compare-debug issues are ve
On Thu, Feb 15, 2024 at 12:16 AM Andrew Pinski wrote:
>
> Currently these use `@var{m3}` but the 3 here is a literal 3
> and not part of the mode itself so it should not be inside
> the var. Fixed as such.
>
> Built the documentation to make sure it looks correct now.
OK
> gcc/ChangeLog:
>
>
On Thu, Feb 15, 2024 at 12:16 AM Andrew Pinski wrote:
>
> In some of the standard pattern names, it is not obvious which mode is being
> used in the pattern
> name. Is it operand 0, 1, or 2? Is it the wider mode or the narrower mode?
> This fixes that so there is no confusion by adding a sentence
On Thu, 15 Feb 2024, Richard Sandiford wrote:
> Richard Biener writes:
> > On Wed, 14 Feb 2024, Richard Sandiford wrote:
> >
> >> Richard Biener writes:
> >> > On Wed, 14 Feb 2024, Richard Sandiford wrote:
> >> >
> >> >> Richard Biener writes:
> >> >> > The following avoids accessing out-of-bou
On Thu, 15 Feb 2024, Andrew Stubbs wrote:
> On 15/02/2024 07:49, Richard Biener wrote:
> > On Wed, 14 Feb 2024, Andrew Stubbs wrote:
> >
> >> On 14/02/2024 13:43, Richard Biener wrote:
> >>> On Wed, 14 Feb 2024, Andrew Stubbs wrote:
> >>>
> On 14/02/2024 13:27, Richard Biener wrote:
> >
Hi!
On 2024-02-15T08:49:17+0100, Richard Biener wrote:
> On Wed, 14 Feb 2024, Andrew Stubbs wrote:
>> On 14/02/2024 13:43, Richard Biener wrote:
>> > On Wed, 14 Feb 2024, Andrew Stubbs wrote:
>> >> On 14/02/2024 13:27, Richard Biener wrote:
>> >>> On Wed, 14 Feb 2024, Andrew Stubbs wrote:
>>
On Thu, Feb 15, 2024 at 10:56 AM Kito Cheng wrote:
>
> The output of -march=help is like below:
>
> ```
> All available -march extensions for RISC-V:
> NameVersion
> i 2.0, 2.1
> e 2.0
> m
Hi, this I a new version of the patch updating some additional tests
because some of the LTO tests required a newer binutils than my distro had.
---
The Arm Architectural Reference Manual (Version J.a, section A2.9 on FEAT_LS64)
shows that ls64 is an optional extensions and should not be enabled
Hi All,
This test has never worked on AArch64 since the day it was committed. It has
a number of issues that prevent it from working on AArch64:
1. IEEE does not require that FP operations raise a SIGFPE for FP operations,
only that an exception is raised somehow.
2. Most Arm designed core
On 15/02/2024 10:21, Richard Biener wrote:
[snip]
I suppse if RDNA really only has 32 lane vectors (it sounds like it,
even if it can "simulate" 64 lane ones?) then it might make sense to
vectorize for 32 lanes? That said, with variable-length it likely
doesn't matter but I'd not expose fixed-si
On 15/02/2024 10:57, Tamar Christina wrote:
> Hi All,
>
> This test has never worked on AArch64 since the day it was committed. It has
> a number of issues that prevent it from working on AArch64:
>
> 1. IEEE does not require that FP operations raise a SIGFPE for FP operations,
> only that
> -Original Message-
> From: Richard Earnshaw (lists)
> Sent: Thursday, February 15, 2024 11:01 AM
> To: Tamar Christina ; gcc-patches@gcc.gnu.org
> Cc: nd ; Marcus Shawcroft ; Kyrylo
> Tkachov ; Richard Sandiford
>
> Subject: Re: [PATCH]AArch64: xfail modes_1.f90 [PR107071]
>
> On 15/02
> Ah oops I glanced over the /* { dg-do compile } */part. It should be
> fine to add '-march=rv64gc' instead then?
Hmm it's a bit tricky. So generally -mcpu=sifive-p670 includes rv64
but it does not override a previously specified -march=rv32 (that might
have been added by the test harness or the
Tested aarch64-linux and x86_64-linux (-m64 and -m32).
Pushed to trunk.
-- >8 --
For 32-bit targets without __int128 we need to implement the LCG
transition function by hand using 64-bit types.
We can also slightly simplify the __mod function by using if-constexpr
unconditionally, disabling -Wc
Tested aarch64-linux and x86_64-linux. Pushed to trunk.
This should be backported too, as it's a regression fix.
-- >8 --
The call to __valarray_copy constructs an _Array object to refer to
this->_M_data but that means that accesses to this->_M_data are through
a restrict-qualified pointer. This
Tested aarch64-linux. Pushed to trunk.
This should be backported to gcc-13 too.
-- >8 --
Import the new 2024a tzdata.zi file. The leapseconds file was also
updated to have a new expiry (no new leap seconds were added).
libstdc++-v3/ChangeLog:
* src/c++20/tzdata.zi: Import new file fro
Tested aarch64-linux and x86_64-linux. Pushed to trunk.
-- >8 --
The unused bits in the high word are already zero before this operation.
Shifting the used bits to the right cannot affect the unused bits, so we
don't need to sanitize them.
libstdc++-v3/ChangeLog:
PR libstdc++/113806
Tested aarch64-linux and x86_64-linux. Pushed to trunk.
-- >8 --
Signed 64-bit division is much slower than unsigned, so cast the n and
k values to unsigned before doing n %= k. We know this is safe because
neither value can be negative.
libstdc++-v3/ChangeLog:
PR libstdc++/113811
Tested aarch64-linux and x86_64-linux. Pushed to trunk.
-- >8 --
As pointed out in the PR we already do this for reset().
libstdc++-v3/ChangeLog:
PR libstdc++/113807
* include/std/bitset (bitset::set()): Use memset instead of a
loop over the individual words.
---
libstd
Hi Jakub,
On 2/15/24 10:10, Jakub Jelinek wrote:
On Fri, Feb 09, 2024 at 11:03:38AM +0100, Jakub Jelinek wrote:
On Wed, Feb 07, 2024 at 12:43:59PM +0100, arthur.co...@embecosm.com wrote:
From: Philip Herron
This patch introduces one regression because generics are getting better
understood o
On Thu, 15 Feb 2024, Andrew Stubbs wrote:
> On 15/02/2024 10:21, Richard Biener wrote:
> [snip]
> >>> I suppse if RDNA really only has 32 lane vectors (it sounds like it,
> >>> even if it can "simulate" 64 lane ones?) then it might make sense to
> >>> vectorize for 32 lanes? That said, with varia
Hi Faust.
OK, thank you.
> Commit 77d0f9ec3809b4d2e32c36069b6b9239d301c030 inadvertently changed
> the normal asm dialect instruction template for zero_extendqidi2 from
> ldxb to ldxh. Fix that.
>
> Tested for bpf-unknown-none on x86_64-linux-gnu host.
>
> gcc/
>
> * config/bpf/bpf.md (zer
This patch optimizes the compilation performance of
std::add_rvalue_reference by dispatching to the new
__add_rvalue_reference built-in trait.
libstdc++-v3/ChangeLog:
* include/std/type_traits (add_rvalue_reference): Use
__add_rvalue_reference built-in trait.
(__add_rvalue
This patch implements built-in trait for std::remove_all_extents.
gcc/cp/ChangeLog:
* cp-trait.def: Define __remove_all_extents.
* semantics.cc (finish_trait_type): Handle
CPTK_REMOVE_ALL_EXTENTS.
gcc/testsuite/ChangeLog:
* g++.dg/ext/has-builtin-1.C: Test existe
This patch optimizes the compilation performance of
std::add_lvalue_reference by dispatching to the new
__add_lvalue_reference built-in trait.
libstdc++-v3/ChangeLog:
* include/std/type_traits (add_lvalue_reference): Use
__add_lvalue_reference built-in trait.
(__add_lvalue
This patch implements built-in trait for std::decay.
gcc/cp/ChangeLog:
* cp-trait.def: Define __decay.
* semantics.cc (finish_trait_type): Handle CPTK_DECAY.
gcc/testsuite/ChangeLog:
* g++.dg/ext/has-builtin-1.C: Test existence of __decay.
* g++.dg/ext/decay.C: N
Applied this patch
Johann
--
AVR: target 113927 - Simple code triggers stack frame for Reduced Tiny.
The -mmcu=avrtiny cores have no ADIW and SBIW instructions. This was
implemented by clearing all regs out of regclass ADDW_REGS so that
constraint "w" never matched. This corrupted the subset
This patch implements built-in trait for std::add_rvalue_reference.
gcc/cp/ChangeLog:
* cp-trait.def: Define __add_rvalue_reference.
* semantics.cc (finish_trait_type): Handle
CPTK_ADD_RVALUE_REFERENCE.
gcc/testsuite/ChangeLog:
* g++.dg/ext/has-builtin-1.C: Test
This patch implements built-in trait for std::add_lvalue_reference.
gcc/cp/ChangeLog:
* cp-trait.def: Define __add_lvalue_reference.
* semantics.cc (finish_trait_type): Handle
CPTK_ADD_LVALUE_REFERENCE.
gcc/testsuite/ChangeLog:
* g++.dg/ext/has-builtin-1.C: Test
This patch optimizes the compilation performance of std::decay
by dispatching to the new __decay built-in trait.
libstdc++-v3/ChangeLog:
* include/std/type_traits (decay): Use __decay built-in trait.
Signed-off-by: Ken Matsui
---
libstdc++-v3/include/std/type_traits | 6 ++
1 file
This patch optimizes the compilation performance of
std::remove_all_extents by dispatching to the new __remove_all_extents
built-in trait.
libstdc++-v3/ChangeLog:
* include/std/type_traits (remove_all_extents): Use
__remove_all_extents built-in trait.
Signed-off-by: Ken Matsui
-
On 15/02/2024 10:23, Thomas Schwinge wrote:
Hi!
On 2024-02-15T08:49:17+0100, Richard Biener wrote:
On Wed, 14 Feb 2024, Andrew Stubbs wrote:
On 14/02/2024 13:43, Richard Biener wrote:
On Wed, 14 Feb 2024, Andrew Stubbs wrote:
On 14/02/2024 13:27, Richard Biener wrote:
On Wed, 14 Feb 2024,
On Wed, 14 Feb 2024 at 21:48, François Dumont wrote:
>
> On 14/02/2024 20:44, Jonathan Wakely wrote:
>
>
>
> On Wed, 14 Feb 2024 at 18:39, François Dumont
> wrote:
>
>> libstdc++: [_GLIBCXX_DEBUG] Fix std::__niter_base behavior
>>
>> std::__niter_base is used in _GLIBCXX_DEBUG mode to remove
>>
Attached patch OK?
Copy/pasted for review convenience.
diff --git a/gcc/testsuite/c-c++-common/Wrestrict.c
b/gcc/testsuite/c-c++-common/Wrestrict.c
index 4d005a618b3..57a3f67e21e 100644
--- a/gcc/testsuite/c-c++-common/Wrestrict.c
+++ b/gcc/testsuite/c-c++-common/Wrestrict.c
@@ -381,14 +381,14
David: Ping
On Thu, 2024-02-08 at 08:59 -0500, Antoni Boucher wrote:
> David: Ping.
>
> On Wed, 2024-01-10 at 18:58 -0500, Antoni Boucher wrote:
> > Here it is: https://gcc.gnu.org/pipermail/jit/2023q4/001725.html
> >
> > On Wed, 2024-01-10 at 18:44 -0500, David Malcolm wrote:
> > > On Wed, 2024
David: Ping.
On Thu, 2024-02-08 at 17:09 -0500, Antoni Boucher wrote:
> Hi.
> This patch fixes the bug 113842.
> I cannot yet add a test with this patch since it requires using
> try/catch which is not yet merged in master.
> Thanks for the review.
On 12/02/2024 13:48, Matthieu Longo wrote:
> This patch marks a rev16 test as XFAIL for architectures having only Thumb1
> support. The generated code is functionally correct, but the optimization is
> disabled when -mthumb is equivalent to Thumb1. Fixing the root issue would
> requires changes
The following fixes the omission of failing to look at pattern
stmts when we need to dissolve SLP only groups.
Bootstrapped and tested on x86-64-unknown-linux-gnu, pushed.
PR tree-optimization/56
* tree-vect-loop.cc (vect_dissolve_slp_only_groups): Look
at the pattern
On Thu, 15 Feb 2024, Jakub Jelinek wrote:
> Hi!
>
> The Linux kernel and the following testcase distilled from it is
> miscompiled, because tree-outof-ssa.cc (eliminate_phi) emits some
> fixups on some of the edges (but doesn't commit edge insertions).
> Later expand_asm_stmt emits further instru
Andrew Pinski writes:
> The backend currently defines a whole vector shift left for 64bit vectors,
> adding the
> shift right can also improve code for some PERMs too. So this adds that
> pattern.
Is this reversed? It looks like we have the shift right and the patch is
adding the shift left (a
Hi!
This testcase has been fixed by the PR113921 fix, but unlike testcase
in there this one is not target specific.
Tested on x86_64-linux -m32/-m64, committed to trunk as obvious.
2024-02-15 Jakub Jelinek
PR middle-end/107385
* gcc.dg/pr107385.c: New test.
--- gcc/testsuite
Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk?
-- >8 --
Here we have
template
auto is_throwable(T t) -> decltype(throw t, true) { ... }
where we didn't properly mark 't' as IMPLICIT_RVALUE_P, which caused
the wrong overload to have been chosen. Jason figured out it's because
w
This patch implements built-in trait for std::decay.
gcc/cp/ChangeLog:
* cp-trait.def: Define __decay.
* semantics.cc (finish_trait_type): Handle CPTK_DECAY.
gcc/testsuite/ChangeLog:
* g++.dg/ext/has-builtin-1.C: Test existence of __decay.
* g++.dg/ext/decay.C: N
This patch implements built-in trait for std::remove_extent.
gcc/cp/ChangeLog:
* cp-trait.def: Define __remove_extent.
* semantics.cc (finish_trait_type): Handle CPTK_REMOVE_EXTENT.
gcc/testsuite/ChangeLog:
* g++.dg/ext/has-builtin-1.C: Test existence of __remove_extent.
This patch optimizes the compilation performance of
std::add_lvalue_reference by dispatching to the new
__add_lvalue_reference built-in trait.
libstdc++-v3/ChangeLog:
* include/std/type_traits (add_lvalue_reference): Use
__add_lvalue_reference built-in trait.
(__add_lvalue
This patch optimizes the compilation performance of
std::remove_all_extents by dispatching to the new __remove_all_extents
built-in trait.
libstdc++-v3/ChangeLog:
* include/std/type_traits (remove_all_extents): Use
__remove_all_extents built-in trait.
Signed-off-by: Ken Matsui
-
This patch optimizes the compilation performance of std::add_pointer
by dispatching to the new __add_pointer built-in trait.
libstdc++-v3/ChangeLog:
* include/std/type_traits (add_pointer): Use __add_pointer
built-in trait.
Signed-off-by: Ken Matsui
---
libstdc++-v3/include/std
This patch implements built-in trait for std::add_lvalue_reference.
gcc/cp/ChangeLog:
* cp-trait.def: Define __add_lvalue_reference.
* semantics.cc (finish_trait_type): Handle
CPTK_ADD_LVALUE_REFERENCE.
gcc/testsuite/ChangeLog:
* g++.dg/ext/has-builtin-1.C: Test
This patch implements built-in trait for std::rank.
gcc/cp/ChangeLog:
* cp-trait.def: Define __rank.
* semantics.cc (trait_expr_value): Handle CPTK_RANK.
(finish_trait_expr): Likewise.
gcc/testsuite/ChangeLog:
* g++.dg/ext/has-builtin-1.C: Test existence of __ran
This patch implements built-in trait for std::remove_all_extents.
gcc/cp/ChangeLog:
* cp-trait.def: Define __remove_all_extents.
* semantics.cc (finish_trait_type): Handle
CPTK_REMOVE_ALL_EXTENTS.
gcc/testsuite/ChangeLog:
* g++.dg/ext/has-builtin-1.C: Test existe
This patch optimizes the compilation performance of
std::add_rvalue_reference by dispatching to the new
__add_rvalue_reference built-in trait.
libstdc++-v3/ChangeLog:
* include/std/type_traits (add_rvalue_reference): Use
__add_rvalue_reference built-in trait.
(__add_rvalue
This patch optimizes the compilation performance of std::rank
by dispatching to the new __rank built-in trait.
libstdc++-v3/ChangeLog:
* include/std/type_traits (rank): Use __rank built-in trait.
Signed-off-by: Ken Matsui
---
libstdc++-v3/include/std/type_traits | 6 ++
1 file chan
This patch implements built-in trait for std::add_rvalue_reference.
gcc/cp/ChangeLog:
* cp-trait.def: Define __add_rvalue_reference.
* semantics.cc (finish_trait_type): Handle
CPTK_ADD_RVALUE_REFERENCE.
gcc/testsuite/ChangeLog:
* g++.dg/ext/has-builtin-1.C: Test
This patch optimizes the compilation performance of std::decay
by dispatching to the new __decay built-in trait.
libstdc++-v3/ChangeLog:
* include/std/type_traits (decay): Use __decay built-in trait.
Signed-off-by: Ken Matsui
---
libstdc++-v3/include/std/type_traits | 6 ++
1 file
This patch optimizes the compilation performance of std::remove_extent
by dispatching to the new __remove_extent built-in trait.
libstdc++-v3/ChangeLog:
* include/std/type_traits (remove_extent): Use __remove_extent
built-in trait.
Signed-off-by: Ken Matsui
---
libstdc++-v3/inc
This patch implements built-in trait for std::add_pointer.
gcc/cp/ChangeLog:
* cp-trait.def: Define __add_pointer.
* semantics.cc (finish_trait_type): Handle CPTK_ADD_POINTER.
gcc/testsuite/ChangeLog:
* g++.dg/ext/has-builtin-1.C: Test existence of __add_pointer.
On Thu, 2024-02-08 at 17:09 -0500, Antoni Boucher wrote:
> Hi.
> This patch fixes the bug 113842.
> I cannot yet add a test with this patch since it requires using
> try/catch which is not yet merged in master.
> Thanks for the review.
Thanks; patch looks good for trunk, assuming you've tested it
This patch is indeed not necessary anymore.
On Wed, 2024-01-10 at 09:32 -0500, David Malcolm wrote:
> On Wed, 2024-01-10 at 09:30 -0500, David Malcolm wrote:
> > On Thu, 2023-11-16 at 17:28 -0500, Antoni Boucher wrote:
> > > Hi.
> > > This patch fixes a segfault that happens when compiling librsvg
Hello Richard:
As per your suggestion I have divided the patch into target independent
and target dependent for aarch64 target. I kept aarch64-ldp-fusion same
and did not change that.
Common infrastructure of load store pair fusion is divided into
target independent and target dependent code for
* Jonathan Wakely:
>>+To fix the remaining int-conversions issues, add casts
>>+to an appropriate pointer or integer type. On GNU systems, the
>>+standard (but generally optional) types
>
> I know what you mean here, but I'm not sure the parenthesis adds
> clarity for anybody who doesn't already
On 14/02/2024 11:18, Richard Sandiford wrote:
> Alex Coplan writes:
> > This is a backport of the GCC 13 fix for PR111677 to the GCC 12 branch.
> > The only part of the patch that isn't a straight cherry-pick is due to
> > the TX iterator lacking TDmode for GCC 12, so this version adjusts
> > TX_V
* Sam James:
> It's fine if you leave this out, but consider mentioning the common
> pitfall of autoconf projects not including config.h consistently before
> all inclues. We could also mention AC_USE_SYSTEM_EXTENSIONS.
I added:
“
Alternatively, projects using using Autoconf
could enable AC_USE
Florian Weimer writes:
> * Sam James:
>
>> It's fine if you leave this out, but consider mentioning the common
>> pitfall of autoconf projects not including config.h consistently before
>> all inclues. We could also mention AC_USE_SYSTEM_EXTENSIONS.
>
> I added:
>
> “
> Alternatively, projects
* Gerald Pfeifer:
>> This mostly happens in function definitions
>> +that are not prototypes
>
> Naive questions: Can definitions really be prototypes (in C)?
Yes, I think so: definitions can be declarations, and function
prototypes are declarations. The standard uses the phrase “function
defin
> -Original Message-
> From: Richard Sandiford
> Sent: Thursday, February 15, 2024 2:56 PM
> To: Andrew Pinski
> Cc: gcc-patches@gcc.gnu.org; Tamar Christina
> Subject: Re: [PATCH] aarch64: Improve PERM<{0}, a, ...> (64bit) by adding
> whole
> vector shift right [PR113872]
>
> Andrew P
Hi.
This patch adds some missing builtins that can be generated by
optimizations.
I'm not sure how to add a test for this one.
Do you know the C code that can be optimized to a builtin_clz?
Thanks for the review.
From 578cb40bd333abf57e5b3b08d3453bdcf7ad80b5 Mon Sep 17 00:00:00 2001
From: Antoni Bo
On 15/02/2024 21:24, Ajit Agarwal wrote:
> Hello Richard:
>
> As per your suggestion I have divided the patch into target independent
> and target dependent for aarch64 target. I kept aarch64-ldp-fusion same
> and did not change that.
I'm not sure this was what Richard suggested doing, though.
He
* Gerald Pfeifer:
> On Fri, 2 Feb 2024, Florian Weimer wrote:
>> htdocs/gcc-14/porting_to.html | 465
>> ++
>> 1 file changed, 465 insertions(+)
>> +
>> +Using pointers as integers and vice versa
>> (-Werror=int-conversion)
>
>> +It makes sense to address
* Gerald Pfeifer:
> On Fri, 2 Feb 2024, Florian Weimer wrote:
>> +Certain warnings are now errors
>
> That's quite a nice description, thank you, Florian!
>
>> +The initial ISO C standard and its 1999 revision removed support for
>
> May I suggest to wrap paragraphs in ...? Not strictly necessary
On Thu, 2024-02-15 at 11:32 -0500, Antoni Boucher wrote:
> Hi.
> This patch adds some missing builtins that can be generated by
> optimizations.
> I'm not sure how to add a test for this one.
> Do you know the C code that can be optimized to a builtin_clz?
I don't. Given a reproducer we could pro
Ok for trunk?
--
As the tests assume that fileno() is visible (only part of POSIX),
define the guard to ensure that it's visible. Currently, glibc appears
to always have this defined in C++, newlib does not.
Without this patch, fails like this can be seen:
Testing analyzer/fileno-1.c, -std=c+
> -Original Message-
> From: Tamar Christina
> Sent: Thursday, February 15, 2024 8:27 AM
> To: Richard Sandiford ; Andrew Pinski (QUIC)
>
> Cc: gcc-patches@gcc.gnu.org
> Subject: RE: [PATCH] aarch64: Improve PERM<{0}, a, ...> (64bit) by adding
> whole vector shift right [PR113872]
>
> >
Richard Biener writes:
> On Wed, 14 Feb 2024, Richard Biener wrote:
>
>> For the testcase in PR113910 we spend a lot of time in PTA comparing
>> bitmaps for looking up equivalence class members. This points to
>> the very weak bitmap_hash function which effectively hashes set
>> and a subset of n
Hello Alex:
On 15/02/24 10:12 pm, Alex Coplan wrote:
> On 15/02/2024 21:24, Ajit Agarwal wrote:
>> Hello Richard:
>>
>> As per your suggestion I have divided the patch into target independent
>> and target dependent for aarch64 target. I kept aarch64-ldp-fusion same
>> and did not change that.
>
On 15/02/2024 22:38, Ajit Agarwal wrote:
> Hello Alex:
>
> On 15/02/24 10:12 pm, Alex Coplan wrote:
> > On 15/02/2024 21:24, Ajit Agarwal wrote:
> >> Hello Richard:
> >>
> >> As per your suggestion I have divided the patch into target independent
> >> and target dependent for aarch64 target. I kep
On Feb 15, 2024, at 9:03 AM, Torbjörn SVENSSON
wrote:
>
> Ok for trunk?
Ok.
> gcc/testsuite/ChangeLog:
> PR113278
> * c-c++-common/analyzer/fileno-1.c: Define _POSIX_SOURCE.
> * c-c++-common/analyzer/flex-with-call-summaries.c: Same.
> * c-c++-common/analyzer/flex-witho
> Am 15.02.2024 um 18:06 schrieb Richard Sandiford :
>
> Richard Biener writes:
>>> On Wed, 14 Feb 2024, Richard Biener wrote:
>>>
>>> For the testcase in PR113910 we spend a lot of time in PTA comparing
>>> bitmaps for looking up equivalence class members. This points to
>>> the very weak
On Feb 12, 2024, at 11:38 AM, Edwin Lu wrote:
>
> There is currently no support for matching at least x lines of assembly
> (only scan-assembler-times). This patch would allow setting upper or lower
> bounds.
>
> Use case: using different scheduler descriptions and/or cost models will
> change
On 2/15/2024 1:25 AM, Li, Pan2 wrote:
Sorry for late reply due to holiday. I double-checked the
calling-convernsion-*.c dump, it is safe to adjust the asm check to the number
as you mentioned.
Hi Pan,
I hope you had a good holiday! I already changed the numbers and added a
bit more checks
On 2024-02-15 18:18, Mike Stump wrote:
On Feb 15, 2024, at 9:03 AM, Torbjörn SVENSSON
wrote:
Ok for trunk?
Ok.
Pushed as 8e8c2d2b34971bb29e74341a3efc625f1db06639.
gcc/testsuite/ChangeLog:
PR113278
* c-c++-common/analyzer/fileno-1.c: Define _POSIX_SOURCE.
* c
On 15/02/24 10:43 pm, Alex Coplan wrote:
> So IIUC Richard was suggesting splitting into target-independent and
> target-dependent pieces within aarch64-ldp-fusion.cc as a first step,
> i.e. you introduce the abstractions (virtual functions) needed within
> that file. That should hopefully be a
Dear all,
The attached patch fixes PR105658 by forcing an array temporary to be
created. This is required when passing an array component, but this
didn't happen if the dummy argument was an unlimited polymorphic type.
The problem bit of code is in `gfc_conv_expr_descriptor`, near L7828:
s
Andrew Pinski writes:
> The testcase gcc.target/aarch64/vect_ctz_1.c fails execution when running
> with -march=armv9-a due to the testcase calls __builtin_ctz with a value of 0.
> The testcase should not depend on undefined behavior of __builtin_ctz. So this
> changes it to use the g form with th
Iain Sandoe writes:
>> On 5 Feb 2024, at 14:56, Iain Sandoe wrote:
>>
>> Tested on aarch64-linux,darwin and a cross from aarch64-darwin to linux,
>> OK for trunk, or some alternative is needed?
>
> Hmm.. apparently, this fails the linaro pre-commit CI for g++ with:
> error: invalid conversion fr
Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look
OK for trunk?
-- >8 --
One would expect consecutive calls to bytes_in/out::b for streaming
adjacent bits, as we do for tree flag streaming, to at least be
optimized by the compiler into individual bit operations using
statically kn
On 15/02/2024 14:17, Jonathan Wakely wrote:
On Wed, 14 Feb 2024 at 21:48, François Dumont
wrote:
On 14/02/2024 20:44, Jonathan Wakely wrote:
On Wed, 14 Feb 2024 at 18:39, François Dumont
wrote:
libstdc++: [_GLIBCXX_DEBUG] Fix std::__niter_base behavior
st
On Thu, 15 Feb 2024 at 18:38, François Dumont wrote:
>
> On 15/02/2024 14:17, Jonathan Wakely wrote:
>
>
>
> On Wed, 14 Feb 2024 at 21:48, François Dumont
> wrote:
>
>>
>> On 14/02/2024 20:44, Jonathan Wakely wrote:
>>
>>
>>
>> On Wed, 14 Feb 2024 at 18:39, François Dumont
>> wrote:
>>
>>> libs
Hello Alex/Richard:
I have placed target indpendent and target dependent code in
aarch64-ldp-fusion for load store fusion.
Common infrastructure of load store pair fusion is divided into
target independent and target dependent code.
Target independent code is the Generic code with pure virtual
f
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