This patch enables almost full coverage vectorization tests for RVV, except
these
following tests (not enabled yet):
1. Will enable soon:
check_effective_target_vect_call_lrint
check_effective_target_vect_call_btrunc
check_effective_target_vect_call_btruncf
check_effective_target_vect_call_ceil
On Sat, 2023-10-07 at 11:41 +0800, Yang Yujie wrote:
> Thanks for the testing!
>
> This error seems to be difficult to reproduce since it is a makefile
> dependency
> problem. I think appending loongarch-multilib.h to $(GTM_H) instead of
> $(TM_H)
> could help.
FWIW such issues are easier to r
Hi,
David Edelsohn writes:
> This Message Is From an External Sender
> This message came from outside your organization.
> Report Suspicious
>
> On Thu, Oct 5, 2023 at 12:14 AM Jiufu Guo wrote:
>
> Hi,
>
> As mentioned in PR108338, on p9, we could use mtvsrws to implement
> the bitcas
Hi,
David Edelsohn writes:
>
> On Thu, Oct 5, 2023 at 12:50 AM Jiufu Guo wrote:
>
> Hi,
>
> Currently, we have the pattern "movsf_from_si2" which was trying
> to support moving high part DI to SF.
>
> But current pattern only accepts "ashiftrt":
> XX:SF=bitcast:SF(subreg(YY:DI>>32),0),
Hi!
On Sat, 2023-10-07 15:08:34 +0800, Xi Ruoyao wrote:
> On Sat, 2023-10-07 at 11:41 +0800, Yang Yujie wrote:
> > Thanks for the testing!
> >
> > This error seems to be difficult to reproduce since it is a makefile
> > dependency
> > problem. I think appending loongarch-multilib.h to $(GTM_H)
> It would be nice to add to the documentation that INSN_BASE_REG_CLASS,
> INSN_INDEX_REG_CLASS, and REGNO_OK_FOR_INSN_BASE_P if defined have
> priority over older corresponding macros as it is already documented for
> REGNO_MODE_CODE_OK_FOR_BASE_P relating to REGNO_OK_FOR_BASE_P. But this
> small
gcc/ChangeLog:
* config.gcc: Add loongarch-driver.h to tm_files.
* config/loongarch/loongarch.h: Do not include loongarch-driver.h.
* config/loongarch/t-loongarch: Append loongarch-multilib.h to $(GTM_H)
instead of $(TM_H) for building generator programs.
---
gcc/c
Unfortunately, I was unable to reproduce the problem mentioned in
https://gcc.gnu.org/pipermail/gcc-patches/2023-October/631933.html
Heres's a possible fix without testing. Please tell me if this works.
On Sat, Oct 07, 2023 at 04:50:14PM +0800, Yang Yujie wrote:
> -TM_H += loongarch-multilib.h $
Richard Biener writes:
> On Thu, 5 Oct 2023, Tamar Christina wrote:
>
>> > I suppose the idea is that -abs(x) might be easier to optimize with other
>> > patterns (consider a - copysign(x,...), optimizing to a + abs(x)).
>> >
>> > For abs vs copysign it's a canonicalization, but (negate (abs @0))
Fix these following XPASS FAILs of TSVC for RVV:
XPASS: gcc.dg/vect/tsvc/vect-tsvc-s1115.c -flto -ffat-lto-objects
scan-tree-dump vect "vectorized 1 loops"
XPASS: gcc.dg/vect/tsvc/vect-tsvc-s1115.c scan-tree-dump vect "vectorized 1
loops"
XPASS: gcc.dg/vect/tsvc/vect-tsvc-s114.c -flto -ffat-lto
These testcases cause multiple FAILs:
I think you should
/* { dg-do run { target { riscv_v && riscv_zvfh_hw && riscv_zfh_ok } } } */
juzhe.zh...@rivai.ai
From: pan2.li
Date: 2023-10-07 14:25
To: gcc-patches
CC: juzhe.zhong; pan2.li; yanzhang.wang; kito.cheng
Subject: [PATCH v1] RISC-V: Add m
Richard Biener writes:
> On Thu, Oct 5, 2023 at 10:46 PM Tamar Christina
> wrote:
>>
>> > -Original Message-
>> > From: Richard Sandiford
>> > Sent: Thursday, October 5, 2023 9:26 PM
>> > To: Tamar Christina
>> > Cc: gcc-patches@gcc.gnu.org; nd ; Richard Earnshaw
>> > ; Marcus Shawcrof
Also I have reverted your commit:
https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=066a43ce72ab6559ba14af9628df19daa0b85cdf
Plz test the patch and verify it doesn't cause any FAILs if the toolchain
doesn't have "zvfh_zfh".
juzhe.zh...@rivai.ai
From: juzhe.zh...@rivai.ai
Date: 2023-10-07 17:49
> Am 07.10.2023 um 11:23 schrieb Richard Sandiford :
>
> Richard Biener writes:
>> On Thu, 5 Oct 2023, Tamar Christina wrote:
>>
I suppose the idea is that -abs(x) might be easier to optimize with other
patterns (consider a - copysign(x,...), optimizing to a + abs(x)).
F
From: Yanzhang Wang
We only need to pass options to the linker when static-pie is passed.
There's another patch to enable static-pie in glibc. And we need to
enable in GCC first.
gcc/ChangeLog:
* config/riscv/linux.h: Pass the static-pie specific options to
the linker.
Signed
Richard Biener writes:
>> Am 07.10.2023 um 11:23 schrieb Richard Sandiford
>> >> Richard Biener writes:
>>> On Thu, 5 Oct 2023, Tamar Christina wrote:
>>>
> I suppose the idea is that -abs(x) might be easier to optimize with other
> patterns (consider a - copysign(x,...), optimizing to
This patch fixes the following dumple FAILs:
FAIL: gcc.dg/vect/vect-cond-arith-2.c -flto -ffat-lto-objects scan-tree-dump
optimized " = \\.COND_SUB"
FAIL: gcc.dg/vect/vect-cond-arith-2.c -flto -ffat-lto-objects scan-tree-dump
vect " = \\.COND_ADD"
FAIL: gcc.dg/vect/vect-cond-arith-2.c scan-tree
Richard Earnshaw writes:
> On 03/10/2023 16:18, Victor Do Nascimento wrote:
>> In implementing the ACLE read/write system register builtins it was
>> observed that leaving argument type checking to be done at expand-time
>> meant that poorly-formed function calls were being "fixed" by certain
>> o
Hi
Here is a rebased version of this patch.
There are few test failures when running 'make check-c++' but nothing new.
Still, there are 2 patches awaiting validation to fix some of them, PR
c++/111524 to fix another bunch and I fear that we will have to live
with the others.
libstdc++:
Saurabh Jha writes:
> On 10/6/2023 2:24 PM, Saurabh Jha wrote:
>> Hey,
>>
>> This patch adds support for the Cortex-X4 CPU to GCC.
>>
>> Regression testing for aarch64-none-elf target and found no regressions.
>>
>> Okay for gcc-master? I don't have commit access so if it looks okay,
>> could som
Robin Dapp writes:
> Hi Richard,
>
> cool, thanks. I just gave it a try with my test cases and it does what
> it is supposed to do, at least if I disable the register pressure check :)
> A cursory look over the test suite showed no major regressions and just
> some overly specific tests.
>
> My t
On 10/7/23 03:23, Juzhe-Zhong wrote:
Fix these following XPASS FAILs of TSVC for RVV:
XPASS: gcc.dg/vect/tsvc/vect-tsvc-s1115.c -flto -ffat-lto-objects scan-tree-dump vect
"vectorized 1 loops"
XPASS: gcc.dg/vect/tsvc/vect-tsvc-s1115.c scan-tree-dump vect "vectorized 1
loops"
XPASS: gcc.dg/
On 10/7/23 01:04, Juzhe-Zhong wrote:
This patch enables almost full coverage vectorization tests for RVV, except
these
following tests (not enabled yet):
1. Will enable soon:
check_effective_target_vect_call_lrint
check_effective_target_vect_call_btrunc
check_effective_target_vect_call_btru
On 10/7/23 05:45, Juzhe-Zhong wrote:
This patch fixes the following dumple FAILs:
FAIL: gcc.dg/vect/vect-cond-arith-2.c -flto -ffat-lto-objects scan-tree-dump optimized
" = \\.COND_SUB"
FAIL: gcc.dg/vect/vect-cond-arith-2.c -flto -ffat-lto-objects scan-tree-dump vect "
= \\.COND_ADD"
FAIL:
Strictly structured blocks are '!$omp ' directly
followed by 'BLOCK ... END BLOCK', i.e. a Fortran block construct.
I did run into this issue because 'integer :: n; n = 5; !$omp ...;
block; integer :: A(n)' was not accepted.
Well, it turned out that was because the BLOCK handling was not quite r
On 10/7/23 05:32, yanzhang.w...@intel.com wrote:
From: Yanzhang Wang
We only need to pass options to the linker when static-pie is passed.
There's another patch to enable static-pie in glibc. And we need to
enable in GCC first.
gcc/ChangeLog:
* config/riscv/linux.h: Pass the static
On 10/4/23 16:19, Roger Sayle wrote:
The recent patch to remove poly_int_pod triggers a bug in g++ 4.8.5's
C++ 11 support which mistakenly believes poly_uint16 has a non-trivial
constructor. This in turn prohibits it from being used as a member in
a union (rtxunion) that constructed statical
Hello All:
This patch add new pass to replace contiguous addresses vector load lxv with
mma instruction
lxvp. This patch addresses one regressions failure in ARM architecture.
Bootstrapped and regtested with powepc64-linux-gnu.
Thanks & Regards
Ajit
rs6000: Add new pass for replacement of con
I've been told that previous patch generated with 'git diff -b' was not
applying properly so here is the same patch again with a simple 'git diff'.
On 07/10/2023 14:25, François Dumont wrote:
Hi
Here is a rebased version of this patch.
There are few test failures when running 'make check-c++
Jeff Law writes:
> On 10/4/23 16:19, Roger Sayle wrote:
>> The recent patch to remove poly_int_pod triggers a bug in g++
>> 4.8.5's
>> C++ 11 support which mistakenly believes poly_uint16 has a non-trivial
>> constructor. This in turn prohibits it from being used as a member in
>> a union (rtx
Do you mean change it like this ?
/* { dg-final { scan-tree-dump-times { = \.COND_L?E?N?_?RDIV} 1 "optimized" {
target vect_double_cond_arith } } } */
juzhe.zh...@rivai.ai
From: Jeff Law
Date: 2023-10-07 23:09
To: Juzhe-Zhong; gcc-patches
CC: rguenther; rdapp.gcc
Subject: Re: [PATCH] TEST: F
Committed, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Saturday, October 7, 2023 10:48 PM
To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org
Cc: kito.ch...@gmail.com; kito.ch...@sifive.com; rdapp@gmail.com
Subject: Re: [PATCH] RISC-V: Enable more tests of "vect" for RVV
On 10
Committed, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Saturday, October 7, 2023 10:44 PM
To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org
Cc: rguent...@suse.de
Subject: Re: [PATCH] TEST: Fix XPASS of TSVC testsuites for RVV
On 10/7/23 03:23, Juzhe-Zhong wrote:
> Fix these foll
Committed, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Sunday, October 8, 2023 12:13 AM
To: Wang, Yanzhang ; gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; kito.ch...@sifive.com; Li, Pan2
Subject: Re: [PATCH] RISC-V: add static-pie support
On 10/7/23 05:32, yanzhang.
This patch fixes the following dumple FAILs:
FAIL: gcc.dg/vect/vect-cond-arith-2.c -flto -ffat-lto-objects scan-tree-dump
optimized " = \\.COND_SUB"
FAIL: gcc.dg/vect/vect-cond-arith-2.c -flto -ffat-lto-objects scan-tree-dump
vect " = \\.COND_ADD"
FAIL: gcc.dg/vect/vect-cond-arith-2.c scan-tree
Hi, Jeff.
Address your comments and fix on V2:
https://gcc.gnu.org/pipermail/gcc-patches/2023-October/632239.html
I think it look reasonable good for a long term maintenance now.
Ok for trunk ?
juzhe.zh...@rivai.ai
From: Jeff Law
Date: 2023-10-07 23:09
To: Juzhe-Zhong; gcc-patches
CC: rgue
Since -mapxf works similar as -muintr that will emit error for 32bit
target, add !ia32 target guard for apx related tests.
Committed as obvious fix after test.
gcc/testsuite/ChangeLog:
* gcc.target/i386/apx-egprs-names.c: Compile for non-ia32.
* gcc.target/i386/apx-inline-gpr-nor
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
Ready push to trunk.
gcc/ChangeLog:
* config/i386/mmx.md (VHF_32_64): New mode iterator.
(3): New define_expand, merged from ..
(v4hf3): .. this and
(v2hf3): .. this.
(movd_v2hf_to_sse_reg): Ne
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
Ready push to trunk.
gcc/ChangeLog:
* config/i386/i386.cc (ix86_build_const_vector): Handle V2HF
and V4HFmode.
(ix86_build_signbit_mask): Ditto.
* config/i386/mmx.md (mmxintvecmode): Ditto.
(2)
On 10/7/23 15:30, Sam James wrote:
Jeff Law writes:
On 10/4/23 16:19, Roger Sayle wrote:
The recent patch to remove poly_int_pod triggers a bug in g++
4.8.5's
C++ 11 support which mistakenly believes poly_uint16 has a non-trivial
constructor. This in turn prohibits it from being used as
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