Hi,
this patch makes tree-ssa-loop-ch to understand if-combined conditionals (which
are quite common) and remove the IV-derived heuristics. That heuristics is
quite dubious because every variable with PHI in header of integral or pointer
type is seen as IV, so in the first basic block we match all
Jeff Law via Gcc-patches writes:
> On 7/19/23 04:25, Richard Biener wrote:
>> On Wed, 19 Jul 2023, YunQiang Su wrote:
>>
>>> Eric Botcazou ?2023?7?19??? 17:45???
> I don't see that. That's definitely not what GCC expects here,
> the left-most word of the doubleword should be unchan
On Wed, Jul 19, 2023 at 4:34 PM Maciej W. Rozycki wrote:
>
> On Wed, 12 Jul 2023, Richard Biener wrote:
>
> > > > That said, we should handle this better so can you file an
> > > > enhancement bugreport for this?
> > >
> > > Filed as PR -optimization/110630.
> >
> > Thanks!
>
> Thanks for making
On Wed, 19 Jul 2023, FX Coudert wrote:
> 6 weeks later, I?d like to ask a global maintainer to review this.
> The idea was okay?ed previously by Joseph Myers, but he asked for testing of
> both the quiet and signalling NaN cases, which is now done.
OK.
Thanks,
Richard.
> FX
>
>
> > Le 6 juin
On Thu, 20 Jul 2023, Richard Sandiford wrote:
> Tamar Christina writes:
> > Hi All,
> >
> > The resulting predicate register of a whilelo is not
> > restricted to the lower half of the predicate register file.
> >
> > As such these tests started failing after recent changes
> > because the whilel
On Thu, 20 Jul 2023, Robin Dapp wrote:
> Hi Juzhe,
>
> I just noticed that we recently started calling things MASK_LEN
> (instead of LEN_MASK before) with the reductions. Wouldn't we want
> to be consistent here? Especially as the length takes precedence.
> I realize the preparational work like
On Thu, 20 Jul 2023, Richard Sandiford wrote:
> Jeff Law via Gcc-patches writes:
> > On 7/19/23 04:25, Richard Biener wrote:
> >> On Wed, 19 Jul 2023, YunQiang Su wrote:
> >>
> >>> Eric Botcazou ?2023?7?19??? 17:45???
>
> > I don't see that. That's definitely not what GCC expects here
Hi, Richard.
I plan to change all LEN_MASK into MASK_LEN.
Start from LEN_MASK_GATHER_LOAD/LEN_MASK_SCATTER_STORE,
we notice keeping mask same order with original mask_* patterns
will make codes cleaner and easier to maintain.
Thanks
juzhe.zh...@rivai.ai
From: Richard Biener
Date: 2023-07-2
On Wed, Jul 19, 2023 at 2:33 PM Uros Bizjak wrote:
>
> On Wed, Jul 19, 2023 at 2:21 PM Richard Biener
> wrote:
> >
> > On Sun, Jun 11, 2023 at 12:55 AM Roger Sayle
> > wrote:
> > >
> > >
> > > This is a backport of the fixes for PR target/109973 and PR target/110083.
> > >
> > > This backport t
On Thu, Jul 20, 2023 at 12:11 AM Roger Sayle wrote:
>
>
> This patch resolves PR c/110699, an ICE-after-error regression, by adding
> a check that the array type isn't error_mark_node in gimplify_compound_lval.
>
> This patch has been tested on x86_64-pc-linux-gnu with make bootstrap
> and make -k
This patch is depending on:
https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624995.html
Consider this following case:
float foo (float *__restrict a, int n)
{
float result = 1.0;
for (int i = 0; i < n; i++)
result += a[i];
return result;
}
Compile with **NO** -ffast-math:
Before thi
On Thu, Jul 20, 2023 at 4:42 AM Andrew Pinski via Gcc-patches
wrote:
>
> Since we have statistics_counter_event now, combine should use that
> instead of it is own custom printing of statistics.
> The only thing that is not done any more after this patch is printing
> out the total stats for the w
For Intel processors, after TARGET_AVX, vmovdqu is optimized as fast
as vlddqu, UNSPEC_LDDQU can be removed to enable more optimizations.
Can someone confirm this with AMD folks?
If AMD doesn't like such optimization, I'll put my optimization under
micro-architecture tuning.
Bootstrapped and regte
On Thu, Jul 20, 2023 at 8:49 AM Richard Sandiford via Gcc-patches
wrote:
>
> Andrew Carlotti writes:
> > Updated patch to fix the fp16 intrinsic pragmas, and pushed to master.
> > OK to backport to GCC 13?
>
> OK, thanks.
In case you want it in 13.2 please push it really soon, we want to do 13.2
> +enum reduction_type
> +{
> + UNORDERED_REDUDUCTION,
> + FOLD_LEFT_REDUDUCTION,
> + MASK_LEN_FOLD_LEFT_REDUDUCTION,
> +};
There are redundant 'DU's here ;)
Wouldn't it be sufficient to have an enum
enum reduction_type
{
UNORDERED,
FOLD_LEFT,
MASK_LEN_FOLD_LEFT,
};
?
Regards
Robin
The UNORDERED enum will cause ICE since we have UNORDERED in rtx_code.
Could you give me another enum name?
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-07-20 15:41
To: Juzhe-Zhong; gcc-patches
CC: rdapp.gcc; kito.cheng; kito.cheng; jeffreyalaw
Subject: Re: [PATCH] RISC-V: Support in-orde
Seems like there is a potential vsetvli optimization chance in the example?
> After this patch:
> foo:
> lui a5,%hi(.LC0)
> flw fa0,%lo(.LC0)(a5)
> ble a1,zero,.L4
> .L3:
> vsetvli a5,a1,e32,m1,ta,ma
> vle32.v v1,0(a0)
> sllia4,a5,2
>
Hi Uros,
> From: Uros Bizjak
> Sent: 20 July 2023 07:50
>
> On Wed, Jul 19, 2023 at 10:07 PM Roger Sayle
> wrote:
> >
> > This patch is the next piece of a solution to the x86_64 ABI issues in
> > PR 88873. This splits the *concat3_3 define_insn_and_split
> > into two patterns, a TARGET_64BI
On Thu, Jul 20, 2023 at 9:44 AM Roger Sayle wrote:
>
>
> Hi Uros,
>
> > From: Uros Bizjak
> > Sent: 20 July 2023 07:50
> >
> > On Wed, Jul 19, 2023 at 10:07 PM Roger Sayle
> > wrote:
> > >
> > > This patch is the next piece of a solution to the x86_64 ABI issues in
> > > PR 88873. This splits t
Oh, Yes.
It can be easily addressed by this:
emit_scalar_move_insn (code_for_pred_broadcast (m1_mode), scalar_move_ops);
This patch emit scalar move insn with AVL = 1 for all reduction. It can easily
addressed when we recognize it is mask_len_fold_left_plus reduction,
we assign the AVL to the sc
> The UNORDERED enum will cause ICE since we have UNORDERED in rtx_code.
>
> Could you give me another enum name?
I would have expected it to work when it's namespaced.
Regards
Robin
I have no ideal, just ICE comes when running regression:
during RTL pass: expand
auto.c: In function 'test_int32_t_float_unordered_var':
auto.c:24:3: internal compiler error: in expand_vec_cmp_float, at
config/riscv/riscv-v.cc:2564
24 | test_##TYPE1##_##TYPE2##_##CMP##_var (TYPE1 *restrict d
Seems like because you ` using namespace riscv_vector;` so the
UNORDERED in expand_vec_cmp_float used reduction_type::UNORDERED
Hmmm, maybe enum class?
enum class reduction_type
{
UNORDERED,
FOLD_LEFT,
MASK_LEN_FOLD_LEFT,
};
and need use like this reduction_type::UNORDERED
On Thu, Jul 20,
From: Ju-Zhe Zhong
Hi, Richard and Richi.
I plan to refine the codes that I recently support for RVV auto-vectorization.
This patch is inspired last review comments from Richard:
https://patchwork.sourceware.org/project/gcc/patch/20230712042124.111818-1-juzhe.zh...@rivai.ai/
Richard said he pre
On Thu, Jul 20, 2023 at 9:35 AM liuhongt wrote:
>
> For Intel processors, after TARGET_AVX, vmovdqu is optimized as fast
> as vlddqu, UNSPEC_LDDQU can be removed to enable more optimizations.
> Can someone confirm this with AMD folks?
> If AMD doesn't like such optimization, I'll put my optimizati
I have tried this:
enum class reduction_type
{
UNORDERED,
FOLD_LEFT,
MASK_LEN_FOLD_LEFT,
};
But fail to build.
/gcc/build -I../../../riscv-gcc/gcc/../include
-I../../../riscv-gcc/gcc/../libcpp/include -g -O0 \
-o build/gencondmd.o build/gencondmd.cc
In file included from ./tm_
On Thu, Jul 20, 2023 at 09:37:14AM +0200, Richard Biener wrote:
> On Thu, Jul 20, 2023 at 8:49 AM Richard Sandiford via Gcc-patches
> wrote:
> >
> > Andrew Carlotti writes:
> > > Updated patch to fix the fp16 intrinsic pragmas, and pushed to master.
> > > OK to backport to GCC 13?
> >
> > OK, tha
reduction_type = reduction_type::UNORDERED
On Thu, Jul 20, 2023 at 4:16 PM juzhe.zh...@rivai.ai
wrote:
>
> I have tried this:
> enum class reduction_type
> {
> UNORDERED,
> FOLD_LEFT,
> MASK_LEN_FOLD_LEFT,
> };
>
> But fail to build.
>
> /gcc/build -I../../../riscv-gcc/gcc/../include
> Tamar Christina writes:
> > Hi All,
> >
> > The resulting predicate register of a whilelo is not
> > restricted to the lower half of the predicate register file.
> >
> > As such these tests started failing after recent changes
> > because the whilelo outside the loop is getting assigned p15.
>
From: Pan Li
There are 2 of the RVV reduction pattern mask operand takes
vector_merge_operand instead of vector_mask_operand by mistake. This
patch would like to fix this.
Signed-off-by: Pan Li
gcc/ChangeLog:
* config/riscv/vector.md: Fix incorrect match_operand.
gcc/testsuite/Change
LGTM. You can commit it.
juzhe.zh...@rivai.ai
From: pan2.li
Date: 2023-07-20 16:35
To: gcc-patches
CC: juzhe.zhong; pan2.li; yanzhang.wang; kito.cheng
Subject: [PATCH v1] RISC-V: Fix one incorrect match operand for RVV reduction
From: Pan Li
There are 2 of the RVV reduction pattern mask ope
Committed, thanks Juzhe.
Pan
From: juzhe.zh...@rivai.ai
Sent: Thursday, July 20, 2023 4:37 PM
To: Li, Pan2 ; gcc-patches
Cc: Li, Pan2 ; Wang, Yanzhang ;
kito.cheng
Subject: Re: [PATCH v1] RISC-V: Fix one incorrect match operand for RVV
reduction
LGTM. You can commit it.
___
This patch is depending on:
https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624995.html
Consider this following case:
float foo (float *__restrict a, int n)
{
float result = 1.0;
for (int i = 0; i < n; i++)
result += a[i];
return result;
}
Compile with **NO** -ffast-math:
Before thi
Address all comments on V2 patch:
https://gcc.gnu.org/pipermail/gcc-patches/2023-July/625038.html
Redundant vsetvli are elided by this code:
rtx len = type == reduction_type::MASK_LEN_FOLD_LEFT ? ops[4] : NULL_RTX;
emit_scalar_move_insn (code_for_pred_broadcast (m1_mode), scalar_move_ops,
LGTM, but I would like make sure Robin is OK too
On Thu, Jul 20, 2023 at 4:51 PM Juzhe-Zhong wrote:
>
> This patch is depending on:
> https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624995.html
>
> Consider this following case:
> float foo (float *__restrict a, int n)
> {
> float result = 1
> LGTM, but I would like make sure Robin is OK too
Yes, LGTM as well.
Regards
Robin
I have posted below the vector register calling convention rules from in the
proposal[1]:
v0 is used to pass the first vector mask argument to a function, and to return
vector mask result from a function. v8-v23 are used to pass vector data
arguments, vector tuple arguments and the rest vector mas
Hi RISC-V folks,
This patch implement the proposal of RISC-V vector calling convention[1] and
this feature can be enabled by `--param=riscv-vector-abi` option. Currently,
all vector type arguments and return values are pass by reference. With this
patch, these arguments and return values can pass
Functions which follow vector calling convention variant need be annotated by
.variant_cc directive according the RISC-V Assembly Programmer's Manual and
RISC-V ELF Specification[2].
[1]
https://github.com/riscv-non-isa/riscv-asm-manual/blob/master/riscv-asm.md#pseudo-ops
[2]
https://github.com/
Because functions which follow vector calling convention variant has
callee-saved vector reigsters but functions which follow standard calling
convention don't have. We need to distinguish which function callee is so that
we can tell GCC exactly which vector registers callee will clobber. So I enco
Richard Biener writes:
> On Thu, 20 Jul 2023, Richard Sandiford wrote:
>
>> Tamar Christina writes:
>> > Hi All,
>> >
>> > The resulting predicate register of a whilelo is not
>> > restricted to the lower half of the predicate register file.
>> >
>> > As such these tests started failing after rec
Jan Hubicka writes:
>> Tamar Christina writes:
>> > Hi All,
>> >
>> > The resulting predicate register of a whilelo is not
>> > restricted to the lower half of the predicate register file.
>> >
>> > As such these tests started failing after recent changes
>> > because the whilelo outside the loop
On Thu, 20 Jul 2023, Richard Biener wrote:
> > Thanks for making this improvement. I've checked MIPS results and code
> > produced now is as follows:
> >
> > daddiu $sp,$sp,-64
> > sd $5,24($sp)
> > sd $7,40($sp)
> > ldc1$f0,24($sp)
> > ldc1
Richard Biener writes:
#> On Thu, 20 Jul 2023, Richard Sandiford wrote:
>
>> Jeff Law via Gcc-patches writes:
>> > On 7/19/23 04:25, Richard Biener wrote:
>> >> On Wed, 19 Jul 2023, YunQiang Su wrote:
>> >>
>> >>> Eric Botcazou ?2023?7?19??? 17:45???
>>
>> > I don't see that. That's d
This is an update of the patch series at
https://gcc.gnu.org/pipermail/gcc-patches/2023-July/623375.html
Changes since v3:
- Use void_node in values map to indicate out-of-lifetime instead of a separate
hash set
- Remove tracking of temporaries for loops and calls
- Fix missed checks for uses o
This adds rudimentary lifetime tracking in C++ constexpr contexts,
allowing the compiler to report errors with using values after their
backing has gone out of scope. We don't yet handle other ways of
accessing values outside their lifetime (e.g. following explicit
destructor calls).
PR c+
Currently, when typeck discovers that a return statement will refer to a
local variable it rewrites to return a null pointer. This causes the
error messages for using the return value in a constant expression to be
unhelpful, especially for reference return values.
This patch removes this "optimis
This patch updates 'input_location' during constant evaluation to ensure
that errors in subexpressions that lack location information still
provide accurate diagnostics.
By itself this change causes some small regressions in diagnostic
quality for circumstances where errors used 'input_location' b
Hi Chung-Lin!
On 2023-07-13T18:54:00+0800, Chung-Lin Tang wrote:
> On 2023/6/16 5:13 PM, Thomas Schwinge wrote:
>> OK with one small change, please -- unless there's a reason for doing it
>> this way: [...]
> I've adjusted the Fortran implementation as you described. Yes, I agree this
> way
> m
>> cvt_type
>> - = build_nonstandard_integer_type (GET_MODE_BITSIZE (imode),
>> + = build_nonstandard_integer_type (GET_MODE_BITSIZE
>> + (intermediate_mode),
>>
Hi,
As PR110729 reported, there was one issue for .section
__patchable_function_entries with -ffunction-sections, that
is we put the same symbol as link_to section symbol for all
functions wrongly. The commit r13-4294 for PR99889 has
fixed this with the corresponding label LPFE* which sits in
the
Hi,
Commit r14-2267-gb8806f6ffbe72e adjusts the arguments order
of LEN_STORE from {len,vector,bias} to {len,bias,vector},
in order to make them consistent with LEN_MASK_STORE and
MASK_STORE. But it missed to update the related handlings
in tree-ssa-sccvn.cc, it caused the failure shown in PR
1107
On Linux/x86_64,
1d3e4f4e2d19c3394dc018118a78c1f4b59cb5c2 is the first bad commit
commit 1d3e4f4e2d19c3394dc018118a78c1f4b59cb5c2
Author: Lewis Hyatt
Date: Tue Jul 18 17:16:08 2023 -0400
libcpp: Handle extended characters in user-defined literal suffix [PR103902]
caused
FAIL: g++.dg/cpp0
On Linux/x86_64,
c1e420549f2305efb70ed37e693d380724eb7540 is the first bad commit
commit c1e420549f2305efb70ed37e693d380724eb7540
Author: Maciej W. Rozycki
Date: Wed Jul 19 11:59:29 2023 +0100
testsuite: Add 64-bit vector variant for bb-slp-pr95839.c
caused
FAIL: gcc.dg/vect/bb-slp-pr958
On Thu, Jul 20, 2023 at 11:16 AM Maciej W. Rozycki wrote:
>
> On Thu, 20 Jul 2023, Richard Biener wrote:
>
> > > Thanks for making this improvement. I've checked MIPS results and code
> > > produced now is as follows:
> > >
> > > daddiu $sp,$sp,-64
> > > sd $5,24($sp)
> > >
"Kewen.Lin" writes:
> Hi,
>
> As PR110729 reported, there was one issue for .section
> __patchable_function_entries with -ffunction-sections, that
> is we put the same symbol as link_to section symbol for all
> functions wrongly. The commit r13-4294 for PR99889 has
> fixed this with the correspon
"Kewen.Lin" writes:
> Hi,
>
> Commit r14-2267-gb8806f6ffbe72e adjusts the arguments order
> of LEN_STORE from {len,vector,bias} to {len,bias,vector},
> in order to make them consistent with LEN_MASK_STORE and
> MASK_STORE. But it missed to update the related handlings
> in tree-ssa-sccvn.cc, it c
When we materialize a layout we push edge permutes to constant/external
defs without checking we can actually do so. For externals defined
by vector stmts rather than scalar components we can't.
Bootstrapped and tested on x86_64-unknown-linux-gnu.
OK?
Thanks,
Richard.
PR tree-optimizat
Just finish Bootstrap and regression on X86.
Ok for trunk ?
juzhe.zh...@rivai.ai
From: juzhe.zhong
Date: 2023-07-20 16:06
To: gcc-patches
CC: richard.sandiford; rguenther; Ju-Zhe Zhong
Subject: [PATCH] CODE STRUCTURE: Refine codes in Vectorizer
From: Ju-Zhe Zhong
Hi, Richard and Richi.
I
When PRE discovers a full redundancy during insertion it cannot unite
the two value sets. Instead it inserts a copy old-val = new-val where
new-val can also be a constant. The following looks through such
copies during elimination, providing one extra level of constant and
copy propagation. For
On Thu, Jul 20, 2023 at 1:46 PM haochen.jiang via Gcc-patches
wrote:
>
> On Linux/x86_64,
>
> c1e420549f2305efb70ed37e693d380724eb7540 is the first bad commit
> commit c1e420549f2305efb70ed37e693d380724eb7540
> Author: Maciej W. Rozycki
> Date: Wed Jul 19 11:59:29 2023 +0100
>
> testsuite:
On Thu, 20 Jul 2023, juzhe.zh...@rivai.ai wrote:
> Just finish Bootstrap and regression on X86.
>
> Ok for trunk ?
OK. Not an issue currently but I think LEN_MASK should be
checked before MASK.
Richard.
>
> juzhe.zh...@rivai.ai
>
> From: juzhe.zhong
> Date: 2023-07-20 16:06
> To: gcc-patch
On Thu, 20 Jul 2023, Richard Biener wrote:
> > There's no such requirement in the psABI and I fail to see a plausible
> > justification. And direct GPR<->FPR move patterns are available in the
> > backend for the V2SF mode. Also there's no delay slot requirement even
> > for these move instruct
On Thu, Jul 20, 2023 at 9:10 AM Jan Hubicka via Gcc-patches
wrote:
>
> Hi,
> this patch makes tree-ssa-loop-ch to understand if-combined conditionals
> (which
> are quite common) and remove the IV-derived heuristics. That heuristics is
> quite dubious because every variable with PHI in header of
On Thu, Jul 20, 2023 at 1:11 AM Alexandre Oliva wrote:
>
> On Jul 18, 2023, Richard Biener wrote:
>
> > I think the __symver__ attribute does something similar already so
> > maybe use __attribute__((__sym__("foo")))?
>
> Cool, thanks, that will do. Regstrapped on x86_64-linux-gnu. Ok to
> inst
On Thu, 20 Jul 2023, Richard Biener wrote:
> > c1e420549f2305efb70ed37e693d380724eb7540 is the first bad commit
> > commit c1e420549f2305efb70ed37e693d380724eb7540
> > Author: Maciej W. Rozycki
> > Date: Wed Jul 19 11:59:29 2023 +0100
> >
> > testsuite: Add 64-bit vector variant for bb-slp-
On Thu, Jul 20, 2023 at 3:13 PM Maciej W. Rozycki wrote:
>
> On Thu, 20 Jul 2023, Richard Biener wrote:
>
> > > c1e420549f2305efb70ed37e693d380724eb7540 is the first bad commit
> > > commit c1e420549f2305efb70ed37e693d380724eb7540
> > > Author: Maciej W. Rozycki
> > > Date: Wed Jul 19 11:59:29
If the host triple and the target triple are different but the host is
LoongArch, in some cases --with-arch=native can be useful. For example,
if we are bootstrapping a loongarch64-linux-musl toolchain on a
Glibc-based system and we don't intend to use the toolchain on other
machines, we can use
Hi Chung-Lin, Tobias!
On 2023-07-11T02:33:58+0800, Chung-Lin Tang wrote:
> this patch contains support for the 'readonly' modifier in copyin clauses
> and the cache directive.
Thanks!
> As we discussed earlier, the work for actually linking this to middle-end
> points-to analysis is a somewhat
Committed, thanks Richard.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Richard Biener via Gcc-patches
Sent: Thursday, July 20, 2023 8:54 PM
To: juzhe.zh...@rivai.ai
Cc: gcc-patches ; richard.sandiford
Subject: Re: [PATCH] CODE STRUCTURE: Refine codes in Vectorizer
On Thu, 2
Hi,
this patch cleanups API for determining expected loop iteraitons from profile.
We started with having expected_loop_iterations and only source was the integer
represented BB counts. It did some work on guessing number of iteration if
profile was absent or bogus. Later we introduced loop_info a
On Wed, Jul 19, 2023 at 03:24:10PM -0400, Jason Merrill wrote:
> On 7/19/23 14:38, Marek Polacek wrote:
> > On Wed, Jul 19, 2023 at 02:32:15PM -0400, Patrick Palka wrote:
> > > On Wed, 19 Jul 2023, Marek Polacek wrote:
> > >
> > > > Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk?
> >
Richard Biener via Gcc-patches writes:
> When we materialize a layout we push edge permutes to constant/external
> defs without checking we can actually do so. For externals defined
> by vector stmts rather than scalar components we can't.
>
> Bootstrapped and tested on x86_64-unknown-linux-gnu.
On 7/20/23 10:08, Marek Polacek wrote:
On Wed, Jul 19, 2023 at 03:24:10PM -0400, Jason Merrill wrote:
On 7/19/23 14:38, Marek Polacek wrote:
On Wed, Jul 19, 2023 at 02:32:15PM -0400, Patrick Palka wrote:
On Wed, 19 Jul 2023, Marek Polacek wrote:
Bootstrapped/regtested on x86_64-pc-linux-gnu,
This patch series introduces multilib support for Espressif XTENSA chips in gcc.
The addition of the "-mdynconfig=" option was necessary because the existing
environment variable XTENSA_GNU_CONFIG cannot be utilized for implementing
multilib.
This is because multilib operates with gcc options rath
gcc/
* config/xtensa/elf.h (ASM_SPEC, LINK_SPEC): Pass dynconfig to
assembler/linker.
* config/xtensa/linux.h (ASM_SPEC, LINK_SPEC): Likewise.
* config/xtensa/uclinux.h (ASM_SPEC, LINK_SPEC): Likewise.
* config/xtensa/xtensa-dynconfig.cc: May build dynconfig
gcc/
* config/xtensa/xtensa.h (XCHAL_HAVE_BE, XCHAL_HAVE_DENSITY,
XCHAL_HAVE_CONST16, XCHAL_HAVE_ABS, XCHAL_HAVE_ADDX,
XCHAL_HAVE_L32R, XSHAL_USE_ABSOLUTE_LITERALS,
XSHAL_HAVE_TEXT_SECTION_LITERALS, XCHAL_HAVE_MAC16,
XCHAL_HAVE_MUL16, XCHAL_HAVE_MUL32
gcc/
* config.gcc: Add xtensa*-esp*-elf target.
* config/xtensa/t-esp-multilib: New file.
---
gcc/config.gcc | 6 ++
gcc/config/xtensa/t-esp-multilib | 20
2 files changed, 26 insertions(+)
create mode 100644 gcc/config/xtensa/t-esp-mult
On 7/20/23 05:35, Nathaniel Shead wrote:
This adds rudimentary lifetime tracking in C++ constexpr contexts,
allowing the compiler to report errors with using values after their
backing has gone out of scope. We don't yet handle other ways of
accessing values outside their lifetime (e.g. following
Hi,
This patch documents the analyzer parameters introduced in
r14-2029-g0e466e978c7286 also in gcc/doc/invoke.texi.
Committed as obvious after testing with make pdf and make info and
eyeballing the result.
Thanks,
Martin
2023-07-20 Martin Jambor
* doc/invoke.texi (analyzer-text-a
> Am 20.07.2023 um 16:09 schrieb Richard Sandiford :
>
> Richard Biener via Gcc-patches writes:
>> When we materialize a layout we push edge permutes to constant/external
>> defs without checking we can actually do so. For externals defined
>> by vector stmts rather than scalar components we
On Thu, 2023-07-20 at 16:47 +0200, Martin Jambor wrote:
> Hi,
>
> This patch documents the analyzer parameters introduced in
> r14-2029-g0e466e978c7286 also in gcc/doc/invoke.texi.
>
> Committed as obvious after testing with make pdf and make info and
> eyeballing the result.
>
> Thanks,
Thanks
On Thu, Jul 20, 2023 at 7:37 AM Alexey Lapshin
wrote:
>
> gcc/
> * config/xtensa/xtensa.h (XCHAL_HAVE_BE, XCHAL_HAVE_DENSITY,
> XCHAL_HAVE_CONST16, XCHAL_HAVE_ABS, XCHAL_HAVE_ADDX,
> XCHAL_HAVE_L32R, XSHAL_USE_ABSOLUTE_LITERALS,
> XSHAL_HAVE_TEXT_SECTION_LITER
Hi Thomas & Chung-Lin,
On 20.07.23 15:33, Thomas Schwinge wrote:
On 2023-07-11T02:33:58+0800, Chung-Lin Tang
wrote:
+++ b/gcc/c/c-parser.cc
@@ -14059,7 +14059,8 @@ c_parser_omp_variable_list (c_parser *parser,
static tree
c_parser_omp_var_list_parens (c_parser *parser, enum omp_clause_co
Oops, missed this loop while implementing...
I had a problem with building esp chips multilib until added my changes.
This loop looks like just defines a macro without value.
But the value must be set to make it work correctly.
It uses builtin_define() instead builtin_define_with_int_value()
I w
On Thu, Jul 20, 2023 at 8:12 AM Alexey Lapshin
wrote:
>
> Oops, missed this loop while implementing...
>
> I had a problem with building esp chips multilib until added my changes.
>
> This loop looks like just defines a macro without value.
But it defines them with their respective values.
Just n
On 7/20/23 05:36, Nathaniel Shead wrote:
Currently, when typeck discovers that a return statement will refer to a
local variable it rewrites to return a null pointer. This causes the
error messages for using the return value in a constant expression to be
unhelpful, especially for reference retur
On Wed, 19 Jul 2023, Jason Merrill wrote:
> On 7/19/23 14:05, Patrick Palka wrote:
> > Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for
> > trunk/13?
> >
> > -- >8 --
> >
> > Since the arguments 'pargs' passed to the coerce_template_parms from
> > coerce_template_template
On Wed, Jul 19, 2023 at 3:33 PM Ken Matsui via Gcc-patches
wrote:
>
> This patch defines _GLIBCXX_HAS_BUILTIN_TRAIT macro, which will be used
> as a flag to toggle the use of built-in traits in the type_traits header
> through _GLIBCXX_NO_BUILTIN_TRAITS macro, without needing to modify the
> sourc
I see now, thanks for the explanation, I will try to rebuild toolchain without
this particular patch.
BTW, what do you thing about placing config from newlib overlay to dynconfig?
When recently looking at the libgomp documentation, here the current GCC 13
version,
https://gcc.gnu.org/onlinedocs/gcc-13.1.0/libgomp/Runtime-Library-Routines.html
I found both the order confusing and the wording:
"The routines are structured in following three parts:"
as I did not see any s
Richard Biener writes:
>> Am 20.07.2023 um 16:09 schrieb Richard Sandiford :
>>
>> Richard Biener via Gcc-patches writes:
>>> When we materialize a layout we push edge permutes to constant/external
>>> defs without checking we can actually do so. For externals defined
>>> by vector stmts rathe
On 7/20/23 05:37, Nathaniel Shead wrote:
This patch updates 'input_location' during constant evaluation to ensure
that errors in subexpressions that lack location information still
provide accurate diagnostics.
By itself this change causes some small regressions in diagnostic
quality for circums
On Wed, Jul 19, 2023 at 03:22:10PM -0400, Marek Polacek wrote:
> Ping.
>
> On Mon, Jul 10, 2023 at 04:33:26PM -0400, Marek Polacek via Gcc-patches wrote:
> > Running
> > $ make check-g++
> > RUNTESTFLAGS='--target_board=unix\{-D_GLIBCXX_USE_CXX11_ABI=0,\}
> > dg.exp=allocator-opt1.C'
> > yields:
On 7/20/23 12:00, Patrick Palka wrote:
On Wed, 19 Jul 2023, Jason Merrill wrote:
On 7/19/23 14:05, Patrick Palka wrote:
Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for
trunk/13?
-- >8 --
Since the arguments 'pargs' passed to the coerce_template_parms from
coerce_temp
> Am 20.07.2023 um 18:59 schrieb Richard Sandiford :
>
> Richard Biener writes:
Am 20.07.2023 um 16:09 schrieb Richard Sandiford
:
>>>
>>> Richard Biener via Gcc-patches writes:
When we materialize a layout we push edge permutes to constant/external
defs without checki
Richard Biener writes:
>> Am 20.07.2023 um 18:59 schrieb Richard Sandiford :
>>
>> Richard Biener writes:
> Am 20.07.2023 um 16:09 schrieb Richard Sandiford
> :
Richard Biener via Gcc-patches writes:
> When we materialize a layout we push edge permutes to constant/exte
On Thu, Jul 20, 2023 at 9:10 AM Alexey Lapshin
wrote:
> I see now, thanks for the explanation, I will try to rebuild toolchain
> without this particular patch.
> BTW, what do you thing about placing config from newlib overlay to dynconfig?
That's the right thing to do. Bonus points for keeping b
On Thu, 2023-07-20 at 08:25 -0700, Max Filippov wrote:
> But it defines them with their respective values.
> Just notice that it adds two leading underscores in front of the names.
Why builtin macros were defined with prefix?
With this approach I also need define it somewhere:
#define XTHAL_ABI_W
On Thu, 2023-07-20 at 10:43 -0700, Max Filippov wrote:
> Bonus points for keeping backwards
> compatibility with the overlay-based configuration method (:
Got you, thanks!
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