tested on i688, x86_64 Darwin versions with/without support for the
platform_version flag. Checked by Rainer on macOS14. Pushed to trunk
thanks,
Iain
--- 8< ---
Later versions of the static linker support a more flexible flag to
describe the OS, OS version and SDK used to build the code. This
r
Hi Mikael,
Am 11.07.23 um 12:32 schrieb Mikael Morin via Gcc-patches:
Hello,
this is a followup to Harald's recent work [1] on the evaluation order
of arguments, when one of them is passed to an intent(out) allocatable
dummy and is deallocated before the call.
This extends Harald's fix to suppo
On Thu, Jul 13, 2023 at 2:22 AM Jonathan Wakely wrote:
>
> On Wed, 12 Jul 2023 at 21:42, Ken Matsui wrote:
> >
> > On Wed, Jul 12, 2023 at 3:01 AM Jonathan Wakely wrote:
> > >
> > > On Mon, 10 Jul 2023 at 06:51, Ken Matsui via Libstdc++
> > > wrote:
> > > >
> > > > Hi,
> > > >
> > > > Here is t
> On Jul 13, 2023, at 12:47 PM, Mikael Pettersson wrote:
>
> If the stack frame only contains an alloca area, then
> pdp11_expand_epilogue fails to deallocate it, resulting
> in callee-saved registers and the return address being
> restored from the wrong stack slots. Fixed by adding
> || cfu
Ping.
On 6/30/23 2:26 PM, Pat Haugen via Gcc-patches wrote:
Updated from prior version to address latest review comment (simplify
umod3).
Disable generation of scalar modulo instructions.
It was recently discovered that the scalar modulo instructions can suffer
noticeable performance issues fo
On Thu, Jul 06, 2023 at 06:56:21PM +, Qing Zhao wrote:
> Hi, Kees,
>
> I have updated my V1 patch with the following changes:
> A. changed the name to "counted_by"
> B. changed the argument from a string to an identifier
> C. updated the documentation and testing cases accordingly.
Sounds gre
On 7/13/23 11:48, Patrick Palka wrote:
On Wed, 28 Jun 2023, Patrick Palka wrote:
On Wed, Jun 28, 2023 at 11:50 AM Jason Merrill wrote:
On 6/23/23 12:23, Patrick Palka wrote:
On Fri, 23 Jun 2023, Jason Merrill wrote:
On 6/21/23 13:19, Patrick Palka wrote:
When stepping through the variabl
This patch implements built-in trait for std::is_pointer.
gcc/cp/ChangeLog:
* cp-trait.def: Define __is_pointer.
* constraint.cc (diagnose_trait_expr): Handle CPTK_IS_POINTER.
* semantics.cc (trait_expr_value): Likewise.
(finish_trait_expr): Likewise.
gcc/testsuit
This patch lets libstdc++ use new built-in trait __is_pointer.
libstdc++-v3/ChangeLog:
* include/bits/cpp_type_traits.h (__is_ptr): Use __is_pointer
built-in trait.
* include/std/type_traits (is_pointer): Likewise. Optimize its
implementation.
(is_pointer_v
Add comments as Robin's suggestion in scatter_store_run-7.c
Enable COND_LEN_FMA auto-vectorization for floating-point FMA
auto-vectorization **NO** ffast-math.
Since the middle-end support has been approved and I will merge it after I
finished bootstrap && regression on X86.
https://gcc.gnu.org
Ok. Comments added:
in V2:
https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624476.html
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-07-13 23:25
To: juzhe.zhong; Kito Cheng
CC: rdapp.gcc; gcc-patches; jeffreyalaw; kito.cheng; palmer; palmer
Subject: Re: [PATCH] RISC-V: Enable COND_LEN
When generating the gen_and3 function based on the and3
template, it produces the expression emit_insn (gen_rtx_SET (operand0,
gen_rtx_AND (, operand1, operand2)));, which is identical to the
portion I removed in this patch. Therefore, the redundant portion can be
deleted.
Signed-off-by: Die Li
Hi,
The attached patch fixes PR 101469.
Tested by the original reporter Rin Okuyama on NetBSD with GCC 10.5.
Applied to master, GCC 11, GCC 12, GCC 13 after 'make all' sanity check.
Cheers,
Oleg
gcc/ChangeLog:
PR target/101469
* config/sh/sh.md (peephole2): Handle case where el
On Linux/x86_64,
450b05ce54d3f08c583c3b5341233ce0df99725b is the first bad commit commit
450b05ce54d3f08c583c3b5341233ce0df99725b
Author: Tobias Burnus
Date: Wed Jul 12 13:50:21 2023 +0200
libgomp: Use libnuma for OpenMP's partition=nearest allocation trait
caused
with GCC configured w
On Thu, 13 Jul 2023 19:02:05 PDT (-0700), li...@eswincomputing.com wrote:
When generating the gen_and3 function based on the and3
template, it produces the expression emit_insn (gen_rtx_SET (operand0,
gen_rtx_AND (, operand1, operand2)));, which is identical to the
portion I removed in this patch
Expanding without DONE or FAIL will leave the pattern as well, so this
patch is fine IMO, so this patch LGTM, but anyway I will test this and
commit if passed :)
On Fri, Jul 14, 2023 at 10:34 AM Palmer Dabbelt wrote:
>
> On Thu, 13 Jul 2023 19:02:05 PDT (-0700), li...@eswincomputing.com wrote:
>
On Thu, 13 Jul 2023 19:41:08 PDT (-0700), gcc-patches@gcc.gnu.org wrote:
Expanding without DONE or FAIL will leave the pattern as well, so this
patch is fine IMO, so this patch LGTM, but anyway I will test this and
commit if passed :)
Ah, thanks, I guess I didn't know that. This is probably fi
> The recent change in TImode parameter passing on x86_64 results in the FAIL
> of pr91681-1.c. The issue is that with the extra flexibility, the combine
> pass is
> now spoilt for choice between using either the
> *add3_doubleword_concat or the *add3_doubleword_zext
> patterns, when one operand
From: Pan Li
This patch would like to support the basic floating-point dynamic
rounding modes for the RVV.
We implement the dynamic rounding mode by below steps.
1. Set entry to DYN and exit to DYN_EXIT.
2. Add one rtl variable into machine_function for backup/restore.
3. Backup frm value when e
On 7/13/23 20:44, Palmer Dabbelt wrote:
On Thu, 13 Jul 2023 19:41:08 PDT (-0700), gcc-patches@gcc.gnu.org wrote:
Expanding without DONE or FAIL will leave the pattern as well, so this
patch is fine IMO, so this patch LGTM, but anyway I will test this and
commit if passed :)
Ah, thanks, I gu
On 7/13/23 20:41, Kito Cheng via Gcc-patches wrote:
Expanding without DONE or FAIL will leave the pattern as well, so this
patch is fine IMO, so this patch LGTM, but anyway I will test this and
commit if passed :)
THanks. I looked fine to me, but I wasn't going to have the time to
commit/pus
Hi all,
This patch is to add initial support for Lunar Lake, Arrow Lake and Arrow Lake
S for GCC.
This link of related information is listed below:
https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html
This has been test
On 7/13/23 09:05, Manolis Tsamis wrote:
In this version I have made f-m-o able to also eliminate constant
moves in addition to the add constant instructions.
This increases the number of simplified/eliminated instructions and is
a good addition for RISC style ISAs where these are more common.
From: Naveen H S
This patch adds lowering bit-field and opposite endian accesses pass.
The patch addresses many issues in:-
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=19466
2023-07-14 Andrew Pinski
Co-authored-by: Naveen H S
gcc/ChangeLog:
* Makefile.in (OBJS): Add gimple-lower-
cprop1 pass does not consider paradoxical subreg and for (insn 22) claims
that it equals 8 elements of HImodeby setting REG_EQUAL note:
(insn 21 19 22 4 (set (reg:V4QI 98)
(mem/u/c:V4QI (symbol_ref/u:DI ("*.LC1") [flags 0x2]) [0 S4
A32])) "pr110206.c":12:42 1530 {*movv4qi_internal}
(
Hi all,
This patch aims to auto vectorize usdot_prod and udot_prod with newly
introduced AVX-VNNI-INT16.
Also I refined the redundant mode iterator in the patch.
Regtested on x86_64-pc-linux-gnu. Ok for trunk after AVX-VNNI-INT16 patch
checked in?
BRs,
Haochen
gcc/ChangeLog:
* config/
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