Re: [PATCH] Change AVX512FP16 to AVX512-FP16 in the document.

2023-01-29 Thread Gerald Pfeifer
On Sun, 29 Jan 2023, liuhongt wrote: > The official name is AVX512-FP16. > > Ready to push to trunk. > > gcc/ChangeLog: > > * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16. > * doc/invoke.texi: Ditto. Ok, thank you. (And okay to backport to older branches as/if you want.)

Re: [PATCH] Change AVX512FP16 to AVX512-FP16 which is official name.

2023-01-29 Thread Gerald Pfeifer
On Sun, 29 Jan 2023, liuhongt wrote: > Ready to push to trunk. Yes, thank you. Gerald

[PATCH] driver, toplevel: Avoid emitting the version information twice.

2023-01-29 Thread Iain Sandoe via Gcc-patches
Technically, this is seems to be a regression somewhere between 4.2 and 4.6 but, it seems, not enough for anyone to care too much. Tested on various Darwin versions and x86_64, powerpc64 linux, OK for trunk {now,stage1}? thanks, Iain --- 8< --- For a regular compile job, with -v we emit the GCC

[PATCH V2 1/1] [fwprop]: Add the support of forwarding the vec_duplicate rtx

2023-01-29 Thread lehua . ding
From: Lehua Ding Hi Richard, According to your previous comments, I adjusted the code. It will be easier (by extend `get_inner_reg` function) to support the forwarding of new rtx operators (e.g. sign-extend) in the future. Please help review this code, thank you so much. The current code doesn'

[PATCH] RISC-V: Add indexed loads/stores C/C++ intrinsic support

2023-01-29 Thread juzhe . zhong
From: Ju-Zhe Zhong gcc/ChangeLog: * config/riscv/riscv-protos.h (get_vector_mode): New function. * config/riscv/riscv-v.cc (get_vector_mode): Ditto. * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type): New enum. (class loadstore): Adjust for indexed load

[PATCH] RISC-V: Add VSETVL testcases for indexed loads/stores.

2023-01-29 Thread juzhe . zhong
From: Ju-Zhe Zhong gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/vsetvl/avl_single-72.c: New test. * gcc.target/riscv/rvv/vsetvl/avl_single-76.c: New test. * gcc.target/riscv/rvv/vsetvl/avl_single-77.c: New test. --- .../riscv/rvv/vsetvl/avl_single-72.c | 27

[PATCH] RISC-V: Add indexed loads/stores constraints testcases

2023-01-29 Thread juzhe . zhong
From: Ju-Zhe Zhong gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/vlxei-vsxei-constraint-1.c: New test. --- .../riscv/rvv/base/vlxei-vsxei-constraint-1.c | 121 ++ 1 file changed, 121 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vlxei

[PATCH] fortran: Explicitly set name for *LOC default BACK argument [PR108450]

2023-01-29 Thread Mikael Morin
Hello, this is a fix for a gcc-12 ICE regression. This ICE rings a bell to me, and I think the change by Tobias which triggers it only uncovers a bug that can also happen independently in other cases. The problem is resolution of maxloc expressions is not idempotent, that is resolution chang

Re: [patch, fortran] PR103506 [10/11/12/13 Regression] ICE in gfc_free_namespace, at fortran/symbol.c

2023-01-29 Thread Mikael Morin
Le 29/01/2023 à 05:17, Jerry DeLisle via Fortran a écrit : Attached patch fixes this problem by allowing the namespace pointer to be set correctly regardless of error condition. Regression tested on x86_64_linux_gnu. OK for trunk and backports? Yes, thanks.

Re: [PATCH] fortran: Explicitly set name for *LOC default BACK argument [PR108450]

2023-01-29 Thread Harald Anlauf via Gcc-patches
Hi Mikael, Am 29.01.23 um 17:21 schrieb Mikael Morin: Hello, this is a fix for a gcc-12 ICE regression. This ICE rings a bell to me, and I think the change by Tobias which triggers it only uncovers a bug that can also happen independently in other cases. The problem is resolution of maxloc exp

[PATCH] RISC-V: Add vsoxei8 && vsoxei16 C++ API intrinsic testcase

2023-01-29 Thread juzhe . zhong
From: Ju-Zhe Zhong gcc/testsuite/ChangeLog: * g++.target/riscv/rvv/base/vsoxei16-1.C: New test. * g++.target/riscv/rvv/base/vsoxei16-2.C: New test. * g++.target/riscv/rvv/base/vsoxei16-3.C: New test. * g++.target/riscv/rvv/base/vsoxei8-1.C: New test. * g++

[PATCH] RISC-V: Add vsoxei32 && vsoxei64 C++ API intrinsic testcase

2023-01-29 Thread juzhe . zhong
From: Ju-Zhe Zhong gcc/testsuite/ChangeLog: * g++.target/riscv/rvv/base/vsoxei32-1.C: New test. * g++.target/riscv/rvv/base/vsoxei32-2.C: New test. * g++.target/riscv/rvv/base/vsoxei32-3.C: New test. * g++.target/riscv/rvv/base/vsoxei64-1.C: New test. * g+

Re: [PATCH 0/6] PowerPC Dense Math prelimary support (-mcpu=future)

2023-01-29 Thread Michael Meissner via Gcc-patches
On Sat, Jan 28, 2023 at 02:29:04AM -0500, Michael Meissner wrote: > On Fri, Jan 27, 2023 at 01:59:00PM -0600, Segher Boessenkool wrote: > > > There is one bug that I noticed. When you use the full DMR instruction > > > the > > > constant copy propagation patch issues internal errors. I believe t

Re: [PATCH] Fix PR 108582: ICE due to PHI-OPT removing a still in use ssa_name.

2023-01-29 Thread Richard Biener via Gcc-patches
On Sat, Jan 28, 2023 at 11:25 PM Andrew Pinski via Gcc-patches wrote: > > This patch adds a check in match_simplify_replacement to make sure the > middlebb > does not have any phi-nodes as we don't currently move those. > This was just a thinko from before. > > Ok? Bootstrapped and tested on x86_

Re: [PATCH] driver, toplevel: Avoid emitting the version information twice.

2023-01-29 Thread Richard Biener via Gcc-patches
On Sun, Jan 29, 2023 at 12:35 PM Iain Sandoe via Gcc-patches wrote: > > Technically, this is seems to be a regression somewhere between 4.2 and > 4.6 but, it seems, not enough for anyone to care too much. Tested on > various Darwin versions and x86_64, powerpc64 linux, > OK for trunk {now,stage1}