Hello Jørgen,
On 04/04/2022 10:14, Sebastian Huber wrote:
It seems that support for the new GCOV_TAG_CONDS is missing in gcov-tool
and gcov-dump, see "tag_table" in gcc/gcov-dump.c and
libgcc/libgcov-util.c.
it seems that for gcov-tool no changes are necessary. You added the
condition bit fi
When the walloca pass gained support for ranger the early pass
was not moved to a place where SSA form is available but remained
in the lowering pipeline. For the testcase in this bug this is
a problem because for errorneous input we still run the lowering
pipeline but here have broken SSA form wh
Hi!
In the following testcase sqrt is declared as unprototyped function
and so it depends on what type has the argument passed to it.
If an argument of incorrect type is passed, the sqrt comparison
simplification can create invalid GIMPLE.
The patch fixes it by punting if there is a mismatch of t
On Tue, 5 Apr 2022, Jakub Jelinek wrote:
> Hi!
>
> In the following testcase sqrt is declared as unprototyped function
> and so it depends on what type has the argument passed to it.
> If an argument of incorrect type is passed, the sqrt comparison
> simplification can create invalid GIMPLE.
>
>
On Tue, Apr 05, 2022 at 10:50:01AM +0200, Richard Biener wrote:
> > In the following testcase sqrt is declared as unprototyped function
> > and so it depends on what type has the argument passed to it.
> > If an argument of incorrect type is passed, the sqrt comparison
> > simplification can create
On Tue, 5 Apr 2022, Jakub Jelinek wrote:
> On Tue, Apr 05, 2022 at 10:50:01AM +0200, Richard Biener wrote:
> > > In the following testcase sqrt is declared as unprototyped function
> > > and so it depends on what type has the argument passed to it.
> > > If an argument of incorrect type is passed,
Hello, gentle maintainer.
This is a message from the Translation Project robot. (If you have
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On Fri, Mar 25, 2022 at 08:02:04PM -0600, Sandra Loosemore wrote:
> I ran into this bug in the handling of clauses on the combined "masked
> taskloop" OMP directive when I was working on something else. The fix
> turned out to be a 1-liner. OK for trunk?
>
> -Sandra
> commit 17c4fa0bd97c0709450
On Fri, Mar 25, 2022 at 08:03:09PM -0600, Sandra Loosemore wrote:
> I've got another patch forthcoming (stage 1 material) that adds some new
> diagnostics for non-rectangular loops during gimplification of OMP nodes.
> When I was working on that, I discovered that the Fortran front end wasn't
> att
The following avoids expanding definitions in regions conditionally
executed under the condition A when simplifying A && B or A || B.
This is done by passing down the basic-block of the outer condition
to maybe_fold_{and,or}_comparisons, through the various helpers
in gimple-fold.cc that might call
Hello, gentle maintainer.
This is a message from the Translation Project robot.
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Currently when we cannot move debug stmt from a forwarder to the
destination block we drop/reset them. But in some cases as for
the testcase we can move them to the predecessor when that has
a single successor and we can insert after the last stmt of the
block. That allows us to preserve debug in
On Tue, Apr 05, 2022 at 11:28:53AM +0200, Richard Biener wrote:
> > In GIMPLE, we call:
> > && gimple_builtin_call_types_compatible_p (stmt, fndecl)
> > but that is insufficient, that verifies whether the arguments passed to
> > GIMPLE_CALL match the fndecl argument types. But that fndecl may ve
On Tue, Apr 05, 2022 at 03:07:53PM +0200, Richard Biener wrote:
> The following avoids expanding definitions in regions conditionally
> executed under the condition A when simplifying A && B or A || B.
> This is done by passing down the basic-block of the outer condition
> to maybe_fold_{and,or}_co
Hi!
Still catching up with GCC/nvptx back end changes... %-)
In the following I'm not discussing the patch to document
"gcc-12: Nvptx updates", but rather one aspect of the
"gcc-12: Nvptx updates" themselves. ;-)
On 2022-03-30T14:27:41+0200, Tom de Vries wrote:
> + The -march flag has been
On Mon, Apr 04, 2022 at 09:01:40AM +0200, Richard Biener wrote:
> After r12-7931 we again honor MOVE_MAX when folding memcpy to
> a load/store pair. On i?86-*-* without SSE this now exposes the
> change done in r12-2666-g29f0e955c97da0 which adjusts MOVE_MAX
> from 16 to 4 on those targets. This
check_load_store_for_partial_vectors predates the support for SLP
gathers and so had a hard-coded assumption that gathers/scatters
(and load/stores lanes) would be non-SLP operations. This patch
passes down the slp_node so that the routine can work out how
many vectors are needed in both the SLP a
On 4/4/22 15:13, Yonghong Song wrote:
On 4/1/22 12:42 PM, David Faust wrote:
Hello,
This patch series is a first attempt at adding support for:
- Two new C-language-level attributes that allow to associate (to "tag")
particular declarations and types with arbitrary strings. As explain
We were failing to declare class S in the global namespace because we were
treating the requires-expression parameter scope as a normal block scope, so
the implicit declaration went there.
It seems to me that the requires parameter scope is more like a function
parameter scope (not least in the us
I had been thinking about DR1286 "equivalence" as meaning generally
interchangeable, but looking back at the proposed resolution in the context
of this PR, I see that it's just about use as a template argument. So let's
give a pedwarn if we look through a renaming alias.
Tested x86_64-pc-linux-gn
Use error_n rather than error_at for “%d vectors”, so that
translators can pick different translations based on the
number (2 vs more than 2, etc.)
Tested on aarch64-linux-gnu & pushed.
Richard
gcc/
PR target/104897
* config/aarch64/aarch64-sve-builtins.cc
(function_reso
This PR is about -fpack-struct causing a crash when
is included. The new register_tuple_type code was expecting a
normal unpacked structure layout instead of a packed one.
For SVE we got around this by temporarily suppressing -fpack-struct,
so that the tuple types always have their normal ABI.
The mops cpy* patterns take three registers: a destination address,
a source address, and a size. The patterns clobber all three registers
as part of the operation. The set* patterns take a destination address,
a size, and a store value, and they clobber the first two registers as
part of the ope
Ok to commit?
-- 8< --
Without this, for a target where alignment and structure-sizes are by
default byte-aligned, such as cris-elf, you'll see, in libstdc++.log:
/X/gcc/libstdc++-v3/testsuite/20_util/expected/requirements.cc:127: error:
static assertion failed
/X/gcc/lib
Am Tue, 5 Apr 2022 08:30:32 +0200
schrieb "Richard Biener" :
> If you have git write access you should add yourself in the DCO
> section in the MAINTAINERS file. Otherwise it has been said it's
> enough to explicitly state in mail that you are contributing this
> change under the Developer's Cert
Greetings,
Propose patch for https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104812 to
reject non-conforming code when construct-name clashes with already
defined symbol names, e.g:
subroutine s1
logical :: x
x: if (x) then ! Currently gfortran accepts 'x' as constuct-name
Hi All,
As the discussion in the PR pointed out the RTL we have for the REDUC_PLUS
patterns are wrong. The UNSPECs are modelled as returning a vector and then
in an expand pattern we emit a vec_select of the 0th element to get the scalar.
This is incorrect as the instruction itself already only
Hi All,
As pointed out in PR105095 these tests weren't running, mainly because the .exp
file contains a filter on the first character so it can distinguish between
fast-math-bb-slp-* and fast-math-*, my test started with `c` and so didn't get
found.
This patch adds `c` to the list of filters and
Hi All,
These tests are reduced from a C program and use gcc vector extensions and so
aren't endianness agnostic. As such skip them on BE.
Regtested on aarch64_be-none-linux-gnu and no issues.
committed under the GCC obvious rule.
Thanks,
Tamar
gcc/testsuite/ChangeLog:
* gcc.target/aa
Hi Thomas,
I apologise that it might complicate things, but one potential benefit of
--with-cuda-driver
(i.e. linking the compiler against proprietary libraries) is that it would
allow support for
-march=native on nvptx (i.e. the gcc driver can figure out what sm_xx is
available on the
GPU(s)
On Tue, 5 Apr 2022, 17:44 Hans-Peter Nilsson via Libstdc++, <
libstd...@gcc.gnu.org> wrote:
> Ok to commit?
> -- 8< --
>
> Without this, for a target where alignment and structure-sizes are by
> default byte-aligned, such as cris-elf, you'll see, in libstdc++.log:
>
> /X/gc
Hello, gentle maintainer.
This is a message from the Translation Project robot.
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2022-04-05 Uroš Bizjak
gcc/ChangeLog:
PR target/105139
* config/i386/mmx.md (*movv2qi_internal):
Change insn mode of alternative 5 to HF for TARGET_AVX512FP16.
gcc/testsuite/ChangeLog:
PR target/105139
* gcc.target/i386/pr105139.c: New test.
Bootstrapped and regression t
Hi Harald,
Steve's analysis (see PR) showed that we confused the case when a
symbol refererred to a recursive procedure which was named the same
as an intrinsic. The standard allows such recursive references
(see e.g. F2018:19.3.1).
The attached patch is based on Steve's, but handles both func
On 04/04/2022 10:14, Sebastian Huber wrote:
> Hello Jørgen,
>
> having support for MC/DC coverage in GCC would be really nice. I tried out
> your
> latest patch on an arm cross-compiler with Newlib (inhibit_libc is defined).
> Could you please add the following fix to your patch:
>
> diff --git
On Fri, 2022-03-25 at 14:38 -0600, Martin Sebor wrote:
> On 3/25/22 12:45, David Malcolm wrote:
> > On Wed, 2022-03-23 at 17:52 +0100, Sebastian Huber wrote:
> > > On 23/03/2022 17:31, Martin Sebor via Gcc-patches wrote:
> > > >
> > > > The concern is that the constraints implied by atttributes
>
This simple patch allows the i386 backend to generate pandn instructions
for V1TI mode. Currently, the testcase:
typedef unsigned __int128 v1ti __attribute__ ((__vector_size__ (16)));
v1ti andnot1(v1ti x, v1ti y) { return ~x & y; }
generates with -O2
pcmpeqd %xmm2, %xmm2
Hi!
On Tue, Mar 29, 2022 at 09:52:43AM +0200, Jakub Jelinek wrote:
> The testcase in the PR fails under valgrind on mips64 (but only Martin
> can reproduce, I couldn't).
> But the problem reported there is that SUBST_MODE remembers addresses
> into the regno_reg_rtx array, then some splitter needs
Before PCREL in POWER10, we were not allowed to perform sibcalls to longcall
functions since callee's return would skip the TOC restore in the caller.
However, with PCREL we can now safely perform a sibling call to longcall
functions. The problem with the current code in rs6000_sibcall_aix is that
Hi!
On Tue, Apr 05, 2022 at 05:06:50PM -0500, Peter Bergner wrote:
> Before PCREL in POWER10, we were not allowed to perform sibcalls to longcall
> functions since callee's return would skip the TOC restore in the caller.
> However, with PCREL we can now safely perform a sibling call to longcall
>
This libbacktrace patch by Rui Ueyama fixes handling an uncompressed
block that starts at an aligned byte. If the bits before the
uncompressed block ended at a byte boundary, libbacktrace accidentally
skipped the next byte, which is the first byte of the length of the
block. Bootstrapped and ran
Gentile ping for this :), thanks.
Link: https://gcc.gnu.org/pipermail/gcc-patches/2022-February/590906.html
R30_REGNUM could also be used as a component in shrink-wrapping
separate, this patch enables it in aarch64.
gcc/ChangeLog:
* config/aarch64/aarch64.cc (aarch64_get_separate_comp
On 4/5/22 5:32 PM, Segher Boessenkool wrote:
> On Tue, Apr 05, 2022 at 05:06:50PM -0500, Peter Bergner wrote:
>>
>> + /* Handle longcall attributes. */
>> + if ((INTVAL (cookie) & CALL_LONG) != 0
>> + && GET_CODE (func_desc) == SYMBOL_REF)
>
> Don't say "!= 0" here please.
>
> if (INT
On Wed, Apr 6, 2022 at 5:56 AM Roger Sayle wrote:
>
>
>
> This simple patch allows the i386 backend to generate pandn instructions
>
> for V1TI mode. Currently, the testcase:
>
>
>
> typedef unsigned __int128 v1ti __attribute__ ((__vector_size__ (16)));
>
> v1ti andnot1(v1ti x, v1ti y) { return ~
Hello, gentle maintainer.
This is a message from the Translation Project robot.
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on 2022/4/1 10:49 PM, Segher Boessenkool wrote:
> Hi!
>
> On Fri, Apr 01, 2022 at 02:27:14PM +0800, Kewen.Lin wrote:
>> Commit r12-7687 exposed one miss optimization chance in function
>> rs6000_maybe_emit_maxc_minc, for now it only considers comparison
>> codes GE/GT/LE/LT, but it can support mor
On Tue, 5 Apr 2022, Jakub Jelinek wrote:
> On Tue, Apr 05, 2022 at 11:28:53AM +0200, Richard Biener wrote:
> > > In GIMPLE, we call:
> > > && gimple_builtin_call_types_compatible_p (stmt, fndecl)
> > > but that is insufficient, that verifies whether the arguments passed to
> > > GIMPLE_CALL matc
On Tue, 5 Apr 2022, Richard Sandiford wrote:
> check_load_store_for_partial_vectors predates the support for SLP
> gathers and so had a hard-coded assumption that gathers/scatters
> (and load/stores lanes) would be non-SLP operations. This patch
> passes down the slp_node so that the routine can
On Tue, 5 Apr 2022, Tamar Christina wrote:
> Hi All,
>
> As pointed out in PR105095 these tests weren't running, mainly because the
> .exp
> file contains a filter on the first character so it can distinguish between
> fast-math-bb-slp-* and fast-math-*, my test started with `c` and so didn't ge
The following fixes recording uses in ARRAY_REFs with non-constant
element size or low bound.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
Richard.
2022-04-05 Richard Biener
PR tree-optimization/105148
* tree-ssa-loop-ivopts.cc (idx_record_use): Walk raw opera
There's no masked vpandw or vpandb, similar for vpxor/vpor/vpandn.
Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}
Ready to push to trunk.
gcc/ChangeLog:
* config/i386/sse.md (_andnot3_mask):
Removed.
(_andnot3): Disable V*HFmode patterns
for mask_applied
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