On 10/30/21 12:43, Stefan Schulze Frielinghaus wrote:
> Since a recent enhancement of -Waddress a couple of warnings are emitted
> and turned into errors during bootstrap:
>
> gcc/config/s390/s390.md:12087:25: error: the address of 'operands' will never
> be NULL [-Werror=address]
> 12087 | "TA
Shadow Call Stack can be used to protect the return address of a
function at runtime, and clang already supports this feature[1].
To enable SCS in user mode, in addition to compiler, other support
is also required (as described in [2]). This patch only adds basic
support for SCS from the compiler
On Mon, Nov 1, 2021 at 6:20 PM Martin Sebor via Gcc-patches
wrote:
>
> Patch 2 in this series adds support for detecting the uses of
> dangling pointers: those to auto objects that have gone out of
> scope. Like patch 1, to minimize false positives this detection
> is very simplistic. However, t
On Mon, Nov 01, 2021 at 06:25:45PM -0700, Thomas Rodgers via Gcc-patches wrote:
> +template
> + constexpr bool
> + __maybe_has_padding()
> + {
> +#if __has_builtin(__has_unique_object_representations)
> + return !__has_unique_object_representations(_Tp)
> + && !is_float
Hi!
This adds a testcase for random access class iterators. The diagnostics
can be different between templates and non-templates, as for some
threadprivate vars finish_id_expression replaces them with call to their
corresponding wrapper, but I think it is not that big deal, we reject
it in either
Hi!
As discussed in the PR, TImode isn't supported for -m32 on x86 (for the same
reason as on most 32-bit targets, no support for > 2 * BITS_PER_WORD
precision integers), but since PR32280 V1TImode is allowed with -msse in SSE
regs, V2TImode with -mavx or V4TImode with -mavx512f.
typedef __int128
On 10/29/21 11:36, Richard Biener wrote:
On Tue, Oct 26, 2021 at 5:27 PM Martin Liška wrote:
On 10/26/21 10:13, Richard Biener wrote:
On Tue, Oct 19, 2021 at 8:49 AM Martin Liška wrote:
On 10/18/21 12:08, Richard Biener wrote:
Can you please use a subdirectory for the sources, a "toplevel
On Tue, Nov 2, 2021 at 9:41 AM Jakub Jelinek wrote:
>
> Hi!
>
> As discussed in the PR, TImode isn't supported for -m32 on x86 (for the same
> reason as on most 32-bit targets, no support for > 2 * BITS_PER_WORD
> precision integers), but since PR32280 V1TImode is allowed with -msse in SSE
> regs,
Am Di., 2. Nov. 2021 um 02:26 Uhr schrieb Thomas Rodgers via Libstdc++
:
>
> This should address Jonathan's feedback and adds support for atomic_ref
>
I'm wondering why __clear_padding doesn't refer to the computed __ptr
value in the case where __builtin_clear_padding is used?
Thanks,
- Daniel
On 11/2/21 00:56, Sandra Loosemore wrote:
I'll wait a couple days before committing these patches, in case
anybody wants to give some feedback, especially on technical issues.
Hello.
Appreciate the work you did, but the patchset will cause quite some conflicts
in the prepared Sphinx migration
On Sat, Oct 30, 2021 at 10:54 PM H.J. Lu via Gcc-patches
wrote:
>
> sanitizer_platform_limits_freebsd.cpp must include from the OS,
> not include/md5.h in GCC source tree which is included by libbacktrace
> support. Disable libbacktrace on sanitizer_platform_limits_freebsd.cpp
> to avoid include
Update my email address, and move myself into the Write After Approval
list - I've not done any ARC work for years now.
/
* MAINTAINERS (Reviewers, arc): Remove my entry.
(Write After Approval): Add an entry for myself.
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 de
Even if GCC64 is able to boostrap without libffi being a
FAT library on AIX, the tests for "-maix32" are not working
without it.
libffi/ChangeLog:
2021-10-21 Clément Chigot
* Makefile.am (tmake_file): Build and install AIX-style FAT
libraries.
* Makefile.in: Regenerat
Hi Tamar,
On Fri, Oct 29, 2021 at 5:23 PM Richard Sandiford via Gcc-patches <
gcc-patches@gcc.gnu.org> wrote:
> Tamar Christina writes:
> > Hi All,
> >
> > Attached is a new version that fixes the previous SVE fallouts in a new
> way.
> >
> > Ok for master?
>
Looks like you forgot to try to b
> diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
> index 225e5b259c1..1a786f31258 100644
> --- a/gcc/config/riscv/riscv.md
> +++ b/gcc/config/riscv/riscv.md
> @@ -1812,7 +1812,7 @@ (define_expand "clear_cache"
>
> (define_insn "fence"
>[(unspec_volatile [(const_int 0)] UNSP
IIRC this issue should be resolved?
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99314
On Sun, Oct 31, 2021 at 5:34 PM wrote:
>
> From: linsinan1995 <47880367+linsinan1...@users.noreply.github.com>
>
> ---
> gcc/config/riscv/riscv.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> di
Hi Si-Yu:
Thanks for your patch!
Here is a general comment for this patch-set, GCC require ChagneLog in
commit log, and seems like that is included in your commit log, you
can refer other commit log to see how changelog wrote.
Scalar cryptography extension seems not define builtin and intrinsic
Hi,
Each of the comments on the previous version of the patch have been
addressed.
Ok for master?
Thanks,
Jonathan
From: Richard Sandiford
Sent: 22 October 2021 16:13
To: Jonathan Wright
Cc: gcc-patches@gcc.gnu.org ; Kyrylo Tkachov
Subject: Re: [PATCH 4/6] aarch64: Add machine modes for Ne
Wilco Dijkstra writes:
> ping
>
>
> From: Wilco Dijkstra
> Sent: 04 June 2021 14:44
> To: Richard Sandiford
> Cc: Kyrylo Tkachov ; GCC Patches
>
> Subject: [PATCH v3] AArch64: Improve GOT addressing
>
> Hi Richard,
>
> This merges the v1 and v2 patches and removes the spurious MEM from
> ldr_go
On Mon, Nov 01, 2021 at 05:14:12PM -0400, David Malcolm via Gcc-patches wrote:
> Thoughts?
Resending my previously internally posted mail:
Thanks for working for this, but I'm afraid this is done at a wrong
location.
Consider attached testcases Whomoglyph1.C and Whomoglyph2.C.
On Whomoglyph1.C t
On Tue, Nov 2, 2021 at 2:14 AM Richard Biener
wrote:
>
> On Sat, Oct 30, 2021 at 10:54 PM H.J. Lu via Gcc-patches
> wrote:
> >
> > sanitizer_platform_limits_freebsd.cpp must include from the OS,
> > not include/md5.h in GCC source tree which is included by libbacktrace
> > support. Disable libb
On Tue, Nov 02, 2021 at 12:56:53PM +0100, Jakub Jelinek wrote:
> Consider attached testcases Whomoglyph1.C and Whomoglyph2.C.
> On Whomoglyph1.C testcase, I'd expect a warning, because there is a clear
> confusion for the reader, something that isn't visible in any of emacs, vim,
> joe editors or o
On Tue, Nov 02, 2021 at 05:02:12AM -0700, H.J. Lu wrote:
> > On Sat, Oct 30, 2021 at 10:54 PM H.J. Lu via Gcc-patches
> > wrote:
> > >
> > > sanitizer_platform_limits_freebsd.cpp must include from the OS,
> > > not include/md5.h in GCC source tree which is included by libbacktrace
> > > support.
On Tue, Nov 2, 2021 at 5:11 AM Jakub Jelinek wrote:
>
> On Tue, Nov 02, 2021 at 05:02:12AM -0700, H.J. Lu wrote:
> > > On Sat, Oct 30, 2021 at 10:54 PM H.J. Lu via Gcc-patches
> > > wrote:
> > > >
> > > > sanitizer_platform_limits_freebsd.cpp must include from the OS,
> > > > not include/md5.h i
Jonathan Wright writes:
> Each of the comments on the previous version of the patch have been
> addressed.
Thanks.
I realise I was wrong with the vcombine thing: it's only vec_concat
for LE, not for BE. Sorry for the screw-up.
The patch is OK with that part reverted to your original version.
Hi,
In addition to the patches of Steve Kargl for PR 91497:
The MIN1 and MAX1 intrinsics do explicit type conversions and should
be silenced too for -Wconversion and -Wconversion-extra.
Adjust testcase to only use *4 and *8 real types, provide a second
testcase for *10 and *16 precisions.
Regtes
The 11/02/2021 00:06, Dan Li via Gcc-patches wrote:
> Shadow Call Stack can be used to protect the return address of a
> function at runtime, and clang already supports this feature[1].
>
> To enable SCS in user mode, in addition to compiler, other support
> is also required (as described in [2]).
On Sun, Oct 31, 2021 at 11:13 AM Keith Packard via Gcc-patches
wrote:
>
> This option (enabled by default) controls optimizations which convert
> a sequence of operations into an equivalent sequence that includes
> calls to builtin functions. Typical cases here are code which matches
> memcpy, cal
Hello,
Arm distribute pre-built versions of GCC that targets bare-metal Cortex-M
devices at
https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-rm
They offer a source release as well as pre-built binaries for Linux, macOS
and Windows.
The macOS ver
On Mon, Nov 1, 2021 at 10:40 PM HAO CHEN GUI wrote:
>
> David,
>
> My patch file was broken. I am sorry for it. Here is the correct one.
> Thanks a lot.
>
> ChangeLog
>
> 2021-11-01 Haochen Gui
>
> gcc/
> * config/rs6000/rs6000-call.c (rs6000_gimple_fold_builtin): Disable
>
This avoids ICEing with expanding a VIEW_CONVERT_EXRP of a SSA name
on the LHS by making sure we can native-interpret OFFSET_TYPE and
by never building such a LHS but instead view-converting the RHS
for SSA LHS.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
2021-11-02 Richard Bien
On Mon, 1 Nov 2021, Jiufu Guo wrote:
> PR101145 is supporting if the number of iterations can be calculated
> for the 'until wrap' condition. Current test cases are checking if
> the loop can be vectorized, if a loop can be vectorized then the number
> of interations is known. While it would be
On Mon, 1 Nov 2021, Jan Hubicka wrote:
> Hi,
> this is patchs teaches ipa-modref about the static chain that is, like
> retslot, a hiden argument. The patch is pretty much symemtric to what
> was done for retslot handling and I verified it does the intended job
> for Ada LTO bootstrap.
>
> Boots
On Mon, 1 Nov 2021, Tamar Christina wrote:
> Hi All,
>
> The complex FMS detection is missing a check on if the nodes of the VEC_PERM
> has the amount of children we expect before it recurses.
>
> This check is there on MUL and FMA but was missing for FMS, due to this the
> compiler goes on furt
Hi Manfred,
In addition to the patches of Steve Kargl for PR 91497:
The MIN1 and MAX1 intrinsics do explicit type conversions and should
be silenced too for -Wconversion and -Wconversion-extra.
Adjust testcase to only use *4 and *8 real types, provide a second
testcase for *10 and *16 precision
On Mon, Nov 1, 2021 at 2:03 PM Jeff Law via Gcc-patches
wrote:
>
>
>
> On 11/1/2021 3:54 AM, Aldy Hernandez wrote:
> > Chasing down stage3 miscomparisons is never fun, and having no way to
> > distinguish between jump threads registered by a particular
> > pass, is even harder. This patch adds de
Hi David,
Here is the new version of the patch.
I've moved the startup function in crtcdtors files.
I'm just wondering if the part dealing with the
__init_aix_libgcc_cxa_atexit is needed. I'm adding it because
the destructor created in crtcxa.o is following GCC format and
thus won't be launched i
On Mon, 1 Nov 2021, Tamar Christina wrote:
> Hi All,
>
> Some targets have overriden the default unroll factor and so do not have
> enough
> data to succeed for SLP vectorization if loop vect is turned off.
>
> To fix this just always unroll in these testcases.
Another option is to place
#pra
On Tue, Nov 2, 2021 at 2:27 PM Richard Biener
wrote:
>
> On Mon, Nov 1, 2021 at 2:03 PM Jeff Law via Gcc-patches
> wrote:
> >
> >
> >
> > On 11/1/2021 3:54 AM, Aldy Hernandez wrote:
> > > Chasing down stage3 miscomparisons is never fun, and having no way to
> > > distinguish between jump threads
On Mon, Nov 1, 2021 at 10:02 PM Bernhard Reutner-Fischer via
Gcc-patches wrote:
>
> On Mon, 1 Nov 2021 15:21:03 +0100
> Aldy Hernandez wrote:
>
> > I'm not convinced this makes the code clearer to read, especially if
> > it's not on a critical path. But if you feel strongly, please submit
> > a
On Mon, 1 Nov 2021, Jan Hubicka wrote:
> Hi,
> this patch adds EAF_NOT_RETURNED_DIRECTLY which works similarly as
> EAF_NODIRECTESCAPE. Values pointed to by a given argument may be returned but
> not the argument itself. This helps PTA quite noticeably because we mostly
> care about tracking poi
Hi All,
Here’s a respin of the patch.
The following example
void f5(float * restrict z0, float * restrict z1, float *restrict x,
float * restrict y, float c, int n)
{
for (int i = 0; i < n; i++) {
float a = x[i];
float b = y[i];
if (a > b) {
z0[i]
Hi All,
Following my current SVE predicate optimization series a problem has presented
itself in that the way vector masks are generated for masked operations relies
on CSE to share masks efficiently.
The issue however is that masking is done using the & operand and & is
associative and so reasso
Patch can bootstrap on x86_64-linux-gnu and survives regression tests.
Ready to be installed?
Thanks,
Martin
When doing flip based on -gtoggle, record it. Otherwise, we will
apply it for the second time in finish_options.
PR debug/102955
gcc/ChangeLog:
* common.opt: Add new gt
On Tue, Nov 2, 2021 at 2:36 PM Aldy Hernandez wrote:
>
> On Tue, Nov 2, 2021 at 2:27 PM Richard Biener
> wrote:
> >
> > On Mon, Nov 1, 2021 at 2:03 PM Jeff Law via Gcc-patches
> > wrote:
> > >
> > >
> > >
> > > On 11/1/2021 3:54 AM, Aldy Hernandez wrote:
> > > > Chasing down stage3 miscomparison
Am 02.11.21 um 14:26 schrieb Thomas Koenig:
> Hi Manfred,
>
>> In addition to the patches of Steve Kargl for PR 91497:
>> The MIN1 and MAX1 intrinsics do explicit type conversions and should
>> be silenced too for -Wconversion and -Wconversion-extra.
>>
>> Adjust testcase to only use *4 and *8 real
On Tue, 2 Nov 2021, Tamar Christina wrote:
> Hi All,
>
> Following my current SVE predicate optimization series a problem has presented
> itself in that the way vector masks are generated for masked operations relies
> on CSE to share masks efficiently.
>
> The issue however is that masking is d
On Tue, Nov 2, 2021 at 3:11 PM Martin Liška wrote:
>
> Patch can bootstrap on x86_64-linux-gnu and survives regression tests.
>
> Ready to be installed?
I think -gtoggle matches a Defered option and thus should be processed
in handle_common_deferred_options. I'd argue that --help printing should
> -Original Message-
> From: Richard Biener
> Sent: Tuesday, November 2, 2021 2:24 PM
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org; nd
> Subject: Re: [PATCH]middle-end Add an RPO pass after successful
> vectorization
>
> On Tue, 2 Nov 2021, Tamar Christina wrote:
>
> > Hi All,
>
On 11/2/21 2:51 AM, Martin Liška wrote:
On 11/2/21 00:56, Sandra Loosemore wrote:
I'll wait a couple days before committing these patches, in case
anybody wants to give some feedback, especially on technical issues.
Hello.
Appreciate the work you did, but the patchset will cause quite some
c
The tests require vector extensions which are only available for z13 and
later while using the z/Architecture.
Bootstrapped and regtested on IBM Z. Ok for mainline?
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/ldist-rawmemchr-1.c: For IBM Z set arch to z13
and use z/Architecture s
Ping.
On 24/08/2021 16:55, Hafiz Abid Qadeer wrote:
> Ping.
>
> On 22/07/2021 11:58, Hafiz Abid Qadeer wrote:
>> Ping.
>>
>> On 13/06/2021 14:27, Hafiz Abid Qadeer wrote:
>>> Add support for architectures such as AMD GCN, in which the pointer size is
>>> larger than the register size. This allow
Hi Maciej:
On Mon, Nov 1, 2021 at 8:41 PM Maciej W. Rozycki wrote:
>
> Fix a build regression from commit 04a9b554ba1a ("RISC-V: Cost model
> for zba extension."):
>
> .../gcc/config/riscv/riscv.c: In function 'bool riscv_rtx_costs(rtx,
> machine_mode, int, int, int*, bool)':
> .../gcc/config/ri
On 11/2/21 15:54, Stefan Schulze Frielinghaus wrote:
> The tests require vector extensions which are only available for z13 and
> later while using the z/Architecture.
>
> Bootstrapped and regtested on IBM Z. Ok for mainline?
>
> gcc/testsuite/ChangeLog:
>
> * gcc.dg/tree-ssa/ldist-rawmem
Tamar Christina writes:
> Hi All,
>
> Here’s a respin of the patch.
>
> The following example
>
> void f5(float * restrict z0, float * restrict z1, float *restrict x,
> float * restrict y, float c, int n)
> {
> for (int i = 0; i < n; i++) {
> float a = x[i];
> float b = y
On 11/2/21 15:33, Richard Biener wrote:
I think -gtoggle matches a Defered option and thus should be processed
in handle_common_deferred_options.
Well, that's quite problematic as I handle_common_deferred_options is called
after decode_options (that calls finish_options).
Note there's direct d
Fix the register class subset checks in the determination of the maximum
number of consecutive registers needed to hold a value of a given mode.
The number depends on whether a register is a general-purpose or a
floating-point register, so check whether the register class requested
is a subse
On 11/2/21 15:48, Sandra Loosemore wrote:
On 11/2/21 2:51 AM, Martin Liška wrote:
On 11/2/21 00:56, Sandra Loosemore wrote:
I'll wait a couple days before committing these patches, in case
anybody wants to give some feedback, especially on technical issues.
Hello.
Appreciate the work you did
On Tue, 2 Nov 2021, Tamar Christina wrote:
> > -Original Message-
> > From: Richard Biener
> > Sent: Tuesday, November 2, 2021 2:24 PM
> > To: Tamar Christina
> > Cc: gcc-patches@gcc.gnu.org; nd
> > Subject: Re: [PATCH]middle-end Add an RPO pass after successful
> > vectorization
> >
>
Hi Romain
> On 2 Nov 2021, at 13:09, Romain Goyet via Gcc-patches
> wrote:
> Arm distribute pre-built versions of GCC that targets bare-metal Cortex-M
> devices at
> https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-rm
> I have written a few sm
I was wandering spec chasing down instances where we should be
generating bit-test, bit-set and bit-clear types of instructions for our
target when I ran across a generic missed optimization in this space.
(((1 << N) & C) != 0) -> (N == C')
(((1 << N) & C) == 0) -> (N != C')
Where C is a
On 11/2/21 9:20 AM, Martin Liška wrote:
On 11/2/21 15:48, Sandra Loosemore wrote:
On 11/2/21 2:51 AM, Martin Liška wrote:
On 11/2/21 00:56, Sandra Loosemore wrote:
I'll wait a couple days before committing these patches, in case
anybody wants to give some feedback, especially on technical issu
Hi,
Here's a respin of the patch which I think encompasses the method you expected.
Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.
Ok for master?
Thanks,
Tamar
gcc/ChangeLog:
* tree-vect-stmts.c (vectorizable_condition): Check if inverse of mask
is live.
Fix a build regression from commit 04a9b554ba1a ("RISC-V: Cost model
for zba extension."):
.../gcc/config/riscv/riscv.c: In function 'bool riscv_rtx_costs(rtx,
machine_mode, int, int, int*, bool)':
.../gcc/config/riscv/riscv.c:2018:11: error: 'and' of mutually exclusive
equal-tests is always 0
Richard Biener writes:
> I don't think it reliably works the way you implement it. It's also having
> more side-effects than what you document, in particular
Yeah, I made a 'minimal' patch that had the effect I needed, but it's
clearly in the wrong place as it disables the matching of builtins
On 11/2/21 9:04 PM, Szabolcs Nagy wrote:
The 11/02/2021 00:06, Dan Li via Gcc-patches wrote:
Shadow Call Stack can be used to protect the return address of a
function at runtime, and clang already supports this feature[1].
To enable SCS in user mode, in addition to compiler, other support
is
On Fri, Oct 22, 2021 at 02:05:02PM +0100, Hafiz Abid Qadeer wrote:
> This patch adds support for OpenMP 5.0 allocate clause for fortran. It does
> not
> yet support the allocator-modifier as specified in OpenMP 5.1. The allocate
> clause is already supported in C/C++.
>
> gcc/fortran/ChangeLog:
>
On Wed, Nov 3, 2021 at 12:07 AM Maciej W. Rozycki wrote:
>
> Fix a build regression from commit 04a9b554ba1a ("RISC-V: Cost model
> for zba extension."):
>
> .../gcc/config/riscv/riscv.c: In function 'bool riscv_rtx_costs(rtx,
> machine_mode, int, int, int*, bool)':
> .../gcc/config/riscv/riscv.c
On Tue, Nov 2, 2021 at 4:11 PM Martin Liška wrote:
>
> On 11/2/21 15:33, Richard Biener wrote:
> > I think -gtoggle matches a Defered option and thus should be processed
> > in handle_common_deferred_options.
>
> Well, that's quite problematic as I handle_common_deferred_options is called
> after
Hi Maciej:
LGTM, My first impression of this patch is also confusing about the
ordering of arguments for reg_class_subset_p, but after I double
checked that with gdb and read the comment above the
reg_class_subset_p, I think this change is right.
Thanks!
On Tue, Nov 2, 2021 at 11:17 PM Maciej W
Richard Biener via Gcc-patches writes:
> On Tue, 2 Nov 2021, Tamar Christina wrote:
>
>> > -Original Message-
>> > From: Richard Biener
>> > Sent: Tuesday, November 2, 2021 2:24 PM
>> > To: Tamar Christina
>> > Cc: gcc-patches@gcc.gnu.org; nd
>> > Subject: Re: [PATCH]middle-end Add an R
On 11/1/21 11:32 PM, Eric Gallager wrote:
On Mon, Nov 1, 2021 at 6:18 PM Martin Sebor via Gcc-patches
wrote:
Patch 1 in the series detects a small subset of uses of pointers
made indeterminate by calls to deallocation functions like free
or C++ operator delete. To control the conditions the w
Tamar Christina writes:
> Hi,
>
> Here's a respin of the patch which I think encompasses the method you
> expected.
>
> Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.
>
> Ok for master?
>
> Thanks,
> Tamar
>
> gcc/ChangeLog:
>
> * tree-vect-stmts.c (vectorizable_condition):
On Mon, Nov 01, 2021 at 10:10:40PM +, Joseph Myers wrote:
> On Mon, 1 Nov 2021, Marek Polacek via Gcc-patches wrote:
>
> > + /* We've read a bidi char, update the current vector as necessary. */
> > + void on_char (kind k, bool ucn_p)
> > + {
> > +switch (k)
> > + {
> > + cas
Bootstrapped and regtested on IBM Z. Ok for mainline?
gcc/ChangeLog:
* config/s390/s390.c (s390_loop_unroll_adjust): In case of early
exit free bbs.
---
gcc/config/s390/s390.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/gcc/config/s390/s390.c b/gcc/co
PHI nodes in vectorizer loop versioning need to maintain the same
order of PHI arguments to not disturb SLP discovery. The following
adds an assertion and mitigation in case loop versioning breaks this
which happens more often after the recent reorg.
Bootstrapped and tested on x86_64-unknown-linu
On Tue, Nov 02, 2021 at 05:27:14PM +0100, Jakub Jelinek via Gcc-patches wrote:
> I'm not sure this is what the standard says, certainly C/C++ FE do this
> quite differently for combined/composite constructs.
> In particular, we first split the clauses to the individual leaf constructs
> in c_omp_sp
Richard Biener via Gcc-patches writes:
> On Mon, Nov 1, 2021 at 10:02 PM Bernhard Reutner-Fischer via
> Gcc-patches wrote:
>>
>> On Mon, 1 Nov 2021 15:21:03 +0100
>> Aldy Hernandez wrote:
>>
>> > I'm not convinced this makes the code clearer to read, especially if
>> > it's not on a critical pat
Here when determining the type of the FIELD_DECL for the by-value
capture of 'i' in the inner lambda, we incorrectly give it the
type const int instead of int since the effective initializer is
the proxy for the outer capture, and this proxy is const qualified
since the outer lambda is non-mutable.
On Tue, 2 Nov 2021, Richard Sandiford wrote:
> Richard Biener via Gcc-patches writes:
> > On Tue, 2 Nov 2021, Tamar Christina wrote:
> >
> >> > -Original Message-
> >> > From: Richard Biener
> >> > Sent: Tuesday, November 2, 2021 2:24 PM
> >> > To: Tamar Christina
> >> > Cc: gcc-patches
On 11/2/21 1:40 AM, Eric Gallager wrote:
On Mon, Nov 1, 2021 at 6:20 PM Martin Sebor via Gcc-patches
wrote:
Patch 2 in this series adds support for detecting the uses of
dangling pointers: those to auto objects that have gone out of
scope. Like patch 1, to minimize false positives this detect
On 02.11.21 15:22, Manfred Schwarb wrote:
Am 02.11.21 um 14:26 schrieb Thomas Koenig:
Hi Manfred,
In addition to the patches of Steve Kargl for PR 91497:
The MIN1 and MAX1 intrinsics do explicit type conversions and should
be silenced too for -Wconversion and -Wconversion-extra.
Adjust testca
Hi Richard,
> - Why do we rewrite the constant moves after reload into ldr_got_small_sidi
> and ldr_got_small_? Couldn't we just get the move patterns to
> output the sequence directly?
That's possible too, however it makes the movsi/di patterns more complex.
See version v4 below.
> - I thi
On 10/4/21 4:39 PM, Eric Gallager wrote:
On Mon, Oct 4, 2021 at 2:43 PM Martin Sebor via Gcc-patches
wrote:
While resolving the recent -Waddress enhancement request (PR
PR102103) I came across a 2007 problem report about GCC 4 having
stopped warning for using the address of inline functions in
Wilco Dijkstra writes:
> Hi Richard,
>
>> - Why do we rewrite the constant moves after reload into ldr_got_small_sidi
>> and ldr_got_small_? Couldn't we just get the move patterns to
>> output the sequence directly?
>
> That's possible too, however it makes the movsi/di patterns more complex.
On 11/2/21 11:18 AM, Marek Polacek via Gcc-patches wrote:
On Mon, Nov 01, 2021 at 10:10:40PM +, Joseph Myers wrote:
On Mon, 1 Nov 2021, Marek Polacek via Gcc-patches wrote:
+ /* We've read a bidi char, update the current vector as necessary. */
+ void on_char (kind k, bool ucn_p)
+ {
+
On 7/22/21 6:29 AM, Kito Cheng via Gcc-patches wrote:
Could you add a testcase? Otherwise LGTM.
Option: -O2 -mtune=thead-c906 -march=rv64gc -mabi=lp64
void foo(char *dst){
__builtin_memset(dst, 0, 15);
}
On Thu, Jul 22, 2021 at 8:53 PM Christoph Muellner via Gcc-patches
wrote:
This patch
On Tue, Nov 02, 2021 at 12:51:16PM -0600, Martin Sebor via Gcc-patches wrote:
> On 10/4/21 4:39 PM, Eric Gallager wrote:
> > On Mon, Oct 4, 2021 at 2:43 PM Martin Sebor via Gcc-patches
> > wrote:
> > >
> > > While resolving the recent -Waddress enhancement request (PR
> > > PR102103) I came acros
On 11/1/21 3:14 PM, David Malcolm via Gcc-patches wrote:
[Resending to get around mailing list size limit; see notes below]
This patch implements a new -Whomoglyph diagnostic, enabled by default.
Internally it implements the "skeleton" algorithm from:
http://www.unicode.org/reports/tr39/#Con
On Tue, Nov 02, 2021 at 01:20:03PM -0600, Martin Sebor wrote:
> On 11/2/21 11:18 AM, Marek Polacek via Gcc-patches wrote:
> > On Mon, Nov 01, 2021 at 10:10:40PM +, Joseph Myers wrote:
> > > On Mon, 1 Nov 2021, Marek Polacek via Gcc-patches wrote:
> > >
> > > > + /* We've read a bidi char, upd
On Tue, Nov 2, 2021 at 8:27 PM Vineet Gupta wrote:
>
> On 7/22/21 6:29 AM, Kito Cheng via Gcc-patches wrote:
> > Could you add a testcase? Otherwise LGTM.
> >
> > Option: -O2 -mtune=thead-c906 -march=rv64gc -mabi=lp64
> > void foo(char *dst){
> > __builtin_memset(dst, 0, 15);
> > }
> >
> > On
Hi Iain,
Thanks for your reply! However, what I'm referring to is a lot more simple
than that: I just want to build bare-metal binaries for Cortex-M devices
from a Darwin/arm64 host. Not to produce Mach-O binaries that can run on
Darwin/arm64.
Essentially, I just made the toolchain at
https://dev
On 11/2/21 1:09 PM, Christoph Müllner wrote:
Without overlap_op_by_pieces we get:
8e: 00053023sd zero,0(a0)
92: 00052423sw zero,8(a0)
96: 00051623sh zero,12(a0)
9a: 00050723sb zero,14(a0
Hi,
thanks for the helpful comments. The attached v2 addresses the following
points from them:
- Save the bias in loop_vinfo and set it once in vect_verify_loop_lens.
- Add code to handle the bias in vect_set_loop_controls_directly.
- Adjust costing.
- Add comments for the new len_load parame
Hi Romain,
> On 2 Nov 2021, at 20:12, Romain Goyet wrote:
>
> Thanks for your reply! However, what I'm referring to is a lot more simple
> than that: I just want to build bare-metal binaries for Cortex-M devices from
> a Darwin/arm64 host. Not to produce Mach-O binaries that can run on
> Dar
On Tue, Nov 2, 2021 at 8:56 AM Sandra Loosemore
wrote:
>
> ... I will hold off on that if it's going to cause problems.
>
> Thanks for taking on this task, Sandra. I'm not aware of the technical
issues around mark-up formatting and the transition that's happening, but I
hope nothing holds up a l
On Mon, Nov 01, 2021 at 05:15:03PM -0600, Martin Sebor wrote:
> On 10/11/21 9:17 AM, Marek Polacek via Gcc-patches wrote:
> > Any thoughts?
>
> I'm a little unsure. Clang just uses the replacement string
> as the text of the fix-it note as is, so it does nothing to
> help programmers make sure th
On Mon, 2021-11-01 at 12:36 -0400, Marek Polacek via Gcc-patches wrote:
> From a link below:
> "An issue was discovered in the Bidirectional Algorithm in the
> Unicode
> Specification through 14.0. It permits the visual reordering of
> characters via control sequences, which can be used to craft so
Before:
Wbidirectional-1.c: In function ‘main’:
Wbidirectional-1.c:6:43: warning: unpaired UTF-8 bidirectional character
detected [-Wbidirectional=]
6 | /* } if (isAdmin) begin admins only */
| ^
Wbidirectional-1.c:9:28: warni
This patch converts the bidi::vec to use a struct so that we can
capture location_t values for the bidirectional control characters,
and uses these to label sources ranges in the diagnostics.
The effect on the output can be seen in the new testcase.
gcc/testsuite/ChangeLog:
* c-c++-common
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