Thank you for your input.
I have made an update using grep's ERE. Please let me know if it is ok.
//Claudiu
>From 3f598e0fc9bc88c3f40f3e381c2955ab36e77ce0 Mon Sep 17 00:00:00 2001
From: Claudiu Zissulescu
Date: Wed, 21 Oct 2020 16:11:43 +0300
Subject: [PATCH] arc: Add --with-fpu support for ARC
On Tue, Jun 8, 2021 at 12:05 AM Segher Boessenkool
wrote:
>
> In theory we could have a split condition not inclusive of the insn
> condition in the past. That never was a good idea, the code does not do
> what a non-suspicious reader would think it does. But it leads to more
> serious problems
On Tue, Jun 8, 2021 at 4:10 AM Kewen.Lin via Gcc-patches
wrote:
>
> Hi Segher,
>
> on 2021/6/8 上午7:50, Segher Boessenkool wrote:
> > Hi!
> >
> > On Fri, Jun 04, 2021 at 10:57:51AM +0800, Kewen.Lin via Gcc-patches wrote:
> >> To find out those need fixing seems to be the critical part. It's
> >> n
On Tue, Jun 8, 2021 at 5:26 AM Trevor Saunders wrote:
>
> On Mon, Jun 07, 2021 at 02:34:26PM -0600, Martin Sebor wrote:
> > On 6/7/21 2:51 AM, Richard Biener wrote:
> > > On Thu, Jun 3, 2021 at 10:29 AM Trevor Saunders
> > > wrote:
> > > >
> > > > On Wed, Jun 02, 2021 at 10:04:03AM -0600, Martin
On Mon, Jun 7, 2021 at 9:20 PM Andrew MacLeod wrote:
>
> On 6/7/21 9:30 AM, Richard Biener via Gcc-patches wrote:
> > On Mon, Jun 7, 2021 at 12:10 PM Aldy Hernandez via Gcc-patches
> > wrote:
> >> The substitute_and_fold_engine which evrp uses is expecting symbolics
> >> from value_of_expr / valu
On Mon, 7 Jun 2021, Qing Zhao wrote:
> (Kees, can you answer one of Richard’s question below? On the reason to
> initialize padding of structures)
>
> Richard,
>
>
> On Jun 7, 2021, at 2:48 AM, Richard Biener
> mailto:rguent...@suse.de>> wrote:
>
> Meh - can you try using a mailer that does
On Mon, 7 Jun 2021, Qing Zhao wrote:
> Hi,
>
> > On Jun 7, 2021, at 2:53 AM, Richard Biener wrote:
> >
> >>
> >> To address the above suggestion:
> >>
> >> My study shows: the call to __builtin_clear_padding is expanded during
> >> gimplification phase.
> >> And there is no __bultin_clear_p
Pushed as obvious typo fix.
Martin
gcc/fortran/ChangeLog:
* intrinsic.texi: Fix typo.
* trans-expr.c (gfc_trans_pointer_assignment): Likewise.
gcc/ChangeLog:
* genautomata.c (create_automata): Fix typo.
libgfortran/ChangeLog:
* intrinsics/chmod.c (chmod_inter
On 6/7/21 11:26 PM, Bernhard Reutner-Fischer wrote:
On Mon, 7 Jun 2021 15:30:22 +0200
Martin Liška wrote:
Anyway, this is resolved as I use more appropriate directive:
https://splichal.eu/scripts/sphinx/gfortran/_build/html/intrinsic-procedures/access-checks-file-access-modes.html
ISTM there
Pushed as obvious.
Martin
gcc/ChangeLog:
* doc/invoke.texi: Document new param evrp-sparse-threshold.
---
gcc/doc/invoke.texi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 04048cd8332..6063e466c13 100644
--- a/gcc/doc/invoke.texi
Hi!
On x86 the test is using -mavx512f and so never reports the various
-Wpsabi notes/warnings, but on other targets it can.
Committed to trunk as obvious.
2021-06-08 Jakub Jelinek
PR target/100887
PR testsuite/100943
* gcc.dg/pr100887.c: Add -Wno-psabi -w to dg-optio
On Mon, 7 Jun 2021, Kees Cook wrote:
> On Mon, Jun 07, 2021 at 09:48:41AM +0200, Richard Biener wrote:
> > On Thu, 27 May 2021, Qing Zhao wrote:
> > > @@ -5001,6 +5185,17 @@ gimplify_init_constructor (tree *expr_p, gimple_seq
> > > *pre_p, gimple_seq *post_p,
> > > /* If a single access t
When vector lowering creates piecewise ops make sure to create
VECTOR_CSTs instead of CONSTRUCTORs when possible.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
gcc/
2021-06-07 Richard Biener
PR middle-end/100951
* tree-vect-generic.c (expand_vector_piecewise):
As discussed a long time ago on IRC, this improves (i.e. decreases by default)
the verbosity of make check-simd, gives more verbosity options, and finally
documents how the simd testsuite is used and how it works. In addition, after
PR98834 was resolved, remove the -fno-tree-vrp workaround.
Tes
libstdc++-v3/ChangeLog:
* testsuite/Makefile.am (check-simd): Remove -fno-tree-vrp flag
and associated warning.
* testsuite/Makefile.in: Regenerate.
Signed-off-by: Matthias Kretz
---
libstdc++-v3/testsuite/Makefile.am | 3 +--
libstdc++-v3/testsuite/Makefile.in | 3 +--
For most uses --quiet was too quiet while the default was too noisy. Now
the default output, if stdout is a tty, shows the last successful test
on the same line. With --percentage it adds a percentage at the start of
the line. --percentage is not default because it requires more resources
and mig
libstdc++-v3/ChangeLog:
* testsuite/experimental/simd/README.md: New file.
Signed-off-by: Matthias Kretz
---
.../testsuite/experimental/simd/README.md | 257 ++
1 file changed, 257 insertions(+)
create mode 100644 libstdc++-v3/testsuite/experimental/simd/README.md
Hi!
On 2019-01-12T23:21:23+0100, Tom de Vries wrote:
> Allow vector_length clauses to accept values larger than warp size.
> * testsuite/libgomp.oacc-c-c++-common/parallel-dims.c: Expect vector
> length 2097152 to be reduced to 1024 instead of 32.
> --- a/libgomp/testsuite/libgomp.o
Hi!
On 2019-01-15T11:13:51+0100, Tom de Vries wrote:
> this fixes an ICE when handling an assignment to a gang-level reduction
> variable.
>
> Committed to trunk.
> PR target/80547
Pushed "Revert PR80547 workaround in
'libgomp.oacc-c-c++-common/parallel-dims.c'" to master branch in commit
Hi!
On 2019-11-14T16:36:38+, Andrew Stubbs wrote:
> This patch adds some necessary bits to enable OpenACC testings for
> amdgcn offloading.
> --- a/libgomp/testsuite/lib/libgomp.exp
> +++ b/libgomp/testsuite/lib/libgomp.exp
> +# Return 1 if at least one AMD GCN board is present, and the AMD
Hi!
The depend(source) clause has NULL OMP_CLAUSE_DECL, it has just the
depend kind specified and no arguments. So copy_tree_body_r shouldn't
check TREE_CODE on it without checking it is non-NULL.
Tested on x86_64-linux, committed to trunk.
2021-06-08 Jakub Jelinek
PR c++/100957
Hi!
On 2017-10-16T10:49:45+0200, Tom de Vries wrote:
> this patch enables some openacc test-cases for non-nvidia devices.
Additionally, pushed "Don't require 'openacc_nvidia_accel_selected' in
additional 'libgomp.oacc-*/declare-*'" to master branch in commit
77f41a5c4e60a88533c90f0948b4dd24c9bb8
Hi!
On 2019-12-13T17:43:57+, Andrew Stubbs wrote:
> On 19/11/2019 12:21, Andrew Stubbs wrote:
>> This patch adds GCN special casing for most of the OpenACC libgomp tests
>> that require it. It also disables one testcase that explicitly uses CUDA.
>
> The patches aren't all that controversial,
on 2021/6/7 下午10:46, Richard Biener wrote:
> On Wed, Jun 2, 2021 at 11:29 AM Kewen.Lin wrote:
>>
>> Hi,
>>
>> As Richi suggested in PR100794, this patch is to remove
>> some unnecessary update_ssa calls with flag
>> TODO_update_ssa_only_virtuals, also do some refactoring.
>>
>> Bootstrapped/regtes
Hi!
Pushed "Add 'acc_device_radeon' testing to
'libgomp.oacc-*/acc_on_device-*'" to master branch in commit
97a040e987bfdc40d3bf442be74571a6819122cd, see attached.
Grüße
Thomas
-
Mentor Graphics (Deutschland) GmbH, Arnulfstrasse 201, 80634 München
Registergericht München HRB
Hi!
Pushed "Enhance 'libgomp.oacc-c-c++-common/firstprivate-1.c' for
non-'acc_device_nvidia'" to master branch in commit
292fb10bebf3c209f560d1590d2d70bf30b58018, see attached.
Grüße
Thomas
-
Mentor Graphics (Deutschland) GmbH, Arnulfstrasse 201, 80634 München
Registergericht
Hi!
On 2019-12-13T17:43:57+, Andrew Stubbs wrote:
> On 19/11/2019 12:21, Andrew Stubbs wrote:
>> This patch adds GCN special casing for most of the OpenACC libgomp tests
>> that require it.
>
> [...] I've gone ahead and committed the attached.
> * testsuite/libgomp.oacc-c-c++-common/ac
Hi!
On 2020-01-20T16:53:49+, Andrew Stubbs wrote:
> I've committed this testsuite-only patch to fix some test cases that
> need GCN-specific settings in order to pass.
> * testsuite/libgomp.oacc-c-c++-common/parallel-dims.c
> (acc_gang): Recognise acc_device_radeon.
> (acc_
Hi!
An old patch refreshed: pushed "Enable more 'libgomp.oacc-*/lib-*'
testcases for non-'openacc_nvidia_accel_selected'" to master branch in
commit c68ddd5e2a9dd0cfe21c3661404d7d4c323b23cf, see attached.
Grüße
Thomas
-
Mentor Graphics (Deutschland) GmbH, Arnulfstrasse 201, 80
Hi!
On 2019-11-12T13:29:15+, Andrew Stubbs wrote:
> This patch prevents the compiler using multiple workers in a gang.
Almost. The GCN back end fails to enforce this for the case of run-time
variable 'num_workers': that's 'dims[GOMP_DIM_WORKER] == 0', and the
current 'gcc/config/gcn/gcn.c:g
On Fri, 4 Jun 2021, Jiufu Guo wrote:
> Update the patch since v2:
> . Check index and bound from gcond before checking if wrap.
> . Update test case, and add an executable case.
> . Refine code comments.
> . Enhance the checking for i++/++i in the loop header.
> . Enhance code to handle equal cond
On Tue, 8 Jun 2021 10:05:28 +0300
Claudiu Zissulescu wrote:
> Thank you for your input.
>
> I have made an update using grep's ERE. Please let me know if it is ok.
I would have written [[:space:]]* instead of [[:space:]]+ to handle
potentially missing space, at least after the comma but also be
On Tue, Jun 8, 2021 at 11:31 AM Kewen.Lin wrote:
>
> on 2021/6/7 下午10:46, Richard Biener wrote:
> > On Wed, Jun 2, 2021 at 11:29 AM Kewen.Lin wrote:
> >>
> >> Hi,
> >>
> >> As Richi suggested in PR100794, this patch is to remove
> >> some unnecessary update_ssa calls with flag
> >> TODO_update_ss
On Tue, Jun 8, 2021 at 1:02 PM Richard Biener
wrote:
>
> On Tue, Jun 8, 2021 at 11:31 AM Kewen.Lin wrote:
> >
> > on 2021/6/7 下午10:46, Richard Biener wrote:
> > > On Wed, Jun 2, 2021 at 11:29 AM Kewen.Lin wrote:
> > >>
> > >> Hi,
> > >>
> > >> As Richi suggested in PR100794, this patch is to rem
Christophe Lyon writes:
> On Wed, 2 Jun 2021 at 20:19, Richard Sandiford
> wrote:
>>
>> Christophe Lyon writes:
>> > This patch adds support for auto-vectorization of average value
>> > computation using vhadd or vrhadd, for both MVE and Neon.
>> >
>> > The patch adds the needed [u]avg3_[floor|c
Christophe Lyon writes:
> This patch adds support for auto-vectorization of clz for MVE.
>
> It does so by removing the unspec from mve_vclzq_ and uses
> 'clz' instead. It moves to neon_vclz expander from neon.md to
> vec-common.md and renames it into the standard name clz2.
>
> 2021-06-03 Christ
The following patches mostly contain code cleanups and minor corrections. The
major feature in this patchset is the last patch, which should make the use of
stdx::simd much safer wrt. ODR violations involuntarily introduced by linking
TUs that were compiled with different -m and floating-point f
Christophe Lyon writes:
> This patch adds vec_unpack_hi_, vec_unpack_lo_,
> vec_pack_trunc_ patterns for MVE.
>
> It does so by moving the unpack patterns from neon.md to
> vec-common.md, while adding them support for MVE. The pack expander is
> derived from the Neon one (which in turn is renamed
From: Matthias Kretz
This also resolves a test failure on aarch64 with -ffast-math and
fixed_size with large N.
Signed-off-by: Matthias Kretz
libstdc++-v3/ChangeLog:
* include/experimental/bits/simd.h: Add missing operator~
overload for simd to __float_bitwise_operators.
From: Matthias Kretz
This helper type became unused at some point.
Signed-off-by: Matthias Kretz
libstdc++-v3/ChangeLog:
* include/experimental/bits/simd_fixed_size.h
(_AbisInSimdTuple): Removed.
---
.../experimental/bits/simd_fixed_size.h | 49 ---
1
From: Matthias Kretz
Sometimes fixed_size objects will get unnecessarily copied on the stack.
The simd implementation should never pass _SimdTuple by value to avoid
requiring the optimizer to see through these copies.
Signed-off-by: Matthias Kretz
libstdc++-v3/ChangeLog:
* include/e
From: Matthias Kretz
The __bit_cast function was a hack to achieve what __builtin_bit_cast
can do, therefore use __builtin_bit_cast if possible. However,
__builtin_bit_cast cannot be used to cast from/to fixed_size_simd, since
it isn't trivially copyable (in the language sense — in principle it
From: Matthias Kretz
fabs(int) returns double, this one didn't. This overload is not
specified in the Parallelism TS 2. Also remove the comment about labs
and llabs: it doesn't belong here.
Signed-off-by: Matthias Kretz
libstdc++-v3/ChangeLog:
* include/experimental/bits/simd_math.h
From: Matthias Kretz
Signed-off-by: Matthias Kretz
libstdc++-v3/ChangeLog:
* include/experimental/bits/simd_math.h: Undefine internal
macros after use.
(frexp): Move #if to a more sensible position and reformat
preceding code.
(logb): Call _SimdImpl::_
From: Matthias Kretz
This improves codegen of ldexp if AVX512VL is available.
Signed-off-by: Matthias Kretz
libstdc++-v3/ChangeLog:
* include/experimental/bits/simd_x86.h (_S_ldexp): The AVX512F
implementation doesn't require a _VecBltnBtmsk ABI tag, it
requires eith
From: Matthias Kretz
Signed-off-by: Matthias Kretz
libstdc++-v3/ChangeLog:
* include/experimental/bits/simd_x86.h (_S_trunc, _S_floor,
_S_ceil): Set bit 8 (_MM_FROUND_NO_EXC) on AVX and SSE4.1
roundp[sd] calls.
---
.../include/experimental/bits/simd_x86.h | 24 ++
From: Matthias Kretz
Signed-off-by: Matthias Kretz
libstdc++-v3/ChangeLog:
* include/experimental/bits/simd.h (__execute_on_index_sequence,
__execute_on_index_sequence_with_return,
__call_with_n_evaluations, __call_with_subscripts): Add flatten
attribute.
---
From: Matthias Kretz
Signed-off-by: Matthias Kretz
libstdc++-v3/ChangeLog:
* include/experimental/bits/simd_math.h
(_GLIBCXX_SIMD_MATH_CALL2_): Rename arg2_ to __arg2.
(_GLIBCXX_SIMD_MATH_CALL3_): Rename arg2_ to __arg2 and arg3_ to
__arg3.
---
libstdc++-v3/i
From: Matthias Kretz
Explicitly support use of the stdx::simd implementation in situations
where the user links TUs that were compiled with different -m flags. In
general, this is always a (quasi) ODR violation for inline functions
because at least codegen may differ in important ways. However,
On Tue, Jun 08, 2021 at 09:05:57AM +0200, Richard Biener wrote:
> On Tue, Jun 8, 2021 at 12:05 AM Segher Boessenkool
> wrote:
> >
> > In theory we could have a split condition not inclusive of the insn
> > condition in the past. That never was a good idea, the code does not do
> > what a non-susp
On Tue, Jun 08, 2021 at 09:08:56AM +0200, Richard Biener wrote:
> On Tue, Jun 8, 2021 at 4:10 AM Kewen.Lin via Gcc-patches
> wrote:
> > on 2021/6/8 上午7:50, Segher Boessenkool wrote:
> > > On Fri, Jun 04, 2021 at 10:57:51AM +0800, Kewen.Lin via Gcc-patches wrote:
> > >> To find out those need fixin
On 6/8/21 2:26 AM, Aldy Hernandez wrote:
On 6/7/21 9:20 PM, Andrew MacLeod wrote:
On 6/7/21 9:30 AM, Richard Biener via Gcc-patches wrote:
On Mon, Jun 7, 2021 at 12:10 PM Aldy Hernandez via Gcc-patches
wrote:
The substitute_and_fold_engine which evrp uses is expecting symbolics
from value_o
On 6/8/21 3:46 AM, Martin Liška wrote:
Pushed as obvious.
Martin
gcc/ChangeLog:
* doc/invoke.texi: Document new param evrp-sparse-threshold.
---
gcc/doc/invoke.texi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 04048cd8332..6063e466c1
On Tue, Jun 8, 2021 at 2:27 PM Segher Boessenkool
wrote:
>
> On Tue, Jun 08, 2021 at 09:05:57AM +0200, Richard Biener wrote:
> > On Tue, Jun 8, 2021 at 12:05 AM Segher Boessenkool
> > wrote:
> > >
> > > In theory we could have a split condition not inclusive of the insn
> > > condition in the pas
On Tue, Jun 8, 2021 at 2:32 PM Segher Boessenkool
wrote:
>
> On Tue, Jun 08, 2021 at 09:08:56AM +0200, Richard Biener wrote:
> > On Tue, Jun 8, 2021 at 4:10 AM Kewen.Lin via Gcc-patches
> > wrote:
> > > on 2021/6/8 上午7:50, Segher Boessenkool wrote:
> > > > On Fri, Jun 04, 2021 at 10:57:51AM +0800
This fixes a TODO noticed when adding vectorization of
BIT_INSERT_EXPRs and what's now useful for vectorization of
BB reductions.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
2021-06-08 Richard Biener
* tree-vectorizer.h (_slp_instance::root_stmt): Change to...
This PR shows that building an ao_ref from value-numbers is prone to
expose bogus contextual alias info to the oracle. The following makes
sure to construct ao_refs from SSA names available at the program point
only.
On the way it modifies the awkward valueize_refs[_1] API.
Bootstrapped and test
On Fri, May 28, 2021 at 3:48 AM Bernd Edlinger
wrote:
> Hi Richard,
>
> I've replicated your PR to make the objective-c checksum compare equal
>
> commit fb2647aaf55b453b37badfd40c14c59486a74584
> Author: Richard Biener
> Date: Tue May 3 08:14:27 2016 +
>
> Make-lang.in (cc1-checksum.c
We already have conditional noexcept so this just constrains the
non-member swap overload.
Signed-off-by: Jonathan Wakely
libstdc++-v3/ChangeLog:
* include/experimental/propagate_const (swap): Constrain.
* testsuite/experimental/propagate_const/swap/lwg3413.cc: New test.
Tested
Hello,
On Mon, 7 Jun 2021, Jeff Law wrote:
>
> So, as many of you know I left Red Hat a while ago and joined Tachyum. We're
> building a new processor and we've come across an issue where I think we need
> upstream discussion.
>
> I can't divulge many of the details right now, but one of the q
This is another minor patch for elimination of redundant test/compares
on the H8. In particular it allows the compiler to use the result of a
byte sized AND instruction to eliminate a compare/test. The only
"trick" here is we have to distinguish between BCLR which clears a bit,
but does not s
On 6/8/21 3:30 AM, Kewen.Lin wrote:
on 2021/6/7 下午10:46, Richard Biener wrote:
On Wed, Jun 2, 2021 at 11:29 AM Kewen.Lin wrote:
Hi,
As Richi suggested in PR100794, this patch is to remove
some unnecessary update_ssa calls with flag
TODO_update_ssa_only_virtuals, also do some refactoring.
Bo
On 6/8/21 3:26 AM, Richard Biener wrote:
On Mon, Jun 7, 2021 at 9:20 PM Andrew MacLeod wrote:
I don't think this is actually doing the propagation though... It tracks
that a_2 currently points to &foo.. and returns that to either
simplifier or folder thru value_of_expr(). Presumably it is up
On 6/8/2021 8:08 AM, Michael Matz wrote:
Hello,
On Mon, 7 Jun 2021, Jeff Law wrote:
So, as many of you know I left Red Hat a while ago and joined Tachyum. We're
building a new processor and we've come across an issue where I think we need
upstream discussion.
I can't divulge many of the d
On 6/2/21 3:29 AM, Richard Biener wrote:
On Tue, Jun 1, 2021 at 4:24 PM Andrew MacLeod wrote:
On 6/1/21 3:34 AM, Richard Biener wrote:
On Tue, Jun 1, 2021 at 3:38 AM Andrew MacLeod via Gcc-patches
wrote:
An ongoing issue is the the order we evaluate things in can affect
decisions along the
The 2 recent patches, plus the original abstraction patch can be simply
cherry picked for gcc 11.
I have applied the 3 patches to the current gcc 11 release, and it
bootstrapped with no regressions on x86_64-pc-linux-gnu.
Andrew
>From 58289b678064c4b4e1efeb806f78c42d86ae31a4 Mon Sep 17 00:
On Tue, Jun 08, 2021 at 08:47:26AM -0600, Jeff Law wrote:
> > Why is the machinery involving STACK_SLOT_ALIGNMENT and
> > spill_slot_alignment() (for spilling) or get_stack_local_alignment() (for
> > backing stack slots) not working for you? If everything is setup
> > correctly the input alignment
On 6/8/2021 12:56 AM, Richard Biener wrote:
On Mon, Jun 7, 2021 at 9:00 PM Jeff Law wrote:
So, as many of you know I left Red Hat a while ago and joined Tachyum.
We're building a new processor and we've come across an issue where I
think we need upstream discussion.
I can't divulge many of
Hi Bin,
Thank you for the reply, I have some questions, see below.
On 07/06/2021 12:28, Bin.Cheng wrote:
On Fri, Jun 4, 2021 at 12:35 AM Andre Vieira (lists) via Gcc-patches
wrote:
Hi Andre,
I didn't look into the details of the IV sharing RFC. It seems to me
costing outside uses is trying t
On Tue, Jun 8, 2021 at 7:56 AM Jakub Jelinek via Gcc-patches
wrote:
>
> On Tue, Jun 08, 2021 at 08:47:26AM -0600, Jeff Law wrote:
> > > Why is the machinery involving STACK_SLOT_ALIGNMENT and
> > > spill_slot_alignment() (for spilling) or get_stack_local_alignment() (for
> > > backing stack slots)
On Tue, Jun 08, 2021 at 02:48:11PM +0200, Richard Biener wrote:
> > So yeah, patch withdrawn. This on one hand is proof we do want to make
> > such a change, but on the other hand shows it needs more preparatory
> > steps.
>
> I wonder if it makes sense to provide ports a means to opt-in into
> t
On 6/8/2021 9:06 AM, H.J. Lu wrote:
On Tue, Jun 8, 2021 at 7:56 AM Jakub Jelinek via Gcc-patches
wrote:
On Tue, Jun 08, 2021 at 08:47:26AM -0600, Jeff Law wrote:
Why is the machinery involving STACK_SLOT_ALIGNMENT and
spill_slot_alignment() (for spilling) or get_stack_local_alignment() (for
On Jun 8, 2021, at 2:41 AM, Richard Biener
mailto:rguent...@suse.de>> wrote:
Which is also why I suggested to split out the padding initialization
bits to a separate patch (and option).
Personally, I am okay with splitting padding initialization from this current
patch,
Kees, what’s your op
On Tue, 8 Jun 2021 at 01:29, Thomas Rodgers wrote:
> This time without the repeatred [PR] in the subject line.
>
> Fixes libstdc++/100889
>
This should be part of the ChangeLog entry instead, preceded by PR so it
updates bugzilla, i.e.
> libstdc++-v3/ChangeLog:
>
PR libstdc++/100889
>
Using %p to move the address of a symbol using LEA:
asm ("lea %p1, %0" : "=r"(addr) : "m"(var));
emits assembler warning when VAR is declared in a non-generic address space:
Warning: segment override on `lea' is ineffectual
The problem is with %p operand modifier, which should emit raw symb
Segher Boessenkool writes:
> On Tue, Jun 08, 2021 at 02:48:11PM +0200, Richard Biener wrote:
>> > So yeah, patch withdrawn. This on one hand is proof we do want to make
>> > such a change, but on the other hand shows it needs more preparatory
>> > steps.
>>
>> I wonder if it makes sense to provi
Hello,
On Tue, 8 Jun 2021, Jeff Law wrote:
> On 6/8/2021 9:06 AM, H.J. Lu wrote:
> > On Tue, Jun 8, 2021 at 7:56 AM Jakub Jelinek via Gcc-patches
> > wrote:
> >> On Tue, Jun 08, 2021 at 08:47:26AM -0600, Jeff Law wrote:
> Why is the machinery involving STACK_SLOT_ALIGNMENT and
> spill_
On Tue, Jun 08, 2021 at 04:50:56PM +0100, Richard Sandiford wrote:
> Segher Boessenkool writes:
> > On Tue, Jun 08, 2021 at 02:48:11PM +0200, Richard Biener wrote:
> >> > So yeah, patch withdrawn. This on one hand is proof we do want to make
> >> > such a change, but on the other hand shows it ne
Segher Boessenkool writes:
> On Tue, Jun 08, 2021 at 04:50:56PM +0100, Richard Sandiford wrote:
>> Segher Boessenkool writes:
>> > On Tue, Jun 08, 2021 at 02:48:11PM +0200, Richard Biener wrote:
>> >> > So yeah, patch withdrawn. This on one hand is proof we do want to make
>> >> > such a change,
On Tue, Jun 08, 2021 at 09:37:30AM +0200, Richard Biener wrote:
> On Mon, 7 Jun 2021, Qing Zhao wrote:
> > On Jun 7, 2021, at 2:48 AM, Richard Biener
> > mailto:rguent...@suse.de>> wrote:
> >
> > Meh - can you try using a mailer that does proper quoting? It's difficult
> > to spot your added com
On Tue, Jun 08, 2021 at 09:41:38AM +0200, Richard Biener wrote:
> On Mon, 7 Jun 2021, Qing Zhao wrote:
>
> > Hi,
> >
> > > On Jun 7, 2021, at 2:53 AM, Richard Biener wrote:
> > >
> > >>
> > >> To address the above suggestion:
> > >>
> > >> My study shows: the call to __builtin_clear_padding
My PR969626 patch made us ignore template candidates when there's a perfect
non-template candidate. In this case, we were considering B(int) a perfect
match for B({0}), but the brace elision makes it imperfect.
Tested x86_64-pc-linux-gnu, applying to trunk.
PR c++/100963
gcc/cp/ChangeLo
Hi Chung-Lin!
;-) It's been a while:
On 2018-09-10T23:04:18+0800, Chung-Lin Tang wrote:
> * testsuite/libgomp.oacc-c-c++-common/lib-94.c: New test.
> * testsuite/libgomp.oacc-c-c++-common/lib-95.c: New test.
> * testsuite/libgomp.oacc-fortran/lib-16.f90: New test.
Do
Thanks a lot.
Kees.
Do you have the same issue with my emails?
I see this problem with my email mostly to part of the emails that were sent to
gcc-patches alias.
Other emails are fine.
> On Jun 8, 2021, at 11:56 AM, Kees Cook wrote:
>
> On Tue, Jun 08, 2021 at 09:37:30AM +0200, Richard Bi
On Tue, Jun 08, 2021 at 05:32:32PM +, Qing Zhao wrote:
> Thanks a lot.
>
> Kees.
>
> Do you have the same issue with my emails?
Some of them, yes. This one was fine.
> I see this problem with my email mostly to part of the emails that were sent
> to gcc-patches alias.
> Other emails are
1. Update vec_duplicate to allow to fail so that backend can only allow
broadcasting an integer constant to a vector when broadcast instruction
is available. This can be used by memset expander to avoid vec_duplicate
when loading from constant pool is more efficient.
2. Add vec_duplicate expander
1. Update move expanders to convert the CONST_WIDE_INT and CONST_VECTO
operands to vector broadcast from an integer with AVX2.
2. Add ix86_gen_scratch_sse_rtx to return a scratch SSE register which
won't increase stack alignment requirement and blocks transformation by
the combine pass.
3. Update P
1. Update move expanders to convert the CONST_WIDE_INT and CONST_VECTO
operands to vector broadcast from an integer with AVX2.
2. Add ix86_gen_scratch_sse_rtx to return a scratch SSE register which
won't increase stack alignment requirement and blocks transformation by
the combine pass.
3. Update P
> On Jun 8, 2021, at 11:59 AM, Kees Cook wrote:
>
> On Tue, Jun 08, 2021 at 09:41:38AM +0200, Richard Biener wrote:
>> On Mon, 7 Jun 2021, Qing Zhao wrote:
>>>
>>> Personally, I am okay with splitting padding initialization from this
>>> current patch,
>>> Kees, what’s your opinion on this? i
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c: New.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 165
1 file changed, 165 insertions(+)
create mode 100644 gcc/config/rs6000/rs6000-gen-builtins.c
diff --git a/gcc/config/rs6000/rs6000-gen-
Original patch series here:
https://gcc.gnu.org/pipermail/gcc-patches/2021-April/568840.html
Segher and others, thanks for reviewing the first chunk of patches
from this series! Some of the stylistic changes turn out to affect
many of the remaining patches, so in addition to addressing the
review
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (bif_file): New variable.
(ovld_file): Likewise.
(header_file): Likewise.
(init_file): Likewise.
(defines_file): Likewise.
(pgm_path): Likewise.
(bif_path): Likewise.
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (consume_whitespace): New
function.
(advance_line): Likewise.
(safe_inc_pos): Likewise.
(match_identifier): Likewise.
(match_integer): Likewise.
(match_to_right_bracket): L
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (void_status): New enum.
(basetype): Likewise.
(typeinfo): Likewise.
(handle_pointer): New function.
(match_basetype): New stub function.
(match_const_restriction): Likewise.
Currently gengtype supports scanning target-specific files for GC roots,
but those files must exist in the source tree. This patch extends the
support to include header files generated into the build directory. It
also allows targets to specify build dependencies for s-gtype to ensure
the built h
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (match_basetype): Implement.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 64 +
1 file changed, 64 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c
b/gcc/config/rs6000/rs6000
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (restriction): New enum.
(typeinfo): Add restr field.
(match_bracketed_pair): New function.
(match_const_restriction): Implement.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 115 +++
2021-06-08 Bill Schmidt
gcc/
* config/rs6000/rbtree.c: New file.
* config/rs6000/rbtree.h: New file.
---
gcc/config/rs6000/rbtree.c | 242 +
gcc/config/rs6000/rbtree.h | 52
2 files changed, 294 insertions(+)
create mode 100644 gcc
This patch adds a tiny subset of the built-in and overload descriptions.
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: New.
* config/rs6000/rs6000-overload.def: New.
---
gcc/config/rs6000/rs6000-builtin-new.def | 199 +++
gcc/config/r
2021-06-08 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (rbtree.h): New #include.
(num_bifs): New variable.
(num_ovld_stanzas): Likewise.
(num_ovlds): Likewise.
(parse_codes): New enum.
(bif_rbt): New variable.
(ovld_rbt): Likew
1 - 100 of 185 matches
Mail list logo
