Re: [PATCH v5 2/8] libstdc++ futex: Use FUTEX_CLOCK_REALTIME for wait

2020-11-12 Thread Jonathan Wakely via Gcc-patches
On 29/05/20 07:17 +0100, Mike Crowe via Libstdc++ wrote: The futex system call supports waiting for an absolute time if FUTEX_WAIT_BITSET is used rather than FUTEX_WAIT. Doing so provides two benefits: 1. The call to gettimeofday is not required in order to calculate a relative timeout. 2. I

Re: PowerPC: Use __float128 instead of __ieee128 in tests.

2020-11-12 Thread Segher Boessenkool
On Thu, Nov 12, 2020 at 04:44:09PM -0500, Michael Meissner wrote: > On Thu, Nov 12, 2020 at 01:26:32PM -0600, Segher Boessenkool wrote: > > On Thu, Oct 22, 2020 at 06:12:31PM -0400, Michael Meissner wrote: > > > Two of the tests used the __ieee128 keyword instead of __float128. This > > > patch ch

Re: [PATCH] C-Family, Objective-C : Implement Objective-C nullability Part 1 [PR90707].

2020-11-12 Thread Joseph Myers
On Thu, 12 Nov 2020, Iain Sandoe wrote: > OK for the C-family changes? OK. > +When @var{nullability kind} is @var{"unspecified"} or @var{0}, nothing is I think you mean @code or @samp for the second and third @var on this line, they look like literal code not metasyntactic variables. Likewise

[committed] libstdc++: Optimise std::future::wait_for and fix futex polling

2020-11-12 Thread Jonathan Wakely via Gcc-patches
To poll a std::future to see if it's ready you have to call one of the timed waiting functions. The most obvious way is wait_for(0s) but this was previously very inefficient because it would turn the relative timeout to an absolute one by calling system_clock::now(). When the relative timeout is ze

[PATCH] Change range_handler, was Re: Fix gimple_expr_code?

2020-11-12 Thread Andrew MacLeod via Gcc-patches
On 11/12/20 4:12 PM, Andrew MacLeod via Gcc-patches wrote: On 11/12/20 3:53 PM, Richard Biener wrote: ... 😬 But it means that gimple_expr_code() isn't returning the correct result for GIMPLE_SINGLE_RHS It depends. A SSA name isn't an expression code either. As said, the generic gimple_ex

Re: [PATCH] RISC-V: Enable ifunc if it was supported in the binutils for linux toolchain.

2020-11-12 Thread Nelson Chu
On Fri, Nov 13, 2020 at 5:50 AM Jim Wilson wrote: >I committed and pushed it. Thanks for your help!! > I see some extra ifunc related testsuite failures, but that is because we > don't have the glibc ifunc patches upstream yet. It will be important to get > those done next. Yeah, hope we can

Re: [PATCH,wwwdocs] gcc-11/changes: Mention Intel AVX-VNNI

2020-11-12 Thread Hongtao Liu via Gcc-patches
Got it. On Fri, Nov 13, 2020 at 3:26 AM Gerald Pfeifer wrote: > > On Wed, 11 Nov 2020, Hongtao Liu via Gcc-patches wrote: > > + New ISA extension support for Intel AVX-VNNI was added to GCC. > > More for the future (i.e., no need to change that now): I suggest > to skip "to GCC" in cases like th

Re: [committed] wwwdocs: Editorial changes around x86-64 ISA extensions

2020-11-12 Thread Hongtao Liu via Gcc-patches
On Fri, Nov 13, 2020 at 3:32 AM Gerald Pfeifer wrote: > > Per our discussion on the list (plus a grammer improvement in a > section above). > > One question: why are the ISA extension lists not alphabetically > sorted? Wouldn't that be beneficial for users? Easier to find > something and also ea

Ping^2: [PATCH 0/4] rs6000: Enable variable vec_insert with IFN VEC_SET

2020-11-12 Thread Xionghu Luo via Gcc-patches
Ping^2, thanks. On 2020/11/5 09:34, Xionghu Luo via Gcc-patches wrote: Ping. On 2020/10/10 16:08, Xionghu Luo wrote: Originated from https://gcc.gnu.org/pipermail/gcc-patches/2020-September/554240.html with patch split and some refinement per review comments. Patch of IFN VEC_SET for ARRAY_RE

Re: [PATCH][RFC] Make mingw-w64 printf/scanf attribute alias to ms_printf/ms_scanf only for C89

2020-11-12 Thread Liu Hao via Gcc-patches
在 2020/11/13 2:46, Joseph Myers 写道: > I'd expect these patches to include updates to the gcc.dg/format/ms_*.c > tests to reflect the changed semantics (or new tests there if some of the > changes don't result in any failures in the existing tests). > Does the attached patch suffice? I know ver

[committed] MAINTAINERS: add myself for write after approval

2020-11-12 Thread HAO CHEN GUI via Gcc-patches
2020-11-13  Haochen Gui      * MAINTAINERS (Write After Approval): add myself ---  MAINTAINERS | 1 +  1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index a0216185de9..be42e1441ca 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -409,6 +409,7 @@ Matthew Gretton-Dann  Yu

Re: [PATCH v2] c: Silently ignore pragma region [PR85487]

2020-11-12 Thread Jeff Law via Gcc-patches
On 9/2/20 6:59 PM, Austin Morton via Gcc-patches wrote: > #pragma region is a feature introduced by Microsoft in order to allow > manual grouping and folding of code within Visual Studio. It is > entirely ignored by the compiler. Clang has supported this feature > since 2012 when in MSVC compat

Re: [PATCH] [libiberty] Fix write buffer overflow in cplus_demangle

2020-11-12 Thread Jeff Law via Gcc-patches
On 11/29/19 12:15 PM, Tim Rühsen wrote: > * cplus-dem.c (ada_demangle): Correctly calculate the demangled > size by using two passes. So I'm not sure why, but I can't get this patch to apply.  What's even more interesting is ada_demangle doesn't seem to have changed since 2010 and even if I ch

[r11-4958 Regression] FAIL: 30_threads/future/members/poll.cc execution test on Linux/x86_64

2020-11-12 Thread sunil.k.pandey via Gcc-patches
On Linux/x86_64, 93fc47746815ea9dac413322fcade2931f757e7f is the first bad commit commit 93fc47746815ea9dac413322fcade2931f757e7f Author: Jonathan Wakely Date: Thu Nov 12 21:25:14 2020 + libstdc++: Optimise std::future::wait_for and fix futex polling caused FAIL: 30_threads/future/me

Re: [PATCH] Remove redundant builtins for avx512f scalar instructions.

2020-11-12 Thread Jeff Law via Gcc-patches
On 12/23/19 10:31 PM, Hongyu Wang wrote: > Hi: > For avx512f scalar instructions, current builtin function like > __builtin_ia32_*{sd,ss}_round can be replaced by > __builtin_ia32_*{sd,ss}_mask_round with mask parameter set to -1. This > patch did the replacement and remove the corresponding re

Re: [PATCH] Remove redundant builtins for avx512f scalar instructions.

2020-11-12 Thread Hongyu Wang via Gcc-patches
Hi Thanks for reminding me about this patch. I didn't remove any existing intrinsics, just remove redundant builtin functions that end-users would not likely to use. Also I'm OK to keep current implementation, in case there might be someone using the builtin directly. Jeff Law 于2020年11月13日周五 下午

Re: [PATCH] Support the new ("v0") mangling scheme in rust-demangle.

2020-11-12 Thread Nikhil Benesch via Gcc-patches
On 11/6/20 12:09 PM, Jeff Law wrote: So I think the best path forward is to let you and Eduard-Mihai make the technical decisions about what bits are ready for the trunk. When y'all think something is ready, let's go ahead and get it installed and iterate on things that aren't quite ready yet.

[PATCH v2] PR target/97682 - Fix to reuse t1 register between call address and epilogue.

2020-11-12 Thread Monk Chiang
- When expanding the call pattern, choose t1 register be a jump register. Epilogue also uses a t1 register to adjust Stack point. The call pattern and epilogue will initial t1 twice, if both are generated in the same function. The call pattern will emit 'la t1,symbol' and 'jalr t1'in

Re: [PATCH 2/2] loops: Invoke lim after successful loop interchange

2020-11-12 Thread Richard Biener
On Thu, 12 Nov 2020, Martin Jambor wrote: > Hi, > > On Wed, Nov 11 2020, Richard Biener wrote: > > On Mon, 9 Nov 2020, Martin Jambor wrote: > > > >> this patch modifies the loop invariant pass so that is can operate > >> only on a single requested loop and its sub-loops and ignore the rest > >> o

[PATCH 2/3] RISC-V: Support zicsr and zifencei extension for -march.

2020-11-12 Thread Kito Cheng
- CSR related instructions and fence instructions has to be splitted from baseline ISA, zicsr and zifencei are corresponding sub-extension. gcc/ChangeLog: * common/config/riscv/riscv-common.c (riscv_implied_info): d and f implied zicsr. (riscv_ext_flag_table): Handle z

[PATCH 1/3] RISC-V: Handle implied extension in canonical ordering.

2020-11-12 Thread Kito Cheng
- ISA spec has specify the order between multi-letter extensions, implied extension also need to follow store in canonical ordering, so most easy way is we keep that in-order during insertion. gcc/ChangeLog: * common/config/riscv/riscv-common.c (single_letter_subset_rank): New.

RISC-V: Support version controling for ISA standard extensions

2020-11-12 Thread Kito Cheng
Current GCC implementation is RISC-V ISA 2.2, this patch set implement v20190608 and v20191213, and also add option -misa-spec=[2.2|20190608|20191213] to change the default ISA spec version. There is one major incompatible That option will effect the default version of each sub-extension, for e

[PATCH 0/3] RISC-V: Support version controling for ISA standard extensions

2020-11-12 Thread Kito Cheng
Current GCC implementation is RISC-V ISA 2.2, this patch set implement v20190608 and v20191213, and also add option -misa-spec=[2.2|20190608|20191213] to change the default ISA spec version. There is one major incompatible That option will effect the default version of each sub-extension, for e

[PATCH 3/3] RISC-V: Support version controling for ISA standard extensions

2020-11-12 Thread Kito Cheng
- New option -misa-spec support: -misa-spec=[2.2|20190608|20191213] and corresponding configuration option --with-isa-spec. - Current default ISA spec set to 2.2, but we intend to bump this to 20191213 or later in next release. gcc/ChangeLog: * common/config/riscv/riscv-common.c

[PATCH 3/3] RISC-V: Support version controling for ISA standard extensions

2020-11-12 Thread Kito Cheng
- New option -misa-spec support: -misa-spec=[2.2|20190608|20191213] and corresponding configuration option --with-isa-spec. - Current default ISA spec set to 2.2, but we intend to bump this to 20191213 or later in next release. gcc/ChangeLog: * common/config/riscv/riscv-common.c

[PATCH 2/3] RISC-V: Support zicsr and zifencei extension for -march.

2020-11-12 Thread Kito Cheng
- CSR related instructions and fence instructions has to be splitted from baseline ISA, zicsr and zifencei are corresponding sub-extension. gcc/ChangeLog: * common/config/riscv/riscv-common.c (riscv_implied_info): d and f implied zicsr. (riscv_ext_flag_table): Handle z

[PATCH 1/3] RISC-V: Handle implied extension in canonical ordering.

2020-11-12 Thread Kito Cheng
- ISA spec has specify the order between multi-letter extensions, implied extension also need to follow store in canonical ordering, so most easy way is we keep that in-order during insertion. gcc/ChangeLog: * common/config/riscv/riscv-common.c (single_letter_subset_rank): New.

Re: [PATCH 3/3] RISC-V: Support version controling for ISA standard extensions

2020-11-12 Thread Kito Cheng via Gcc-patches
Oh I was dry-run but cc to gcc patches accidentally, but the patch set is right, it just sent twice the same patch set. On Fri, Nov 13, 2020 at 3:29 PM Kito Cheng wrote: > > - New option -misa-spec support: -misa-spec=[2.2|20190608|20191213] and >corresponding configuration option --with-i

Re: Compare field offsets in fold_const when checking addresses

2020-11-12 Thread Richard Biener
On Thu, 12 Nov 2020, Jan Hubicka wrote: > > On Thu, 12 Nov 2020, Jan Hubicka wrote: > > > > > Hi, > > > this is updated patch I am re-testing and plan to commit if it suceeds. > > > > > > * fold-const.c (operand_compare::operand_equal_p): Compare > > > offsets of fields in component_refs whe

Re: Improve handling of memory operands in ipa-icf 2/4

2020-11-12 Thread Richard Biener
On Thu, 12 Nov 2020, Jan Hubicka wrote: > Hi, > this is updated patch. It fixes the comparsion of bitfield where I now > check that they bitsizes and bitoffsets match (and OEP_ADDRESSOF is not > used for bitfield references). > I also noticed problem with dependence clique in ao_refs_may_alias th

Re: [2/3][vect] Add widening add, subtract vect patterns

2020-11-12 Thread Richard Biener
On Thu, 12 Nov 2020, Joel Hutton wrote: > Hi all, > > This patch adds widening add and widening subtract patterns to > tree-vect-patterns. I am missing documentation in md.texi for the new patterns. In particular I wonder why you need singed and unsigned variants for the add/subtract patterns.

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