Hi, this patch adds new option -march=cannonlake. Isasets defined in:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
gcc/
* config.gcc: Add -march=cannonlake.
* config/i386/driver-i386.c
Attachment got lost.
> -Original Message-
> From: Koval, Julia
> Sent: Wednesday, November 08, 2017 9:01 AM
> To: 'GCC Patches'
> Cc: 'Uros Bizjak' ; 'Kirill Yukhin'
>
> Subject: RE: [x86][patch] Add -march=cannonlake.
>
> Hi, this patch adds new option -march=cannonlake. Isasets defin
On Tue, 7 Nov 2017, Jason Merrill wrote:
> On Tue, Nov 7, 2017 at 3:14 AM, Richard Biener wrote:
> > On Mon, 6 Nov 2017, Jason Merrill wrote:
> >
> >> On Mon, Nov 6, 2017 at 10:37 AM, Marek Polacek wrote:
> >> > On Fri, Nov 03, 2017 at 12:19:05PM -0400, Jason Merrill wrote:
> >> >> On Fri, Nov 3
On Wed, 8 Nov 2017, Jakub Jelinek wrote:
> Hi!
>
> The upstream libubsan in the name of behaving more similarly between
> all the other sanitizers turned the library from a lightweight set of a few
> helper routines that print errors if something goes wrong into yet another
> library that overrid
On Sun, Nov 05, 2017 at 11:02:32AM +0100, Tom de Vries wrote:
> this removes a semicolon after "do {} while (0)" in several macro bodies in
> libsanitizer. This allows the macros to be used in if-then-elses without
> curly braces.
>
> Committed as obvious.
This is wrong, these files are copied di
On Wed, Nov 08, 2017 at 08:07:42AM +0100, Martin Liška wrote:
> diff --git a/gcc/gimplify.c b/gcc/gimplify.c
> index c4fd5038d92..9563d825a6a 100644
> --- a/gcc/gimplify.c
> +++ b/gcc/gimplify.c
> @@ -2223,7 +2223,8 @@ expand_FALLTHROUGH_r (gimple_stmt_iterator *gsi_p, bool
> *handled_ops_p,
>
> The issues fixed by the previous patch together with this one result
> in the testcase from the PR with -mtune=intel (for some reason with
> generic tuning we decide to perform the 256-bit load as 2 128-bit loads and
> don't merge that into 256-bit comparison operand, shall we change that?)
> to
On Wed, Nov 08, 2017 at 08:43:43AM +0100, Jakub Jelinek wrote:
> Hi!
>
> The upstream libubsan in the name of behaving more similarly between
> all the other sanitizers turned the library from a lightweight set of a few
> helper routines that print errors if something goes wrong into yet another
>
Hi,
this patch removes a semicolon after "do {} while (0)" in
ASM_OUTPUT_CASE_END. This allows the macro to be used in if-then-elses
without curly braces.
Build for mips target.
Committed as obvious.
Thanks,
- Tom
[mips] Remove semicolon after do {} while (0) in ASM_OUTPUT_CASE_END
2017-1
Hi,
this patch wraps ASM_OUTPUT_LABELREF in a "do {} while (0)".
Without, we can run into a dangling else, generating this kind of warning:
...
$ cat test.c
void bar (int);
int c;
#define barc\
if (c)\
bar (1);
Martin Sebor writes:
> I haven't done nearly a thorough review but the dtor followed by
> the placement new in the POLY_SET_COEFF() macro caught my eye so
> I thought I'd ask sooner rather than later. Given the macro
> definition:
>
> + The dummy comparison against a null C * is just a way of c
Richard Biener writes:
> On Wed, Oct 25, 2017 at 1:26 PM, Richard Sandiford
> wrote:
>> Richard Biener writes:
>>> On Tue, Oct 24, 2017 at 3:24 PM, Richard Sandiford
>>> wrote:
Richard Biener writes:
> On Tue, Oct 24, 2017 at 2:48 PM, Richard Sandiford
> wrote:
>> Richard Bie
There's more fallout from the -Wreturn-type patch:
Excess errors:
/vol/gcc/src/hg/trunk/local/gcc/testsuite/g++.old-deja/g++.brendan/asm-extn1.C:10:6:
warning: ISO C++ forbids declaration of 'main' with no type [-Wreturn-type]
Fixed as follows. While looking at the testcase, I noticed that ther
Hi,
A number of instructions are output in assembler form by
output_return_instruction () when compiling a function with the
cmse_nonsecure_entry attribute for Armv8-M Mainline with hardfloat float
ABI. However, the corresponding thumb2_cmse_entry_return insn pattern
does not account for all thes
Richard Sandiford writes:
> This patch adds a new "poly_int" class to represent polynomial integers
> of the form:
>
> C0 + C1*X1 + C2*X2 ... + Cn*Xn
>
> It also adds poly_int-based typedefs for offsets and sizes of various
> precisions. In these typedefs, the Ci coefficients are compile-time
>
The second dg-do command overrides the first one with the target selector.
Tested on x86_64-suse-linux, applied on the mainline as obvious.
2017-11-08 Eric Botcazou
* gcc.dg/strlenopt-33g.c: Remove duplicate dg-do command.
--
Eric BotcazouIndex: gcc.dg/strlenopt-33g.c
=
Hi Andre,
On 08/11/17 05:12, Andre McCurdy wrote:
The following commit added the FL_LPAE flag to FL_FOR_ARCH7VE, but
neglected to also add it to the armv7ve compatible cores defined in
arm-cores.def.
https://github.com/gcc-mirror/gcc/commit/af2d9b9e58e8be576c53d94f30c48c68146b0c98
The result i
Hi Tamar,
On 06/11/17 16:48, Tamar Christina wrote:
Hi All,
This patch does a small refactoring to arm_option_override to extract the
part that sets the global state variables so they can be changed without
changing other global field that we do not want to change after the
initial
configurat
On 11/07/2017 03:49 PM, Nathan Sidwell wrote:
> On 11/07/2017 05:53 AM, Martin Liška wrote:
>> Hello.
>>
>> This is slightly updated version from the previous. Various small issues
>> were fixed
>> and I update documentation in order to reflect the changes.
>
>> + gcov_write_unsigned (DECL_ARTIF
On 11/08/2017 09:37 AM, Marek Polacek wrote:
> On Wed, Nov 08, 2017 at 08:07:42AM +0100, Martin Liška wrote:
>> diff --git a/gcc/gimplify.c b/gcc/gimplify.c
>> index c4fd5038d92..9563d825a6a 100644
>> --- a/gcc/gimplify.c
>> +++ b/gcc/gimplify.c
>> @@ -2223,7 +2223,8 @@ expand_FALLTHROUGH_r (gimple
On Wed, Nov 08, 2017 at 12:17:29PM +0100, Martin Liška wrote:
> On 11/08/2017 09:37 AM, Marek Polacek wrote:
> > On Wed, Nov 08, 2017 at 08:07:42AM +0100, Martin Liška wrote:
> >> diff --git a/gcc/gimplify.c b/gcc/gimplify.c
> >> index c4fd5038d92..9563d825a6a 100644
> >> --- a/gcc/gimplify.c
> >>
Hi.
Simple patch needed after Honza's changes.
Martin
gcc/testsuite/ChangeLog:
2017-11-08 Martin Liska
* gcc.dg/tree-ssa/vrp101.c: Update expected pattern as
frequencies are not longer printed in dump output.
---
gcc/testsuite/gcc.dg/tree-ssa/vrp101.c | 2 +-
1 file changed
On Wed, Nov 8, 2017 at 10:39 AM, Richard Sandiford
wrote:
> Richard Biener writes:
>> On Wed, Oct 25, 2017 at 1:26 PM, Richard Sandiford
>> wrote:
>>> Richard Biener writes:
On Tue, Oct 24, 2017 at 3:24 PM, Richard Sandiford
wrote:
> Richard Biener writes:
>> On Tue, Oct 24,
On Tue, Nov 7, 2017 at 1:44 PM, Bin.Cheng wrote:
> On Tue, Nov 7, 2017 at 12:23 PM, Richard Biener
> wrote:
>> On Tue, Nov 7, 2017 at 1:17 PM, Bin.Cheng wrote:
>>> On Tue, Nov 7, 2017 at 10:44 AM, Richard Biener
>>> wrote:
On Fri, Nov 3, 2017 at 1:35 PM, Bin Cheng wrote:
> Hi,
> T
On Wed, Nov 8, 2017 at 12:27 AM, Steve Kargl
wrote:
> On Tue, Nov 07, 2017 at 10:38:43PM +0200, Janne Blomqvist wrote:
>> On Tue, Nov 7, 2017 at 10:06 PM, Steve Kargl
>> wrote:
>> > On Tue, Nov 07, 2017 at 08:26:15PM +0200, Janne Blomqvist wrote:
>> >> +
>> >> + logical_type_node = gfc_get_logic
On Wed, Nov 8, 2017 at 11:55 AM, Richard Biener
wrote:
> On Tue, Nov 7, 2017 at 1:44 PM, Bin.Cheng wrote:
>> On Tue, Nov 7, 2017 at 12:23 PM, Richard Biener
>> wrote:
>>> On Tue, Nov 7, 2017 at 1:17 PM, Bin.Cheng wrote:
On Tue, Nov 7, 2017 at 10:44 AM, Richard Biener
wrote:
> On
Hi, this patch enables VAESDEC instruction from VAES isaset, defined here:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
Thanks,
Julia
gcc/
* config.gcc: Add vaesintrin.h.
* config/i386
Hi, this patch enables VAESDECLAST instruction from VAES isaset, defined here:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
Thanks,
Julia
gcc/
* config/i386/i386-builtin.def (__builtin_ia32_va
Patch attached.
> -Original Message-
> From: Koval, Julia
> Sent: Wednesday, November 08, 2017 1:38 PM
> To: 'GCC Patches'
> Cc: 'Kirill Yukhin'
> Subject: [PATCH][i386,AVX] Enable VAES support [3/5]
>
> Hi, this patch enables VAESDECLAST instruction from VAES isaset, defined here:
> ht
Hi, this patch enables VAESENC instruction from VAES isaset, defined here:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
Thanks,
Julia
gcc/
* config/i386/i386-builtin.def (__builtin_ia32_vaesen
Hi, this patch enables VAESENC instruction from VAES isaset, defined here:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
Thanks,
Julia
gcc/
* config/i386/i386-builtin.def (__builtin_ia32_vaesen
On Tue, Nov 07, 2017 at 02:03:19PM -0700, Jeff Law wrote:
> So this is the first step in pulling apart tree-vrp.c. As outlined in
> an earlier message the goal of this patch is just to get the vr_values
> class introduced. I've tried (and mostly succeeded) in avoiding doing
> significant cleanups
On 11/08/2017 09:16 AM, Jakub Jelinek wrote:
On Sun, Nov 05, 2017 at 11:02:32AM +0100, Tom de Vries wrote:
this removes a semicolon after "do {} while (0)" in several macro bodies in
libsanitizer. This allows the macros to be used in if-then-elses without
curly braces.
Committed as obvious.
T
PowerPC ISA 3.0 does not have a byte-reverse instruction that operates on the
GPRs, but it does have vector byte swap half-word, word, double-word operations
in the VSX registers. The enclosed patch enables generation of the byte
revseral instructions for register-register operations. It still pr
Inside GNATprove, inlining may cause use-clauses to be added in contexts
where the entities are already visible. Do not emit warnings about unused
use-clauses in these contexts, similar to what is done for instances of
generics.
There is no test as only GNATprove is impacted.
Tested on x86_64-pc-
This patch suppresses warnings concerning potential access-before-elaboration
issues when the warnings originate from finalization actions performed within
an initialization context. Such warnings seem confusing to users because they
are not directly related to source code, but to byproducts of the
Installed as obvious.
Andreas.
* c-c++-common/torture/aarch64-vect-lane-2.c (search_line_fast):
Change type to void.
---
gcc/testsuite/c-c++-common/torture/aarch64-vect-lane-2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/testsuite/c-c++-common/tortur
Hi Mike,
On Wed, Nov 08, 2017 at 08:14:31AM -0500, Michael Meissner wrote:
> PowerPC ISA 3.0 does not have a byte-reverse instruction that operates on the
> GPRs, but it does have vector byte swap half-word, word, double-word
> operations
> in the VSX registers. The enclosed patch enables genera
This patch reimplements the handling of variable references by the access-
before-elaboration mechanism for the purpose of SPARK elaboration checks.
Prior to the patch, variable references (N_Expanded_Name and N_Identifier)
were detected and processed as is, however such references might be folded,
From: Andi Kleen
This patch adds a -mforce-indirect-call option to force all calls
or tail calls on x86_64 between functions to indirect. This is similar to the
large code model, but doesn't affect jumps inside functions, so has much
less run time overhead.
This is useful with Intel Processor Tr
On 11/08/2017 06:03 AM, Martin Liška wrote:
On 11/07/2017 03:49 PM, Nathan Sidwell wrote:
On 11/07/2017 05:53 AM, Martin Liška wrote:
Hello.
This is slightly updated version from the previous. Various small issues were
fixed
and I update documentation in order to reflect the changes.
+ gc
This mixture of target-specific and target-independent patches adds
support for SVE LD[234] and ST[234]. The main difference from
Advanced SIMD is that SVE uses an extended vector mode for the
array of vectors, instead of the integer modes used by Advanced SIMD.
Tested on aarch64-linux-gnu (witho
So far we've used integer modes for LD[234] and ST[234] arrays.
That doesn't scale well to SVE, since the sizes aren't fixed at
compile time (and even if they were, we wouldn't want integers
to be so wide).
This patch lets the target use double-, triple- and quadruple-length
vectors instead.
201
On Mon, 6 Nov 2017, Jakub Jelinek wrote:
> Hi!
>
> The following patch contains 2 changes:
> 1) BIT_NOT_EXPR on a load from memory is handled, including when one
>or both BIT_{AND,IOR,XOR}_EXPR operands is BIT_NOT_EXPR of a memory load
> 2) it changes the aliasing handling, because the old
>
This patch adds support for SVE LD[234], ST[234] and associated
structure modes. Unlike Advanced SIMD, these modes are extra-long
vector modes instead of integer modes.
2017-11-08 Richard Sandiford
Alan Hayward
David Sherwood
gcc/
* config/aarch64/aarch64-
Supporting load/store lanes for variable-length vectors means that
we use them instead of SLP (for which we can't yet handle external
and constant definitions -- fixed by a later patch). Previously
we'd fail to use load/store lanes too and fall back to 128-bit
vectorisation.
2017-11-08 Richard
This patch adds tests for the SVE structure mode move patterns
and for LD[234] and ST[234] vectorisation.
2017-11-08 Richard Sandiford
Alan Hayward
David Sherwood
gcc/testsuite/
* gcc.target/aarch64/sve_struct_move_1.c: New test.
* gcc.target/aarch6
Compiler rejects an overriding indicator on a Finalize subprogram
for a derived type D when the parent type P is a derivation of a
private type whose full view is controlled, and the ultimate parent
of P has a visible primitive Finalize.
Tested on x86_64-pc-linux-gnu, committed on trunk
gcc/ada/
This patch improves the performance of the new ABE mechanism by eliminating
multiple traversals of the same subprogram body by memoizing all the nested
scenarios found within.
Tested on x86_64-pc-linux-gnu, committed on trunk
2017-11-08 Hristian Kirtchev
* einfo.adb: Elist36 is now us
GNATprove relied on frontend writing cross-references data into the ALI
files to synthesize Global contracts. Now this is done by the GNATprove
itself. This patch deconstructs the frontend code, that is no longer needed.
No test, as only dead code removed.
Tested on x86_64-pc-linux-gnu, committed
This patch corrects the expansion of Unchecked_Deallocation calls to operate
with the available view of the designated type. This ensures that if the type
is visible through a limited with clause, the expansion properly detects the
case where the designated type requires finalization actions.
On Mon, 6 Nov 2017, Jakub Jelinek wrote:
> Hi!
>
> As mentioned earlier, the !has_single_use checks disable store merging
> in many cases, it is enough to have a single multiple-use somewhere and
> all of sudden we break the group.
>
> The following patch replaces it by heuristics, it is GIMPLE
GNATprove never collects cross-references to empty entities. Removed code
most likely became dead at some point and this was not noticed. No test,
as the removed code was only executed as part of GNATprove and its behaviour
appears not affected.
Tested on x86_64-pc-linux-gnu, committed on trunk
2
On Wed, Nov 08, 2017 at 04:20:15PM +0100, Richard Biener wrote:
> Can't you simply use
>
>unsigned ret = 0;
>FOR_EACH_SSA_TREE_OPERAND (op, stmt, iter, SSA_OP_USE)
> if (!has_single_use (op))
>++ret;
>return ret;
>
> ? Not sure if the bit_not_p handling is required.
Con
Part of deconstructing SPARK cross-references, which are used to synthesize
Global contracts for code annotated with SPARK_Mode => Off.
Data like line and column numbers was only needed to make the xrefs in the
ALI file more readable. Now that the xrefs are not written to the ALI file
at all, ther
GNATprove now picks frontend cross-references directly from memory and
not from an ALI file), so there is no need to convert them to strings;
it is cleaner and more efficient to store them as Entity_Ids. No test
provided, because the behaviour is not affected.
Tested on x86_64-pc-linux-gnu, commit
This patch corrects an issue whereby the use of a class-wide type's primitive
did not lead to its base type being recognized as effective - causing to
spurious use_clause warnings. Additionally, class-wide types used as generic
actuals were not checked in certain cases due to not being flagged as
p
This patch adds a categorization check on a generic subprogram body, so
that the compiler can reject a generic subprogram marked Pure if its body
depends on an impure unit.
Compiling gf.adb must yield:
gf.adb:2:06: cannot depend on "Impure" (wrong categorization)
gf.adb:2:06: pure unit cann
While traversing the AST to collect SPARK cross-references (which are used
to synthesize Global contracts for code with SPARK_Mode => Off), we always
traverse body stubs. There is no need to configure this by a parameter.
The modified code is only executed as part of GNATprove. Behaviour unchanged
On 11/08/2017 12:13 AM, Martin Liška wrote:
> Hello.
>
> Assert removal is logical as it's used in iteration and if sbitmap is empty,
> iteration
> macro will not touch any element of a bitmap.
>
> Ready after it survives regression tests?
>
> Thanks,
> Martin
>
> gcc/ChangeLog:
>
> 2017-11-0
Human-readable file and unit names in SPARK cross-references were only
needed to make the ALI file human-redable. They are now removed (but can
be added to the debug routine dspark if needed).
Modified code is only executed as part of GNATprove, so no impact on the
frontend. Behaviour unaffected,
Hi!
Here is an attempt to fix these two PRs. The C++ FE already has an LVAL
bool that it propagates through constexpr.c functions, or in
cp-gimplify.c through calling cp_fold_{maybe_,}rvalue where appropriate.
The C c_fully_fold was instead just calling decl_constant_value_for_optimization
in som
On 11/02/2017 07:15 AM, Martin Liška wrote:
> PING^1
I don't see an updated patch in this thread? THe last message I see is
this one where you indicate you're going to tweak the patch and re-test.
Jeff
>
> On 10/19/2017 01:36 PM, Martin Liška wrote:
>> On 09/20/2017 10:15 AM, Jakub Jelinek wrot
This patch adds support for vectorising groups of IFN_MASK_LOADs
and IFN_MASK_STOREs using conditional load/store-lanes instructions.
This requires new internal functions to represent the result
(IFN_MASK_{LOAD,STORE}_LANES), as well as associated optabs.
The normal IFN_{LOAD,STORE}_LANES function
On Wed, Nov 08, 2017 at 05:22:45PM +0100, Jakub Jelinek wrote:
> Hi!
>
> Here is an attempt to fix these two PRs. The C++ FE already has an LVAL
Nice!
> bool that it propagates through constexpr.c functions, or in
> cp-gimplify.c through calling cp_fold_{maybe_,}rvalue where appropriate.
> The
This patch updates the implementation of Ada2020 delta aggregates, so they
can be used in the context of a private extension of a record type.
Tested on x86_64-pc-linux-gnu, committed on trunk
gcc/ada/
2017-11-08 Ed Schonberg
* sem_ch4.adb (Analyze_Aggregate): For Ada2020 delta aggre
On 11/08/2017 02:32 AM, Richard Sandiford wrote:
Martin Sebor writes:
I haven't done nearly a thorough review but the dtor followed by
the placement new in the POLY_SET_COEFF() macro caught my eye so
I thought I'd ask sooner rather than later. Given the macro
definition:
+ The dummy compari
We had:
if (vec_outside_cost <= 0)
min_profitable_iters = 0;
else
{
min_profitable_iters = ((vec_outside_cost - scalar_outside_cost)
* assumed_vf
- vec_inside_cost * peel_iters_prologue
Martin Sebor writes:
> On 11/08/2017 02:32 AM, Richard Sandiford wrote:
>> Martin Sebor writes:
>>> I haven't done nearly a thorough review but the dtor followed by
>>> the placement new in the POLY_SET_COEFF() macro caught my eye so
>>> I thought I'd ask sooner rather than later. Given the macr
The compiler was incorrectly generating an unconditional raise of
Program_Error (and associated warnings) for returning a component with an
anonymous access type within a function of a generic instance. The code
that was performing this check was intended to apply only to anonymous
access discrimi
Ping...
for the C++ part of this patch:
https://gcc.gnu.org/ml/gcc-patches/2017-10/msg00559.html
Thanks
Bernd.
> On 10/10/17 00:30, Bernd Edlinger wrote:
>> On 10/09/17 20:34, Martin Sebor wrote:
>>> On 10/09/2017 11:50 AM, Bernd Edlinger wrote:
On 10/09/17 18:44, Martin Sebor wrote:
The following patch creates a new insn type to annotate quad precision
multiply instructions, updates the appropriate insns to use the new type
and creates an entry in the Power9 machine description which describes
the correct latency/resources. Bootstrap/regtest on powerpc64le-linux
with no new r
On Wed, Nov 08, 2017 at 05:42:07PM +0100, Marek Polacek wrote:
> > Not sure about the COND_EXPR/VEC_COND_EXPR cases, right now I'm passing
> > false as LVAL for the first operand (condition) and lval as LVAL for the
> > other two (i.e. if called with lval == true on the whole *_COND_EXPR
> > decl_c
On Wed, 8 Nov 2017, Jakub Jelinek wrote:
> of course only if LVAL is false. Additionally, I've added folding of
> "foo"[2] into 'o'. We have it in gimple-fold.c or so, so that one
Note that if the 2 there comes from an overflowing expression that's not
valid as an extension to constant express
On 10/31/2017 05:29 AM, Tsimbalist, Igor V wrote:
> The revised patch is attached. The differences are in what options are
> defined and propagated to Makefile for CET enabling, also needed asm files
> are updated.
>
[ ... ]
>
> 0007-Enable-building-libgcc-with-CET-options.patch
>
>
> From d
On 10/31/2017 05:47 AM, Tsimbalist, Igor V wrote:
> The revised patch is attached. The differences are in what options are
> defined and propagated to Makefile for CET enabling. -iclude option is
> dropped, each needed asm file is processed separately.
>
> Igor
>
>
[ ... ]
>
>
> From d41da
On 10/31/2017 05:54 AM, Tsimbalist, Igor V wrote:
> The revised patch is attached. The differences are in what options are
> defined and propagated to Makefile for CET enabling.
>
> Ok for trunk?
>
> Igor
>
>
>> -Original Message-
>> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patc
On 10/31/2017 05:58 AM, Tsimbalist, Igor V wrote:
> The revised patch is attached. The differences are in what options are
> defined and propagated to Makefile for CET enabling.
>
> Ok for trunk?
>
> Igor
>
>
>> -Original Message-
>> From: Jeff Law [mailto:l...@redhat.com]
>> Sent: We
On 10/31/2017 06:00 AM, Tsimbalist, Igor V wrote:
> The revised patch is attached. The differences are in what options are
> defined and propagated to Makefile for CET enabling.
>
> Ok for trunk?
>
> Igor
>
>
>> -Original Message-
>> From: Jeff Law [mailto:l...@redhat.com]
>> Sent: We
Hi Pat,
On Wed, Nov 08, 2017 at 10:59:23AM -0600, Pat Haugen wrote:
> The following patch creates a new insn type to annotate quad precision
> multiply instructions, updates the appropriate insns to use the new type
> and creates an entry in the Power9 machine description which describes
> the co
On 10/31/2017 06:10 AM, Tsimbalist, Igor V wrote:
> The revised patch is attached. The differences are in what options are
> defined and propagated to Makefile for CET enabling.
>
> Ok for trunk?
>
> Igor
>
>
>> -Original Message-
>> From: Jeff Law [mailto:l...@redhat.com]
>> Sent: We
This patch corrects the light expansion of object renamings for SPARK to
prevent a crash by querying the subtype mark when the renaming carries an
access definition.
-
-- Sources --
-
-- p.ads
package P with SPARK_Mode is
type T is record
Ptr : access constant I
This patch adds an informational warning to alert the user to the fact that
GNAT currently mishandles coextensions and that they will not be finalized or
deallocated with their respective owners in some as they should according
to RM 13.11.2 (9/3).
-- Source --
-- types
This patch updates the implementation of Ada2020 delta aggregatesa to
conform to the latest version of AI12-0127. this patch adds checks to
reject statically delta aggregates that specify values for components
that appear in different variants of a record type.
Compiling test2.adb in Ada2020 mode
On 10/31/2017 06:12 AM, Tsimbalist, Igor V wrote:
> The revised patch is attached. The differences are in what options are
> defined and propagated to Makefile for CET enabling.
>
> Ok for trunk?
>
> Igor
>
>
>> -Original Message-
>> From: Jeff Law [mailto:l...@redhat.com]
>> Sent: We
On 11/08/2017 09:51 AM, Richard Sandiford wrote:
Martin Sebor writes:
On 11/08/2017 02:32 AM, Richard Sandiford wrote:
Martin Sebor writes:
I haven't done nearly a thorough review but the dtor followed by
the placement new in the POLY_SET_COEFF() macro caught my eye so
I thought I'd ask soon
On 11/08/2017 09:51 AM, Richard Sandiford wrote:
Martin Sebor writes:
On 11/08/2017 02:32 AM, Richard Sandiford wrote:
Martin Sebor writes:
I haven't done nearly a thorough review but the dtor followed by
the placement new in the POLY_SET_COEFF() macro caught my eye so
I thought I'd ask soon
On 10/31/2017 06:13 AM, Tsimbalist, Igor V wrote:
> The revised patch is attached. The differences are in what options are
> defined and propagated to Makefile for CET enabling.
>
> Ok for trunk?
>
> Igor
>
>
>> -Original Message-
>> From: Jeff Law [mailto:l...@redhat.com]
>> Sent: We
On 10/31/2017 06:16 AM, Tsimbalist, Igor V wrote:
> The revised patch is attached. The differences are in what options are
> defined and propagated to Makefile for CET enabling.
>
> Ok for trunk?
>
> Igor
>
>
>> -Original Message-
>> From: Jeff Law [mailto:l...@redhat.com]
>> Sent: We
On 10/31/2017 06:15 AM, Tsimbalist, Igor V wrote:
> The revised patch is attached. The differences are in what options are
> defined and propagated to Makefile for CET enabling.
>
> Ok for trunk?
>
> Igor
>
>
>> -Original Message-
>> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-pat
On 10/31/2017 06:18 AM, Tsimbalist, Igor V wrote:
> The revised patch is attached. The differences are in what options are
> defined and propagated to Makefile for CET enabling.
>
> Ok for trunk?
>
> Igor
>
>
>> -Original Message-
>> From: Jeff Law [mailto:l...@redhat.com]
>> Sent: We
On 11/02/2017 04:33 PM, Nathan Sidwell wrote:
On 10/26/2017 10:34 AM, David Malcolm wrote:
[CCing Rainer and Mike for the gcc-dg.exp part]
My Tcl skills aren't great, so hopefully someone else can review this;
CCing Rainer and Mike.
Ping?
https://gcc.gnu.org/ml/gcc-patches/2017-10/msg01911
On Wed, Nov 08, 2017 at 05:17:50PM +, Joseph Myers wrote:
> On Wed, 8 Nov 2017, Jakub Jelinek wrote:
>
> > of course only if LVAL is false. Additionally, I've added folding of
> > "foo"[2] into 'o'. We have it in gimple-fold.c or so, so that one
>
> Note that if the 2 there comes from an ov
On 11/07/2017 09:28 AM, Tsimbalist, Igor V wrote:
> Enable building libitm with Intel CET. The patch is based on previous patch
> [PATCH 21/22] Add extra field to gtm_jmpbuf on x86 only.
>
> Ok for trunk?
>
> Igor
>
>
> 0022-Enable-building-libitm-with-Intel-CET.PATCH
>
>
> From 2a83369b28b2
Joseph Myers wrote:
> On Fri, 3 Nov 2017, Wilco Dijkstra wrote:
>
> > Almost all targets add an explict -fomit-frame-pointer in the target
> > specific
> > options. Rather than doing this in a target-specific way, do this in the
>
> Which targets do not? You should explicitly list them and CC th
On Wed, Nov 08, 2017 at 06:38:21PM +0100, Jakub Jelinek wrote:
> On Wed, Nov 08, 2017 at 05:17:50PM +, Joseph Myers wrote:
> > On Wed, 8 Nov 2017, Jakub Jelinek wrote:
> >
> > > of course only if LVAL is false. Additionally, I've added folding of
> > > "foo"[2] into 'o'. We have it in gimple
On Wed, Nov 08, 2017 at 06:51:34PM +0100, Marek Polacek wrote:
> > Ok, so like this if it passes bootstrap/regtest?
> >
> > Changes from the last patch:
> > 1) false instead of lval for COMPOUND_EXPR and *COND_EXPR op1/op2
>
> So...
Oops, I've hand-edited it in the patch and then regenerated the
On 11/08/2017 10:47 AM, Wilco Dijkstra wrote:
> Joseph Myers wrote:
>> On Fri, 3 Nov 2017, Wilco Dijkstra wrote:
>>
>>> Almost all targets add an explict -fomit-frame-pointer in the target
>>> specific
>>> options. Rather than doing this in a target-specific way, do this in the
>>
>> Which target
On 10/31/2017 06:03 AM, Tsimbalist, Igor V wrote:
> The revised patch is attached. The differences are in what options are
> defined and propagated to Makefile for CET enabling.
>
> Ok for trunk?
>
> Igor
>
>
>> -Original Message-
>> From: Tsimbalist, Igor V
>> Sent: Friday, October 1
Jeff Law wrote:
> I'd actually prefer to deprecate the H8 and M68k. But assuming that's
> not going to happen in the immediate future I think dropping frame
> pointers on those targets is appropriate as long as we're generating
> dwarf frame info.
Is there a way to check a target does not genera
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