On 2017-04-13 09:05 +0200, Richard Biener wrote:
> Did you verify LTO bootstrap still works with the patch?
I've just done a LTO bootstrapp (boarding a train :) ).
It works with my patch.
--
Xi Ruoyao
School of Aerospace Science and Technology, Xidian University
Hi Jerry,
thanks for the suggestions - I agree that a download link which is
more visible would be a good idea. I will adapt the pages with this in
mind.
Regards,
Arjen
2017-04-13 21:36 GMT+02:00 Jerry DeLisle :
> On 04/13/2017 02:13 AM, Arjen Markus wrote:
>> Hi Gerald, Jerry,
>>
>> as the aut
Hi Bernd,
On 14 April 2017 at 06:18, Bernd Edlinger wrote:
> On 04/12/17 17:58, Yvan Roux wrote:
>> Hi,
>>
>> On 20 February 2017 at 18:53, Bruce Korb wrote:
>>> On 02/18/17 01:01, Bernd Edlinger wrote:
On 02/18/17 00:37, Bruce Korb wrote:
> On 02/06/17 10:44, Bernd Edlinger wrote:
On Wed, Apr 12, 2017 at 04:30:51PM -0400, Michael Meissner wrote:
> > Or we could just remove -mmodulo etc. What good do they do? They make
> > testing infeasible: an exponential number of combinations to test.
>
> We can't remove -mmodulo, -mpopcntd, -mcmpb, -mpopcntb as these are the basic
> m
On Wed, Apr 12, 2017 at 06:45:31PM -0400, Michael Meissner wrote:
> The problem is rs6000_expand_vector_extract did not check for SFmode being
> allowed in the Altivec (upper) registers, but the insn implementing the
> variable extract had it as a condition.
>
> In looking at the variable extract
On Wed, Apr 12, 2017 at 06:33:17PM -0600, Kelvin Nilsen wrote:
> PR80315 Reported an Internal Compiler Error when the third argument to
> __builtin_crypto_vshasigmaw was an integer constant with a value
> greater than 15. The patch to correct this problem was committed
> yesterday. This patch adds
Hi Yvan,
On 04/14/17 10:24, Yvan Roux wrote:
> Hi Bernd,
>
> On 14 April 2017 at 06:18, Bernd Edlinger wrote:
>> On 04/12/17 17:58, Yvan Roux wrote:
>>> Hi,
>>>
>>> On 20 February 2017 at 18:53, Bruce Korb wrote:
On 02/18/17 01:01, Bernd Edlinger wrote:
> On 02/18/17 00:37, Bruce Korb w
In the PR testcase, there were two instructions that had
a large number of insn_reg_use records for the same register.
model_recompute was instead expecting the records to be unique
and so decremented the register pressure for each one. We then
ended up with a negative pressure.
I think the recor
On 14 April 2017 at 12:29, Bernd Edlinger wrote:
> Hi Yvan,
>
> On 04/14/17 10:24, Yvan Roux wrote:
>> Hi Bernd,
>>
>> On 14 April 2017 at 06:18, Bernd Edlinger wrote:
>>> On 04/12/17 17:58, Yvan Roux wrote:
Hi,
On 20 February 2017 at 18:53, Bruce Korb wrote:
> On 02/18/17 01:
Hi,
> Andrew Burgess (2):
> arc: Use @pcl assembler syntax instead of invalid expressions
> arc: Fix for loop end detection
>
Both patches looks good to me.
Claudiu
Jeff Law writes:
> The mips64vr-elf target will fail building newlib, particularly the
> mips16 newlib as we emit bogus assembly code.
>
> In particular the compiler will emit something like
>
> lwu $2,0($sp)
>
> That's invalid in mips16 mode AFAICT.
>
> That's emitted by the extendsidi pattern.
> > Claudiu Zissulescu (3):
> > [ARC] Update mode_dependent_address_p hook.
> > [ARC] DWARF emitting cleanup.
> > [ARC] Use long jumps for CRT calls
>
> These all look fine.
>
Committed. Thank you for your review,
Claudiu
gcc/
2016-12-08 Claudiu Zissulescu
* config/arc/arc.md (cmpsi_cc_insn_mixed): Use 'h' register
constraint.
(cmpsi_cc_c_insn): Likewise.
(cbranchsi4_scratch): Compute proper instruction length using
compact_hreg_operand.
* config/arc/predicates.md
From: claziss
Hi,
There is an issue with 'h'- register class for ARCv2, which accepts
only the first 32 general purposes registers as oposite to the ARCv1
which accepts all 64 GPRs. Fix this issue in two patches for CMP and
ADD instructions.
Also, allow the compiler to use extra GPRs if they ar
gcc/
2016-12-09 Claudiu Zissulescu
* config/arc/arc.c (arc_conditional_register_usage): Make D0, D1
double regs fix when not used.
---
gcc/config/arc/arc.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index 8a8ac86..f82062
gcc/
2016-12-08 Claudiu Zissulescu
* config/arc/arc.c (arc_output_addsi): Check for h-register class
when emitting short ADD instructions.
---
gcc/config/arc/arc.c | 42 +++---
1 file changed, 27 insertions(+), 15 deletions(-)
diff --git a/g
gcc/
2016-12-09 Claudiu Zissulescu
* config/arc/arc.h (REGNO_OK_FOR_BASE_P): Consider also extension
core registers.
(REG_OK_FOR_INDEX_P_NONSTRICT): Likewise.
(REG_OK_FOR_BASE_P_NONSTRICT): Likewise.
---
gcc/config/arc/arc.h | 20 +---
1 file cha
gcc/
2016-12-09 Claudiu Zissulescu
* config/arc/arc.c (arc_conditional_register_usage): Use ACCL,
ACCH registers whenever they are available.
---
gcc/config/arc/arc.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index
gcc/
2016-12-13 Claudiu Zissulescu
* config/arc/arc.c (LEGITIMATE_OFFSET_ADDRESS_P): Delete macro.
(legitimate_offset_address_p): New function.
(arc_legitimate_address_p): Use above function.
---
gcc/config/arc/arc.c | 44 +++-
1
The TARGET_ASM_OUTPUT_MI_THUNK hook doesn't take into account the
variant when we compile for PIC.
gcc/
2016-12-13 Claudiu Zissulescu
* config/arc/arc.c (arc_output_mi_thunk): Emit PIC calls.
---
gcc/config/arc/arc.c | 24 +---
1 file changed, 21 insertions(+), 3 d
Hello.
Patch handles ICE when gcov-tool either merges or scales gcov files and
destination folder (where all files are merged) is non-empty.
Patch can bootstrap on ppc64le-redhat-linux and survives regression tests.
And gcov.exp works on x86_64-linux-gnu.
Ready to be installed?
Martin
>From 14b
On 04/14/2017 08:45 AM, Martin Liška wrote:
Hello.
Patch handles ICE when gcov-tool either merges or scales gcov files and
destination folder (where all files are merged) is non-empty.
Patch can bootstrap on ppc64le-redhat-linux and survives regression tests.
And gcov.exp works on x86_64-linux-
Patch committed to the gcc5 branch
2017-04-14 Dominique d'Humieres
Backport from trunk
2015-11-18 Steven G. Kargl
PR fortran/59910
PR fortran/80388
* primary.c (gfc_match_structure_constructor): Reduce a structure
constructor in a DATA statem
On 04/14/2017 02:48 PM, Nathan Sidwell wrote:
On 04/14/2017 08:45 AM, Martin Liška wrote:
Hello.
Patch handles ICE when gcov-tool either merges or scales gcov files and
destination folder (where all files are merged) is non-empty.
Patch can bootstrap on ppc64le-redhat-linux and survives regres
Jakub Jelinek writes:
> Hi!
>
> The x86 intrinsics allow andnot on MODE_VECTOR_FLOAT modes, but
> such modes have NULL CONSTM1_RTX and are not appropriate for the
> transformation anyway.
>
> The following patch fixes that, ok if bootstrap/regtest passes?
> Or would you prefer to replace the
> &&
Pat Haugen writes:
> On 04/12/2017 06:33 PM, Kelvin Nilsen wrote:
>>
>> 1. As input arguments, out_insn represents an rtl expression that
>> potentially "produces" a store to memory and in_insn represents an rtl
>> expression that potentially "consumes" a value recently stored to memory.
>>
> Yo
On 04/14/2017 05:22 AM, Richard Sandiford wrote:
Jeff Law writes:
The mips64vr-elf target will fail building newlib, particularly the
mips16 newlib as we emit bogus assembly code.
In particular the compiler will emit something like
lwu $2,0($sp)
That's invalid in mips16 mode AFAICT.
That's
Jeff Law writes:
> On 04/14/2017 05:22 AM, Richard Sandiford wrote:
>> Jeff Law writes:
>>> The mips64vr-elf target will fail building newlib, particularly the
>>> mips16 newlib as we emit bogus assembly code.
>>>
>>> In particular the compiler will emit something like
>>>
>>> lwu $2,0($sp)
>>>
>
On 04/14/2017 10:24 AM, Richard Sandiford wrote:
I think it only does that if the "containing object" that you're
validating is a MEM. If the object you're validating is an insn
(which it always is for regcprop) then normal constrain_operands
does happen.
Hmm, you've of course right!
Addi
On 04/14/2017 11:01 AM, Jeff Law wrote:
On 04/14/2017 10:24 AM, Richard Sandiford wrote:
I think it only does that if the "containing object" that you're
validating is a MEM. If the object you're validating is an insn
(which it always is for regcprop) then normal constrain_operands
does happen
On 04/14/2017 10:24 AM, Richard Sandiford wrote:
Jeff Law writes:
On 04/14/2017 05:22 AM, Richard Sandiford wrote:
Jeff Law writes:
The mips64vr-elf target will fail building newlib, particularly the
mips16 newlib as we emit bogus assembly code.
In particular the compiler will emit somethin
* Claudiu Zissulescu [2017-04-14 11:20:43
+]:
> Hi,
>
> > Andrew Burgess (2):
> > arc: Use @pcl assembler syntax instead of invalid expressions
> > arc: Fix for loop end detection
> >
>
> Both patches looks good to me.
Thanks committed as r246932 and r246933.
Andrew
Hi all,
I have just committed a close-to-obvious patch for PR 80361, as
approved by Thomas on bugzilla:
https://gcc.gnu.org/viewcvs?rev=246934&root=gcc&view=rev
I will backport it to the 5 and 6 branches after a week or so ...
Cheers,
Janus
On Fri, Apr 14, 2017 at 03:48:47AM -0500, Segher Boessenkool wrote:
> On Wed, Apr 12, 2017 at 06:45:31PM -0400, Michael Meissner wrote:
> > The problem is rs6000_expand_vector_extract did not check for SFmode being
> > allowed in the Altivec (upper) registers, but the insn implementing the
> > vari
On Fri, Apr 14, 2017 at 05:43:28PM -0400, Michael Meissner wrote:
> On Fri, Apr 14, 2017 at 03:48:47AM -0500, Segher Boessenkool wrote:
> > On Wed, Apr 12, 2017 at 06:45:31PM -0400, Michael Meissner wrote:
> > > The problem is rs6000_expand_vector_extract did not check for SFmode being
> > > allowe
This problem reports an assertion error when certain rtl expressions
which are not eligible as producers or consumers of a store bypass
optimization are passed as arguments to the store_data_bypass_p
function. The proposed patch returns false from store_data_bypass_p
rather than terminating with
On Sat, 8 Apr 2017, Ionut Vatavu wrote:
> I would like to announce a new mirror in Germany Gunzenhausen:
>
> http://www.bothelp.net/mirrors/gcc - updated daily by rsync
Thanks, Ionut.
This is now part of our mirrors list per the patch below.
Gerald
Index: mirrors.html
=
On 2017-04-14 15:00 +0800, Xi Ruoyao wrote:
> On 2017-04-13 09:05 +0200, Richard Biener wrote:
>
> > Did you verify LTO bootstrap still works with the patch?
>
> I've just done a LTO bootstrapp (boarding a train :) ).
> It works with my patch.
I've done dejagnu tests in lto.exp and built a Linu
Bin's commit r246810, for PR80153, fixes 20050830-1.c for -m64 (it
already passed for -m32). So, this patch removes the remaining xfail.
Tested on powerpc64-linux {-m32,-m64}; committing to trunk.
Segher
2017-04-15 Segher Boessenkool
gcc/testsuite/
PR tree-optimization/66612
On Fri, Apr 14, 2017 at 05:07:17PM -0500, Segher Boessenkool wrote:
> On Fri, Apr 14, 2017 at 05:43:28PM -0400, Michael Meissner wrote:
> > On Fri, Apr 14, 2017 at 03:48:47AM -0500, Segher Boessenkool wrote:
> > > On Wed, Apr 12, 2017 at 06:45:31PM -0400, Michael Meissner wrote:
> > > > The problem
On Fri, 14 Apr 2017, Arjen Markus wrote:
> thanks for the suggestions - I agree that a download link which is
> more visible would be a good idea. I will adapt the pages with this
> in mind.
Cool, thanks.
For the time being, I'm going ahead with the change below (taking
into consideration Jerry'
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