On 1 November 2016 at 23:41, Uros Bizjak wrote:
> On Tue, Nov 1, 2016 at 5:05 PM, Jakub Jelinek wrote:
>> On Tue, Nov 01, 2016 at 10:05:22AM +0100, Uros Bizjak wrote:
>>> ... simplify some conditions and add i?86-*-* target where missing.
>>>
>>> 2016-11-01 Uros Bizjak
>>>
>>> * lib/target
Pinging patch: https://gcc.gnu.org/ml/gcc-patches/2016-10/msg01545.html
Thanks,
Prathamesh
On Tue, Nov 01, 2016 at 08:55:03PM -0600, Martin Sebor wrote:
> struct S {
> int a, b, c, d;
> };
>
> #define bos(p, t) __builtin_object_size (p, t)
> #define memset0(p, i, n) __builtin___memset_chk (p, i, n, bos (p, 0))
> #define memset1(p, i, n) __builtin___memset_chk (p, i, n, bos (p, 1))
>
On Tue, 1 Nov 2016, Marc Glisse wrote:
> On Mon, 31 Oct 2016, Richard Biener wrote:
>
> > On Fri, 28 Oct 2016, Marc Glisse wrote:
> >
> > > On Wed, 28 Sep 2016, Richard Biener wrote:
> > >
> > > > The following patch implements patterns to catch x / abs (x)
> > > > and x / -x, taking advantage
The following makes EVRP use infer_value_range. It also adds a bit of
dump verbosity to make EVRP traceable with -details.
Bootstrapped and tested on x86_64-unkown-linux-gnu, applied to trunk.
Richard.
2016-11-02 Richard Biener
* tree-vrp.c (evrp_dom_walker::before_dom_children): C
On Wed, Nov 02, 2016 at 12:39:08PM +0530, Prathamesh Kulkarni wrote:
> On 1 November 2016 at 23:41, Uros Bizjak wrote:
> > On Tue, Nov 1, 2016 at 5:05 PM, Jakub Jelinek wrote:
> >> On Tue, Nov 01, 2016 at 10:05:22AM +0100, Uros Bizjak wrote:
> >>> ... simplify some conditions and add i?86-*-* tar
On Mon, Oct 31, 2016 at 3:56 PM, Martin Liška wrote:
> On 10/31/2016 12:11 PM, Richard Biener wrote:
>> On Mon, Oct 31, 2016 at 11:18 AM, Richard Sandiford
>> wrote:
>>> Richard Biener writes:
On Mon, Oct 31, 2016 at 10:58 AM, Richard Sandiford
wrote:
> Richard Biener writes:
>>>
On Mon, Oct 31, 2016 at 4:35 PM, Segher Boessenkool
wrote:
> On Mon, Oct 31, 2016 at 04:09:48PM +0100, Steven Bosscher wrote:
>> On Sun, Oct 30, 2016 at 8:10 PM, Segher Boessenkool wrote:
>> > This patch solves this problem by simply running the
>> > duplicate_computed_gotos
>> > pass again, as l
On Mon, 31 Oct 2016, Jakub Jelinek wrote:
> Hi!
>
> Some automatic VAR_DECLs don't get DECL_RTL set - e.g. if its SSA_NAMEs
> expand to multiple rtls, then there is not a single one that can be used.
> Using DECL_RTL on such VAR_DECLs ICEs.
>
> I've tried to just return 0 in nonoverlapping_memre
On 27 October 2016 at 15:34, Jonathan Wakely wrote:
> On 26/10/16 09:24 +0200, Christophe Lyon wrote:
>>
>> Hi Jonathan,
>>
>> On 25 October 2016 at 17:32, Jonathan Wakely wrote:
>>>
>>> Two more fixes for the filesystem TS, and improved tests.
>>>
>>> Handle negative times in filesystem::last_
On Tue, Nov 1, 2016 at 1:09 AM, Jakub Jelinek wrote:
> On Mon, Oct 31, 2016 at 05:28:42PM -0500, Bill Schmidt wrote:
>> The PowerPC back end loses performance on vector intrinsics, because
>> currently
>> all of them are treated as calls throughout the middle-end phases and only
>> expanded when
On Tue, Nov 1, 2016 at 12:54 PM, Kyrill Tkachov
wrote:
> Hi all,
>
> In this PR the code writes a -1 to a bitfield of size 17 bits and ends up
> overwriting another bitfields.
> The problem is that the intermediate buffer in encode_tree_to_bitpos holding
> the value to merge holds
> a 24-bit tempo
On Wed, Nov 02, 2016 at 10:08:25AM +0100, Richard Biener wrote:
> On Mon, 31 Oct 2016, Jakub Jelinek wrote:
>
> > Hi!
> >
> > Some automatic VAR_DECLs don't get DECL_RTL set - e.g. if its SSA_NAMEs
> > expand to multiple rtls, then there is not a single one that can be used.
> > Using DECL_RTL on
On Tue, Nov 1, 2016 at 12:54 PM, Kyrill Tkachov
wrote:
> Hi all,
>
> Store merging ICEs on this invalid testcase because it trips up on the
> negative bitposition to store to.
> It doesn't really expect to handle negative offsets and I believe they won't
> occur very often in valid code anyway.
>
On Wed, Nov 02, 2016 at 10:19:26AM +0100, Richard Biener wrote:
> On Tue, Nov 1, 2016 at 1:09 AM, Jakub Jelinek wrote:
> > On Mon, Oct 31, 2016 at 05:28:42PM -0500, Bill Schmidt wrote:
> >> The PowerPC back end loses performance on vector intrinsics, because
> >> currently
> >> all of them are tr
On Wed, 2 Nov 2016, Jakub Jelinek wrote:
> On Wed, Nov 02, 2016 at 10:08:25AM +0100, Richard Biener wrote:
> > On Mon, 31 Oct 2016, Jakub Jelinek wrote:
> >
> > > Hi!
> > >
> > > Some automatic VAR_DECLs don't get DECL_RTL set - e.g. if its SSA_NAMEs
> > > expand to multiple rtls, then there is
On 11/01/2016 03:53 PM, Jakub Jelinek wrote:
> What kind of false positives it is for each case? Is it with normal
> asan-bootstrap (without your -fsanitize-use-after-scope changes), or
> only with those changes, or only with those changes and
> -fsanitize-use-after-scope used during bootstrap?
O
On Tue, Nov 1, 2016 at 4:12 PM, Jakub Jelinek wrote:
> On Tue, Nov 01, 2016 at 03:53:46PM +0100, Martin Liška wrote:
>> @@ -1504,7 +1505,7 @@ non_rewritable_lvalue_p (tree lhs)
>>
>> static void
>> maybe_optimize_var (tree var, bitmap addresses_taken, bitmap not_reg_needs,
>> - b
On Wed, Nov 02, 2016 at 10:34:15AM +0100, Richard Biener wrote:
> Ok, just looking at regex.c (I happen to have regex.i around) shows
> the first hit as
>
> #2 0x008d9914 in true_dependence_1 (mem=0x761ef360,
> mem_mode=DImode, mem_addr=0x76220cf0, x=0x76605060,
> x_
On 11/02/2016 10:40 AM, Richard Biener wrote:
> On Tue, Nov 1, 2016 at 4:12 PM, Jakub Jelinek wrote:
>> On Tue, Nov 01, 2016 at 03:53:46PM +0100, Martin Liška wrote:
>>> @@ -1504,7 +1505,7 @@ non_rewritable_lvalue_p (tree lhs)
>>>
>>> static void
>>> maybe_optimize_var (tree var, bitmap addresse
On Wed, 2 Nov 2016, Jakub Jelinek wrote:
> On Wed, Nov 02, 2016 at 10:34:15AM +0100, Richard Biener wrote:
> > Ok, just looking at regex.c (I happen to have regex.i around) shows
> > the first hit as
> >
> > #2 0x008d9914 in true_dependence_1 (mem=0x761ef360,
> > mem_mode=DImode
On 11/01/2016 04:12 PM, Jakub Jelinek wrote:
> On Tue, Nov 01, 2016 at 03:53:46PM +0100, Martin Liška wrote:
>> @@ -1504,7 +1505,7 @@ non_rewritable_lvalue_p (tree lhs)
>>
>> static void
>> maybe_optimize_var (tree var, bitmap addresses_taken, bitmap not_reg_needs,
>> -bitmap su
On Wed, Nov 02, 2016 at 10:40:35AM +0100, Richard Biener wrote:
> > I wonder if the sanitize_asan_mark wouldn't better be some PROP_* property
> > set during the asan pass and kept on until end of compilation of that
> > function. That means even if a var only addressable because of ASAN_MARK is
>
On Wed, Nov 02, 2016 at 10:36:44AM +0100, Martin Liška wrote:
> On 11/01/2016 03:53 PM, Jakub Jelinek wrote:
> > What kind of false positives it is for each case? Is it with normal
> > asan-bootstrap (without your -fsanitize-use-after-scope changes), or
> > only with those changes, or only with th
Ping?
Best regards,
Thomas
On 28/10/16 10:49, Thomas Preudhomme wrote:
On 22/09/16 16:47, Richard Earnshaw (lists) wrote:
On 22/09/16 15:51, Thomas Preudhomme wrote:
Sorry, noticed an error in the patch. It was not caught during testing
because GCC was built with --with-mode=thumb. Correct p
Ping?
Best regards,
Thomas
On 27/10/16 15:26, Thomas Preudhomme wrote:
Hi Kyrill,
On 27/10/16 10:45, Kyrill Tkachov wrote:
Hi Thomas,
On 24/10/16 09:06, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 13/10/16 16:35, Thomas Preudhomme wrote:
Hi ARM maintainers,
This patchset ai
Ping?
Best regards,
Thomas
On 24/10/16 09:07, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 13/10/16 16:35, Thomas Preudhomme wrote:
Hi ARM maintainers,
This patchset aims at adding multilib support for R and M profile ARM
architectures and allowing it to be built alongside multi
Ping?
Best regards,
Thomas
On 26/10/16 17:42, Thomas Preudhomme wrote:
Hi,
This patch adds support for the Cortex-M33 processor launched by ARM [1]. The
patch adds support for the name and wires it up to the ARMv8-M Mainline with DSP
extensions architecture and arm_v7m_tune tuning parameters
Ping?
Best regards,
Thomas
On 26/10/16 17:42, Thomas Preudhomme wrote:
Hi,
This patch adds support for the Cortex-M23 processor launched by ARM [1]. The
patch adds support for the name and wires it up to the ARMv8-M Baseline
architecture and arm_v6m_tune tuning parameters for the time being.
On 11/02/2016 10:59 AM, Jakub Jelinek wrote:
> On Wed, Nov 02, 2016 at 10:36:44AM +0100, Martin Liška wrote:
>> On 11/01/2016 03:53 PM, Jakub Jelinek wrote:
>>> What kind of false positives it is for each case? Is it with normal
>>> asan-bootstrap (without your -fsanitize-use-after-scope changes),
On Wed, Nov 02, 2016 at 10:59:26AM +0100, Jakub Jelinek wrote:
> > Which is gimplified as:
> >
> > int * ptr;
> >
> > switch (argc) , case 1: >
> > {
> > int a;
> >
> > try
> > {
> > ASAN_MARK (2, &a, 4);
> > :
> > goto ;
> >
On 02/11/16 10:07, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 26/10/16 17:42, Thomas Preudhomme wrote:
Hi,
This patch adds support for the Cortex-M23 processor launched by ARM [1]. The
patch adds support for the name and wires it up to the ARMv8-M Baseline
architecture and arm_v
On 02/11/16 10:07, Thomas Preudhomme wrote:
Ping?
Best regards,
Thomas
On 26/10/16 17:42, Thomas Preudhomme wrote:
Hi,
This patch adds support for the Cortex-M33 processor launched by ARM [1]. The
patch adds support for the name and wires it up to the ARMv8-M Mainline with DSP
extensions ar
On Wed, Nov 2, 2016 at 10:02 AM, Richard Biener
wrote:
> On Mon, Oct 31, 2016 at 4:35 PM, Segher Boessenkool wrote:
>> On Mon, Oct 31, 2016 at 04:09:48PM +0100, Steven Bosscher wrote:
>>> On Sun, Oct 30, 2016 at 8:10 PM, Segher Boessenkool wrote:
>>> > + cfg_layout_finalize ();
>>>
>>> I don
> This converts the preprocessor check for WORD_REGISTER_OPERATIONS into a
> runtime one in rtlanal.c.
>
> Since this one was in combination with an "#if defined" and used to guard an
> if-statement I'd appreciate it if someone gave it a double-check that I
> dind't screw up the intended behaviour
This fixes the alias check in terminate_all_aliasing_chains -- the
base we use for the hash table indexing does not constitute an object
that aliases all stores in the chain (consider for example the MEM_REF
handling which strips the offset completely).
I've refactored data structures a bit in th
On Tue, Nov 01, 2016 at 11:08:53AM -0700, Andrew Pinski wrote:
> On Tue, Nov 17, 2015 at 2:10 PM, Andrew Pinski wrote:
> > Since ThunderX T88 pass 1 (variant 0) is a ARMv8 part while pass 2 (variant
> > 1)
> > is an ARMv8.1 part, I needed to add detecting of the variant also for this
> > differen
On Tue, Nov 1, 2016 at 4:24 PM, Bin.Cheng wrote:
> On Thu, Aug 11, 2016 at 11:38 AM, Richard Biener
> wrote:
>> On Thu, Aug 11, 2016 at 11:56 AM, Bin.Cheng wrote:
>>> On Thu, Aug 11, 2016 at 10:50 AM, Richard Biener
>>> wrote:
On Wed, Aug 10, 2016 at 5:58 PM, Bin Cheng wrote:
> Hi,
>>
Hi Eric,
On 02/11/16 10:47, Eric Botcazou wrote:
This converts the preprocessor check for WORD_REGISTER_OPERATIONS into a
runtime one in rtlanal.c.
Since this one was in combination with an "#if defined" and used to guard an
if-statement I'd appreciate it if someone gave it a double-check that
On Wed, Nov 2, 2016 at 11:08 AM, Richard Biener
wrote:
> On Tue, Nov 1, 2016 at 4:24 PM, Bin.Cheng wrote:
>> On Thu, Aug 11, 2016 at 11:38 AM, Richard Biener
>> wrote:
>>> On Thu, Aug 11, 2016 at 11:56 AM, Bin.Cheng wrote:
On Thu, Aug 11, 2016 at 10:50 AM, Richard Biener
wrote:
>
On Tue, Nov 1, 2016 at 12:21 PM, Kyrill Tkachov
wrote:
> Hi Tamar,
>
>
> On 26/10/16 16:01, Tamar Christina wrote:
>>
>> Hi Christophe,
>>
>> Here's the updated patch.
>>
>> Cheers,
>> Tamar
>>
>> From: Christophe Lyon
>> Sent: Wednesday, October 19, 2016
On Wed, 2 Nov 2016, Richard Biener wrote:
>
> This fixes the alias check in terminate_all_aliasing_chains -- the
> base we use for the hash table indexing does not constitute an object
> that aliases all stores in the chain (consider for example the MEM_REF
> handling which strips the offset comp
> I think you're right. I suppose the new condition should be:
>
> #ifdef LOAD_EXTEND_OP
> /* If this is a typical RISC machine, we only have to worry
>about the way loads are extended. */
> if (!WORD_REGISTER_OPERATIONS
>
> || ((LOAD_EXTEND_OP (inner_mode
What is currently submitted for LLVM review was submitted before we determined
this naming scheme. I will mark the current submittal as abandoned, as the
scheduling model needs to be split out and revised.
Joel Jones
Sent from my AArch64 powered iPhone
> On Nov 2, 2016, at 3:55 AM, James Gree
On Nov 2, 2016, at 4:28 AM, Jakub Jelinek wrote:
>
> On Wed, Nov 02, 2016 at 10:19:26AM +0100, Richard Biener wrote:
>> On Tue, Nov 1, 2016 at 1:09 AM, Jakub Jelinek wrote:
>>> On Mon, Oct 31, 2016 at 05:28:42PM -0500, Bill Schmidt wrote:
The PowerPC back end loses performance on vector int
On Tue, 1 Nov 2016, Yuri Rumyantsev wrote:
> Hi All,
>
> I re-send all patches sent by Ilya earlier for review which support
> vectorization of loop epilogues and loops with low trip count. We
> assume that the only patch - vec-tails-07-combine-tail.patch - was not
> approved by Jeff.
>
> I did
On Wed, Nov 2, 2016 at 10:52 AM, Jakub Jelinek wrote:
> On Wed, Nov 02, 2016 at 10:40:35AM +0100, Richard Biener wrote:
>> > I wonder if the sanitize_asan_mark wouldn't better be some PROP_* property
>> > set during the asan pass and kept on until end of compilation of that
>> > function. That me
On 10/27/2016 03:14 AM, Aaron Sawdey wrote:
I'm currently working on a builtin expansion of strncmp for powerpc
similar to the one for memcmp I checked recently. One thing I
encountered is that the code in expand_strn_compare will not attempt to
expand the cmpstrnsi pattern at all if neither stri
On Tue, Nov 1, 2016 at 10:39 PM, Wilco Dijkstra wrote:
> Jeff Law wrote:
>
>> I think you'll need to look at bz61320 before this could go in.
>
> I had a look, but there is nothing there that is related - eventually
> a latent alignment bug was fixed in IVOpt. Note that the bswap phase
> current
The format-checking parts of the patch are OK.
--
Joseph S. Myers
jos...@codesourcery.com
On Wed, Nov 02, 2016 at 01:36:31PM +0100, Richard Biener wrote:
> > Unless I'm missing something we either need to perform further analysis
> > during the addressable subpass - this variable could be made
> > non-addressable, but is used in ASAN_MARK, would if we rewrote it into SSA
> > form there
On Wed, Nov 2, 2016 at 1:56 PM, Jakub Jelinek wrote:
> On Wed, Nov 02, 2016 at 01:36:31PM +0100, Richard Biener wrote:
>> > Unless I'm missing something we either need to perform further analysis
>> > during the addressable subpass - this variable could be made
>> > non-addressable, but is used in
Then I'll approve the whole patch.
On Wed, Nov 2, 2016 at 8:42 AM, Joseph Myers wrote:
> The format-checking parts of the patch are OK.
>
> --
> Joseph S. Myers
> jos...@codesourcery.com
On Wed, Nov 02, 2016 at 01:59:00PM +0100, Richard Biener wrote:
> > Yeah, that is what I meant. The issue is how to report uses of such
> > SSA_NAME when there is no memory. So, either we'd need a special runtime
> > library entrypoint that would report uses after scope even when there is no
> >
The following teaches store-merging to handle non-NULL offset if the
base is already addressable (otherwise introducing new pointers to
a non-addressable base invalidates points-to information, see a comment
in the patch how we could avoid this in theory).
Bootstrap and regtest running on x86_64-
On Wed, Nov 2, 2016 at 2:06 PM, Jakub Jelinek wrote:
> On Wed, Nov 02, 2016 at 01:59:00PM +0100, Richard Biener wrote:
>> > Yeah, that is what I meant. The issue is how to report uses of such
>> > SSA_NAME when there is no memory. So, either we'd need a special runtime
>> > library entrypoint th
Adjust some comments, add some explicit fall through comments or explicit
returns where necessary to not get implicit-fallthrough warnings.
All fall throughs were deliberate. In one case I added an explicit return
false for clarity instead of falling through a default case (that also
would return
On Wed, Nov 02, 2016 at 02:19:33PM +0100, Mark Wielaard wrote:
> Adjust some comments, add some explicit fall through comments or explicit
> returns where necessary to not get implicit-fallthrough warnings.
>
> All fall throughs were deliberate. In one case I added an explicit return
> false for c
On 01/11/16 16:48, Jason Merrill wrote:
> It seems to me that a CFA_*expression note would never use target
> UNSPEC codes, and a DWARF UNSPEC would never appear outside of such a
> note, so we don't need to worry about conflicts.
Indeed.
DWARF UNSPEC is deeper inside DW_CFA_*expression note. M
On Mon, Oct 31, 2016 at 7:46 AM, Uros Bizjak wrote:
> This function will be used in a follow-up patch to implement
> TARGET_EXPAND_DIVMOD_LIBFUNC for x86 targets. Other targets can call
> this function, so IMO it should be part of a generic library.
>
> 2016-10-31 Uros Bizjak
>
> * Makefile
On 2 November 2016 at 12:22, Bin.Cheng wrote:
> On Tue, Nov 1, 2016 at 12:21 PM, Kyrill Tkachov
> wrote:
>> Hi Tamar,
>>
>>
>> On 26/10/16 16:01, Tamar Christina wrote:
>>>
>>> Hi Christophe,
>>>
>>> Here's the updated patch.
>>>
>>> Cheers,
>>> Tamar
>>>
On Wed, 2016-11-02 at 13:41 +0100, Bernd Schmidt wrote:
> On 10/27/2016 03:14 AM, Aaron Sawdey wrote:
> >
> > I'm currently working on a builtin expansion of strncmp for powerpc
> > similar to the one for memcmp I checked recently. One thing I
> > encountered is that the code in expand_strn_compar
On Wed, Nov 02, 2016 at 11:39:20AM +0100, Steven Bosscher wrote:
> On Wed, Nov 2, 2016 at 10:02 AM, Richard Biener
> wrote:
> > On Mon, Oct 31, 2016 at 4:35 PM, Segher Boessenkool wrote:
> >> On Mon, Oct 31, 2016 at 04:09:48PM +0100, Steven Bosscher wrote:
> >>> On Sun, Oct 30, 2016 at 8:10 PM, S
On Wed, Nov 02, 2016 at 01:26:48PM +, Jiong Wang wrote:
> -/* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note.
> */
> +/* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note.
> */
Too long line.
> +/* RTL sequences inside PARALLEL are raw e
Richard Biener wrote:
On Tue, Nov 1, 2016 at 10:39 PM, Wilco Dijkstra wrote:
> > If bswap is false no byte swap is needed, so we found a native endian load
> > and it will always perform the optimization by inserting an unaligned load.
>
> Yes, the general agreement is that the expander can do be
On Wed, Nov 2, 2016 at 2:40 PM, Segher Boessenkool
wrote:
> On Wed, Nov 02, 2016 at 11:39:20AM +0100, Steven Bosscher wrote:
>> On Wed, Nov 2, 2016 at 10:02 AM, Richard Biener
>> wrote:
>> > On Mon, Oct 31, 2016 at 4:35 PM, Segher Boessenkool wrote:
>> >> On Mon, Oct 31, 2016 at 04:09:48PM +0100
On Wed, Nov 2, 2016 at 2:43 PM, Wilco Dijkstra wrote:
> Richard Biener wrote:
> On Tue, Nov 1, 2016 at 10:39 PM, Wilco Dijkstra
> wrote:
>
>> > If bswap is false no byte swap is needed, so we found a native endian load
>> > and it will always perform the optimization by inserting an unaligned lo
On 02/11/16 13:42, Jakub Jelinek wrote:
On Wed, Nov 02, 2016 at 01:26:48PM +, Jiong Wang wrote:
-/* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note. */
+/* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note.
*/
Too long line.
Hmm, it shows
On Wed, Nov 02, 2016 at 11:10:53AM +0100, Jakub Jelinek wrote:
> On Wed, Nov 02, 2016 at 10:59:26AM +0100, Jakub Jelinek wrote:
> > > Which is gimplified as:
> > >
> > > int * ptr;
> > >
> > > switch (argc) , case 1: >
> > > {
> > > int a;
> > >
> > > try
> > > {
We are planning to ask other tools to support SOURCE_PREFIX_MAP, in the same
way that we have already done this for SOURCE_DATE_EPOCH. So, this will last
for some time and have quite wide reach. Consequently, we believe it is better
to split on the final '=', since it is much less likely to result
This brings the behaviour in line with the __DATE__ and __TIME__ macros. Note
though the minor difference: __TIMESTAMP__ is defined as the file-modification
date and not the "current" date or time like the other two macros. Therefore,
we do a clamping behaviour (similar to tar --clamp-mtime).
Ackn
Define the SOURCE_PREFIX_MAP environment variable, and treat it as an implicit
CLI -fdebug-prefix-map option specified before any explicit such options.
Acknowledgements
Daniel Kahn Gillmor who wrote the patch for r231835, which saved me a lot of
time figuring out what to edit.
Honour the SOURCE_PREFIX_MAP environment variable when expanding the __FILE__
macro, in the same way that debug-prefix-map works for debugging symbol paths.
This patch follows similar lines to the earlier patch for SOURCE_DATE_EPOCH.
Specifically, we read the environment variable not in libcpp but
(Please keep me on CC, I am not subscribed)
Background
==
We are on a long journey to make build processes be able to reproduce the build
outputs independently of which filesystem path the build is being executed from
- e.g. if the executing user doesn't have root access to be able to exe
On 11/02/2016 03:20 PM, Marek Polacek wrote:
> On Wed, Nov 02, 2016 at 11:10:53AM +0100, Jakub Jelinek wrote:
>> On Wed, Nov 02, 2016 at 10:59:26AM +0100, Jakub Jelinek wrote:
Which is gimplified as:
int * ptr;
switch (argc) , case 1: >
{
int a;
Hi!
This is a merge of my patch from yesterday, Jason's incremental patch to
that and parts of Alex' patch from Oct 19.
It uses Alex' LANG_HOOKS_GET_PTRMEMFN_TYPE langhook. I've tried
to think about https://gcc.gnu.org/ml/gcc-patches/2011-05/msg00227.html
and we even have such a langhook now, mo
On Wed, Nov 02, 2016 at 03:27:42PM +0100, Martin Liška wrote:
> > So is there anything I should do wrt -Wswitch-unreachable?
> >
> > Marek
> >
>
> Probably not. I'm having a patch puts GIMPLE_SWITCH statement to a proper
> place
> in GIMPLE_BIND. Let's see whether such patch can bootstrap a
On 11/02/2016 02:16 PM, Richard Biener wrote:
> On Wed, Nov 2, 2016 at 2:06 PM, Jakub Jelinek wrote:
>> On Wed, Nov 02, 2016 at 01:59:00PM +0100, Richard Biener wrote:
Yeah, that is what I meant. The issue is how to report uses of such
SSA_NAME when there is no memory. So, either we'd
On Wed, 2016-11-02 at 00:05 -0400, Trevor Saunders wrote:
> On Mon, Oct 31, 2016 at 07:37:54AM -0600, Jeff Law wrote:
> > On 10/28/2016 01:13 PM, tbsaunde+...@tbsaunde.org wrote:
> > > From: Trevor Saunders
> > >
> > > HI,
> > >
> > > This series changes various variables type from rtx to rtx_in
On Wed, Nov 02, 2016 at 03:38:25PM +0100, Martin Liška wrote:
> it converts:
> foo ()
> {
> char a;
> char * p;
> char _1;
> int _2;
> int _8;
> int _9;
>
> :
> ASAN_MARK (2, &a, 1);
> a = 0;
> p_6 = &a;
> ASAN_MARK (1, &a, 1);
> _1 = *p_6;
You shouldn't convert if a is ad
Hi all,
I noticed that my patch for PR tree-optimization/78170 broke
execute.exp=pr55750.c on big-endian.
The problem with that patch is that we should not forget to clear the padding
bits in the temporary
buffer when merging values even when they are less than a byte.
Tested on aarch64_be-non
The following fixes PR78185 by properly honoring possibly infinite child
loops when computing what blocks are always executed during loop invariant
motion. Such loops behave as if the loop would exit at this point.
Both GIMPLE and RTL level passes have that very same issue and the
following fix
On Wed, 2 Nov 2016, Kyrill Tkachov wrote:
> Hi all,
>
> I noticed that my patch for PR tree-optimization/78170 broke
> execute.exp=pr55750.c on big-endian.
> The problem with that patch is that we should not forget to clear the padding
> bits in the temporary
> buffer when merging values even whe
On 11/02/2016 03:51 PM, Jakub Jelinek wrote:
> On Wed, Nov 02, 2016 at 03:38:25PM +0100, Martin Liška wrote:
>> it converts:
>> foo ()
>> {
>> char a;
>> char * p;
>> char _1;
>> int _2;
>> int _8;
>> int _9;
>>
>> :
>> ASAN_MARK (2, &a, 1);
>> a = 0;
>> p_6 = &a;
>> ASAN_MARK
On Wed, Nov 02, 2016 at 02:51:41PM +0100, Richard Biener wrote:
> >> I don't believe it needs a cleanup on every iteration. One cleanup at
> >> the end should work fine.
> >
> > But as the comment there says:
> >
> > /* Merge the duplicated blocks into predecessors, when possible. */
> >
On Wed, Nov 2, 2016 at 10:31 AM, Jakub Jelinek wrote:
> It uses Alex' LANG_HOOKS_GET_PTRMEMFN_TYPE langhook. I've tried
> to think about https://gcc.gnu.org/ml/gcc-patches/2011-05/msg00227.html
> and we even have such a langhook now, modified_type_die
> uses lang_hooks.types.get_debug_type, but
>
OK.
On Wed, Nov 2, 2016 at 10:18 AM, Jiong Wang wrote:
> On 02/11/16 13:42, Jakub Jelinek wrote:
>>
>> On Wed, Nov 02, 2016 at 01:26:48PM +, Jiong Wang wrote:
>>>
>>> -/* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION
>>> note. */
>>> +/* A subroutine of dwarf2out_frame_d
Hi all,
This fixes the ARM failures in the testsuite.
Previously these tests were gated on if ARMv8-a
support was available in the compiler, not if the hardware
was an ARMv8-a hardware.
This thus resulted in correct code, but wouldn't run on
any other hardware.
Ran regression tests on aarch64-no
On Tue, Oct 25, 2016 at 11:40 AM, Segher Boessenkool
wrote:
> This improves a few things in change_zero_ext. Firstly, it should use
> the passed in pattern in recog_for_combine, not the pattern of the insn
> (they are not the same if the whole pattern was replaced). Secondly,
> it handled zero_e
This revised patch makes two changes:
1) Fix typo in configure.ac
2) Add AIX visibility support for ASM_WEAKEN_DECL, which does touch
the same code as Linux.
The AIX "weak" support fixes a large number of C++ visibility testcases.
Bootstrapped on powerpc-ibm-aix7.2.0.0.
* configure.ac (.hidden)
On 02/11/16 15:38, Tamar Christina wrote:
Hi all,
This fixes the ARM failures in the testsuite.
Previously these tests were gated on if ARMv8-a
support was available in the compiler, not if the hardware
was an ARMv8-a hardware.
This thus resulted in correct code, but wouldn't run on
any other
On 11/02/2016 01:37 AM, Jakub Jelinek wrote:
On Tue, Nov 01, 2016 at 08:55:03PM -0600, Martin Sebor wrote:
struct S {
int a, b, c, d;
};
#define bos(p, t) __builtin_object_size (p, t)
#define memset0(p, i, n) __builtin___memset_chk (p, i, n, bos (p, 0))
#define memset1(p, i, n) __builtin___me
All,
Another quirk of legacy compilers is their syntax for PARAMETER
statements. Such statements are similar to standard PARAMETER
statements but lack parentheses following the PARAMETER keyword. There
is a good reason the standard doesn't support this - because the
statement becomes ambiguous wit
On Wed, Nov 02, 2016 at 11:31:25AM -0400, Jason Merrill wrote:
> On Wed, Nov 2, 2016 at 10:31 AM, Jakub Jelinek wrote:
> > It uses Alex' LANG_HOOKS_GET_PTRMEMFN_TYPE langhook. I've tried
> > to think about https://gcc.gnu.org/ml/gcc-patches/2011-05/msg00227.html
> > and we even have such a langho
One of the pending issues that we should address before we release GCC 7 is
that sometimes we don't issue a warning if the location points to a macro
defined in a system header, unless -Wsystem-headers. Consider e.g.
enum { e1 = LLONG_MIN };
or
float_var = LLONG_MIN;
Here, LLONG_MIN come
On 2 November 2016 at 16:38, Tamar Christina wrote:
> Hi all,
>
> This fixes the ARM failures in the testsuite.
> Previously these tests were gated on if ARMv8-a
> support was available in the compiler, not if the hardware
> was an ARMv8-a hardware.
>
> This thus resulted in correct code, but woul
On Wed, Nov 2, 2016 at 11:51 AM, Marek Polacek wrote:
> One of the pending issues that we should address before we release GCC 7 is
> that sometimes we don't issue a warning if the location points to a macro
> defined in a system header, unless -Wsystem-headers. Consider e.g.
>
> enum { e1 = LL
On Wed, 2 Nov 2016, Ximin Luo wrote:
> +@item SOURCE_PREFIX_MAP If this variable is set, it specifies a mapping
The text should start on a separate line from the @item.
> +that is used to transform filepaths that are output in debug symbols.
> +This helps the embedded paths become reproducible,
On Wed, Nov 02, 2016 at 11:41:32AM -0400, David Edelsohn wrote:
> Any comments on ASM_WEAKEN_DECL change?
It no longer checks RS6000_WEAK, is that always on now?
Otherwise looks fine to me.
Segher
On 11/02/2016 03:55 PM, David Malcolm wrote:
Did you mean this patch:
https://gcc.gnu.org/ml/gcc-patches/2016-10/msg01358.html
That one is ok after the test, sorry for not being more clear.
Bernd
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