Renlin Li writes:
> Hi,
>
> On 08/06/16 11:21, Andreas Schwab wrote:
>> Jan Hubicka writes:
>>
>>> Bootstrapped/regtested x86_64-linux, will commit it later today.
>>
>> FAIL: gcc.dg/tree-ssa/slsr-8.c scan-tree-dump-times optimized " w?* " 7
>
> This fails for all arm and aarch64 targets as
On 20 June 2016 at 17:46, Martin Sebor wrote:
>> Since this patch was committed, I am now seeing failures on:
>> gcc.dg/gnu99-const-expr-1.c
>> gcc.dg/gnu99-static-1.c
>>
>> (targets arm, aarch64, I don't think that it should matter?)
>>
>> Can you have a look?
>
>
> Sorry about that. I missed t
Ping...
for this patch: https://gcc.gnu.org/ml/gcc-patches/2016-06/msg00871.html
I'd say it's a no-brainer...
> Hi,
>
> this fixes an ICE that happens when an asm statement tries to print
> the flags output operand.
>
> Boot-strapped and reg-tested on x86_64-linux-gnu.
> OK for trunk?
>
>
>
Hi,
I've noticed that some guards were missing on some of the AdvSIMD
tests involving fp16 code.
The attached patch fixes, although I didn't notice any difference in
validation: I have no configuration where
check_effective_target_arm_neon_fp16_ok fails.
I did locally modify this effective targe
> Committing the attached typo fix as obvious (I believe "alignement" is the
> French form).
You are right.
--
Eric Botcazou
What do we do now with the two patches? At the moment, the
functional patch depends on the changes in the cleanup patch, so
it cannot be applied on its own. Options:
(with the requested cleanup in the functional patch)
1) Apply both patches as they are now and do further cleanup on
top of
On 06/20/2016 02:08 PM, Michael Matz wrote:
P.S: Though I do feel these ROP counter measures are not much more than
security by obscurity; I guess enough obscurity indeed can at least lead
to harder to exploit programs.
I think security by obscurity is the wrong term for this. But I kind of
k
Attached patches add documentation for -mfract-convert-truncate option
and add that info to release notes (gcc-4.9 changes).
If OK, could someone commit please? I do not have commit access.
Regards,
Pitchumani
gcc/ChangeLog
2016-06-21 Pitchumani Sivanupandi
PR target/58655
* doc/inv
canonicalize_insn attempts to replace pseudo-registers with the canonical ones
during the CSE pass and it does so inside ASM_OPERANDS (only for the inputs)
and inside PARALLELs, but not inside ASM_OPERANDS which are themselves inside
a PARALLEL. The latter case occurs for targets that automatic
As of now GDB and sim cannot be built from upstream binutils-gdb repository,
so they should be disabled by default.
2016-06-21 Anton Kolesov
* configure.ac: Disable gdb and sim for ARC.
* configure: Regenerate.
---
configure| 3 +++
configure.ac | 3 +++
2 files changed, 6
ISO/IEC TS 18661-3:2015 defines C bindings to IEEE interchange and
extended types, in the form of _FloatN and _FloatNx type names with
corresponding fN/FN and fNx/FNx constant suffixes and FLTN_* / FLTNX_*
macros. This patch implements support for this feature in
GCC.
The _FloatN types, for N =
On Mon, Jun 20, 2016 at 12:46 PM, Richard Sandiford
wrote:
> Uros Bizjak writes:
>> On Mon, Jun 20, 2016 at 9:19 PM, H.J. Lu wrote:
>>> On Mon, Jun 20, 2016 at 12:13 PM, Uros Bizjak wrote:
On Mon, Jun 20, 2016 at 7:05 PM, H.J. Lu wrote:
> Hi,
>
> This patch implements the alte
On Mon, Jun 20, 2016 at 11:53 AM, H.J. Lu wrote:
> On Mon, Jun 20, 2016 at 10:31 AM, Ilya Enkovich
> wrote:
>> On 20 Jun 09:45, H.J. Lu wrote:
>>> On Mon, Jun 20, 2016 at 7:30 AM, Ilya Enkovich
>>> wrote:
>>> > 2016-06-20 16:39 GMT+03:00 Uros Bizjak :
>>> >> On Mon, Jun 20, 2016 at 1:55 PM, H.
On 15 June 2016 at 10:45, Christophe Lyon wrote:
> On 9 June 2016 at 14:46, Jakub Jelinek wrote:
>> On Thu, Jun 09, 2016 at 02:40:43PM +0200, Christophe Lyon wrote:
>>> > Bet it depends if this happens before the signal(SIGILL, sig_ill_handler);
>>> > call or after it. If before, then I guess yo
On Tue, Jun 21, 2016 at 03:10:33PM +0200, Christophe Lyon wrote:
> > Here is a new patch version, which removes the hardcoded dg-do run
> > directives,
> > so that tests use compile or run depending on the result of
> > check_vect_support_and_set_flags.
> >
> > On ARM, this first uses arm_neon_ok
ping
From: Wilco Dijkstra
Sent: 03 June 2016 11:51
To: GCC Patches
Cc: nd; philipp.toms...@theobroma-systems.com; pins...@gmail.com;
jim.wil...@linaro.org; benedikt.hu...@theobroma-systems.com; Evandro Menezes
Subject: [PATCH][AArch64] Increase code alignment
Increase loop alignment on Cor
On 21 June 2016 at 15:13, Jakub Jelinek wrote:
> On Tue, Jun 21, 2016 at 03:10:33PM +0200, Christophe Lyon wrote:
>> > Here is a new patch version, which removes the hardcoded dg-do run
>> > directives,
>> > so that tests use compile or run depending on the result of
>> > check_vect_support_and_s
On Sat, Jun 18, 2016 at 01:57:43AM +0530, Virendra Pathak wrote:
> Hi,
>
> Please find the patch for introducing vulcan as a cpu name for the
> AArch64 port of GCC.
> Broadcom's vulcan is an armv8.1-a aarch64 server processor.
>
> Since vulcan is the first armv8.1-a processor to be introduced in
When I submitted the back port to allow complex __float128 to be created on the
PowerPC to the GCC 6.2 branch, Richard Biener suggested a simpler way to set
the complex type:
https://gcc.gnu.org/ml/gcc-patches/2016-06/msg01114.html
This patch implements this change for the trunk. I have a compani
2016-06-21 15:48 GMT+03:00 H.J. Lu :
> On Mon, Jun 20, 2016 at 11:53 AM, H.J. Lu wrote:
>> On Mon, Jun 20, 2016 at 10:31 AM, Ilya Enkovich
>> wrote:
>>> On 20 Jun 09:45, H.J. Lu wrote:
On Mon, Jun 20, 2016 at 7:30 AM, Ilya Enkovich
wrote:
> 2016-06-20 16:39 GMT+03:00 Uros Bizjak
On Mon, Jun 20, 2016 at 07:16:49PM -0600, Kelvin Nilsen wrote:
> A "#define HAVE_AS_POWER9" or "#undef HAVE_AS_POWER9" preprocessor
> directive is emitted into the $GCC_BUILD/gcc/auto-host.h file at
> configuration time, depending on whether the available assembler
> supports the Power9 instruction
Hi!
Ok for trunk?
thanks,
contrib/ChangeLog
2016-06-21 Bernhard Reutner-Fischer
* update-copyright.py (Copyright.process_file): Retain original
file mode.
---
contrib/update-copyright.py | 3 +++
1 file changed, 3 insertions(+)
diff --git a/contrib/update-copyright.py b/co
Dear all,
the problem comes up with:
data a(1)[1] /1/
which is invalid. In resolve.c's check_data_variable(), one has:
if (!gfc_resolve_expr (var->expr))
return false;
...
e = var->expr;
if (e->expr_type != EXPR_VARIABLE)
gfc_internal_error ("check_data_variable(): Bad expressio
Hello,
After some changes to GCC this test no longer tests the desired code
generation behavior. The generated assembly is better than it used to
be, but it has become too smart. I add an extra parameter to make sure
GCC can't optimize away the loop.
Tested for arm-none-eabi-gcc with a Cortex-M3
Hi James,
> This patch is OK for trunk.
Thank you for the review and merging the patch to trunk.
> I couldn't spot your name in the MAINTAINERS file, so I've applied this
> on your behalf as revision 237645.
My name is not present in the MAINTAINERS file. This was my first
patch in the GCC :-)
In
On Wed, Jun 15, 2016 at 09:21:29AM +, Bin Cheng wrote:
> Hi,
> According to review comments, I split the original patch @
> https://gcc.gnu.org/ml/gcc-patches/2016-05/msg01182.html into two, as well as
> refined the comments. Here is the first one implementing vcond_mask/vec_cmp
> patterns on
On Wed, Jun 15, 2016 at 09:22:20AM +, Bin Cheng wrote:
> + rtx mask = gen_reg_rtx (mode);
> + enum rtx_code code = GET_CODE (operands[3]);
> +
> + emit_insn (gen_vec_cmp_internal (mask, operands[3],
> +operands[4], operands[5]));
> + /* See commen
On Mon, Jun 20, 2016 at 06:52:35PM +0200, Bernd Schmidt wrote:
> On 06/20/2016 12:22 PM, tbsaunde+...@tbsaunde.org wrote:
> > In theory I would expect if anything this helps performance since it isn't
> > necessary to malloc every time a node is added, however the data is less
> > clear.
>
> Well
On Mon, Jun 20, 2016 at 09:11:21PM +0100, Richard Sandiford wrote:
> tbsaunde+...@tbsaunde.org writes:
> > diff --git a/gcc/loop-iv.c b/gcc/loop-iv.c
> > index 57fb8c1..21c3180 100644
> > --- a/gcc/loop-iv.c
> > +++ b/gcc/loop-iv.c
> > @@ -1860,7 +1860,6 @@ simplify_using_initial_values (struct loo
On 06/21/2016 08:47 AM, Trevor Saunders wrote:
On Mon, Jun 20, 2016 at 06:52:35PM +0200, Bernd Schmidt wrote:
On 06/20/2016 12:22 PM, tbsaunde+...@tbsaunde.org wrote:
In theory I would expect if anything this helps performance since it isn't
necessary to malloc every time a node is added, howev
Due to recent improvements to the vectorizer, the number of vectorized
loops needs to be increased to 21 in gfortran.dg/vect/vect-8.f90.
Confirmed this test now passes on AArch64.
Commited as trivial patch in r237650.
ChangeLog:
2016-06-21 Wilco Dijkstra
* gfortran.dg/vect/vect-8.f90
On 06/21/2016 08:14 AM, Bernhard Reutner-Fischer wrote:
Hi!
Ok for trunk?
thanks,
contrib/ChangeLog
2016-06-21 Bernhard Reutner-Fischer
* update-copyright.py (Copyright.process_file): Retain original
file mode.
OK.
jeff
On 06/21/2016 02:09 AM, Bernd Edlinger wrote:
Ping...
for this patch: https://gcc.gnu.org/ml/gcc-patches/2016-06/msg00871.html
I'd say it's a no-brainer...
You might want to contact Uros directly. He does the most with the x86
backend these days.
jeff
> Fortran note: I took the conservative approach of renaming the
> float128_type_node used in the Fortran front end, since I wasn't sure
> if it's safe to make the front end always use the language-independent
> node (which follows C rules - thus, being distinct from long double
> even if that has
On Tue, 21 Jun 2016, FX wrote:
> > Fortran note: I took the conservative approach of renaming the
> > float128_type_node used in the Fortran front end, since I wasn't sure
> > if it's safe to make the front end always use the language-independent
> > node (which follows C rules - thus, being disti
Oh, yes.
Uros... ?
Thanks
Bernd.
Am 21.06.2016 um 17:04 schrieb Jeff Law:
> On 06/21/2016 02:09 AM, Bernd Edlinger wrote:
>> Ping...
>>
>> for this patch: https://gcc.gnu.org/ml/gcc-patches/2016-06/msg00871.html
>>
>> I'd say it's a no-brainer...
> You might want to contact Uros directly. He
On Tue, 21 Jun 2016, Bill Schmidt wrote:
> I haven't read through the patch in detail yet, but thank you for the
> very thorough description! For PowerPC, we currently have a lot
> invested in having __float128 correspond to KFmode for the time being,
> during the transition while supporting b
On Fri, Jun 03, 2016 at 12:39:42PM +0200, Richard Biener wrote:
> On Thu, Jun 2, 2016 at 6:53 PM, James Greenhalgh
> wrote:
> >
> > Hi,
> >
> > This patch introduces a new target hook, to be used like BRANCH_COST but
> > with a guaranteed unit of measurement. We want this to break away from
> > t
Hi,
This patch removes what is left of branch_cost uses, moving them to use
the new hook and tagging each left over spot with a TODO to revisit them.
All these uses are in rtx costs units, so we don't have more work to do at
this point.
Bootstrapped as part of the patch series on aarch64 and x86
On 06/20/2016 03:41 PM, Jeff Law wrote:
On 06/20/2016 08:56 AM, Joseph Myers wrote:
On Sat, 18 Jun 2016, Martin Sebor wrote:
the function regardless of the value of its argument). At
the same time, it seems that an even more reliable solution
than pointing out potentially unsafe calls to the
Hi,
This patch is rewrites the cost model for bb_ok_for_noce_multiple_sets
to use the max_seq_cost heuristic added in earlier patch revisions.
As with the previous patch, I've used the new parameters to ensure that
the testsuite is still testing the functionality rather than relying on
the targe
Hi,
This transformation tries two cost models, one estimating the number
of insns to use, one estimating the RTX cost of the transformed sequence.
This is inconsistent with the other cost models used in ifcvt.c and
unneccesary - eliminate the second cost model.
Thanks,
James
---
2016-06-21 Jam
Hi all,
This is a rebase of https://gcc.gnu.org/ml/gcc-patches/2016-06/msg00403.html
on top of Evandro's changes.
Also, to elaborate on the original posting, the initial tuning structure is
based on the Cortex-A57 one
but with the issue rate set to 2, FMA steering turned off and ADRP+LDR fusion
Hi,
This patch pulls the comparisons between if_info->branch_cost and a magic
number representing an instruction count to a common function. While I'm
doing it, I've documented the instructions that the magic numbers relate
to, and updated them where they were inconsistent.
If our measure of the
On 06/21/2016 09:51 AM, Martin Sebor wrote:
On 06/20/2016 03:41 PM, Jeff Law wrote:
On 06/20/2016 08:56 AM, Joseph Myers wrote:
On Sat, 18 Jun 2016, Martin Sebor wrote:
the function regardless of the value of its argument). At
the same time, it seems that an even more reliable solution
than
Hi,
This patch clears up the cost model for noce_try_cmove_arith. We lose
the "??? FIXME: Magic number 5" comment, and gain a more realistic cost
model for if-converting memory accesses.
This is the patch that has the chance to cause the largest behavioural
changes for most targets - the current
On Tue, Jun 21, 2016 at 09:57:59AM -0600, Jeff Law wrote:
> >Would a new attribute to annotate async-signal safe functions
> >help? I envision that the attribute on a function definition
> >would turn off the alloca/VLA to malloc transformation, and
> >could also diagnose calls to other function w
Hello.
I've just installed patch that does $SUBJECT.
Thanks,
Martin
>From 8302396974053dd00cd5eaff594dddf2f1ccf80b Mon Sep 17 00:00:00 2001
From: marxin
Date: Tue, 21 Jun 2016 18:05:50 +0200
Subject: [PATCH] s/imposisble/impossible in predict.c
gcc/ChangeLog:
2016-06-21 Martin Liska
* pre
Pitchumani Sivanupandi schrieb:
Attached patches add documentation for -mfract-convert-truncate option
and add that info to release notes (gcc-4.9 changes).
If OK, could someone commit please? I do not have commit access.
Regards,
Pitchumani
gcc/ChangeLog
2016-06-21 Pitchumani Sivanupandi
Fix tree-ssa/attr-hotcold-2.c failures now that the test runs.
GCC dumps the blocks 3 times so update count to 3 and the test passes.
ChangeLog:
2016-06-21 Wilco Dijkstra
gcc/testsuite/
* gcc.dg/tree-ssa/attr-hotcold-2.c (scan-tree-dump-times):
Set to 3 so test passes.
--
diff -
On Tue, Jun 21, 2016 at 04:55:43PM +0100, Kyrill Tkachov wrote:
> Hi all,
>
> This is a rebase of https://gcc.gnu.org/ml/gcc-patches/2016-06/msg00403.html
> on top of Evandro's changes.
> Also, to elaborate on the original posting, the initial tuning structure is
> based on the Cortex-A57 one but
The recently added gcc.target/aarch64/advsimd-intrinsics/vrnd*.c tests cause
failures due to accidentally running on non-ARMv8 hardware - the target check
arm_v8_neon_ok is correct for compilation tests but should be arm_v8_neon_hw
for execution tests. Fix this and also change arm_v8_neon_hw to re
On 06/21/2016 10:00 AM, Jakub Jelinek wrote:
On Tue, Jun 21, 2016 at 09:57:59AM -0600, Jeff Law wrote:
Would a new attribute to annotate async-signal safe functions
help? I envision that the attribute on a function definition
would turn off the alloca/VLA to malloc transformation, and
could als
* PING *
2016-06-06 15:05 GMT-06:00 Alessandro Fanfarillo :
> Dear all,
>
> please find in attachment the first patch (of n) for the FAILED IMAGES
> capability defined in the coarray TS 18508.
> The patch adds support for three new intrinsic functions defined in
> the TS for simulating a failure (
[Changes in version 2 of the patch:
* PowerPC always uses KFmode for _Float128 and _Float64x when those
types are supported, not TFmode.
* More thorough checking for back ends using too-low precision values
for modes, to avoid that causing too-low precision values for types.
* Patch descript
This patch adds instruction scheduling support for the Power9 processor.
Bootstrap/regression tested on powerpc64/powerpc64le with no new failures. Ok
for trunk? Ok for backport to GCC 6 branch after successful bootstrap/regtest
there?
-Pat
2016-06-21 Pat Haugen
* config/rs6000/po
Dear Tobias,
"Beauty is in the eye of the beholder!" It works, it's good :-)
OK for trunk
Thanks for the patch
Paul
PS Why, in principle, can data objects not have co-indices?
On 21 June 2016 at 16:15, Tobias Burnus
wrote:
> Dear all,
>
> the problem comes up with:
>data a(1)[1] /1/
> wh
Concept code also needs some updates to accommodate my GCC 7 fix for
10200. First, and not limited to concepts, we need to treat a member
template as dependent if its signature depends on template parameters of
its enclosing class (which, more importantly, are template parameters of
the scope
Dear Paul,
Paul Richard Thomas wrote:
Thanks for the patch
Thanks also from my side.
PS Why, in principle, can data objects not have co-indices?
I think there is no really fundamental reason, but it doesn't make
really sense. DATA is an explicit initialization, similar to
"integer :: i
On Tue, Jun 21, 2016 at 2:40 PM, H.J. Lu wrote:
> On Mon, Jun 20, 2016 at 12:46 PM, Richard Sandiford
> wrote:
>> Uros Bizjak writes:
>>> On Mon, Jun 20, 2016 at 9:19 PM, H.J. Lu wrote:
On Mon, Jun 20, 2016 at 12:13 PM, Uros Bizjak wrote:
> On Mon, Jun 20, 2016 at 7:05 PM, H.J. Lu wr
On Thu, Jun 16, 2016 at 10:06:48PM +, Joseph Myers wrote:
> On Wed, 15 Jun 2016, Michael Meissner wrote:
>
> > Note, I do feel the front ends should be modified to allow __complex
> > __float128
> > directly rather than having to use an attribute to force the complex type
> > (and
> > to use
I've pushed my work-in-progress integration branch to jason/concepts-rewrite.
Jason
On Mon, Jun 20, 2016 at 4:28 PM, Jason Merrill wrote:
> On Fri, Mar 25, 2016 at 1:33 AM, Andrew Sutton
> wrote:
>> I'll just leave this here...
>>
>> This patch significantly improves performance with concepts
On Tue, Jun 21, 2016 at 11:22 AM, Uros Bizjak wrote:
> On Tue, Jun 21, 2016 at 2:40 PM, H.J. Lu wrote:
>> On Mon, Jun 20, 2016 at 12:46 PM, Richard Sandiford
>> wrote:
>>> Uros Bizjak writes:
On Mon, Jun 20, 2016 at 9:19 PM, H.J. Lu wrote:
> On Mon, Jun 20, 2016 at 12:13 PM, Uros Bizj
On 06/21/2016 07:48 AM, Michael Meissner wrote:
When I submitted the back port to allow complex __float128 to be created on the
PowerPC to the GCC 6.2 branch, Richard Biener suggested a simpler way to set
the complex type:
https://gcc.gnu.org/ml/gcc-patches/2016-06/msg01114.html
This patch imple
On 06/15/2016 08:22 AM, Kuba Sejdak wrote:
This patch disables libgcj and libgloss in main configure.ac for new OS port -
Phoenix-RTOS.
Those libs are unnecessary to build GCC or newlib for arm-phoenix.
Is it ok for trunk? If possible, If possible, please merge it also to GCC-6 and
GCC-5 branc
On 06/15/2016 08:22 AM, Kuba Sejdak wrote:
Is it ok for trunk? If possible, If possible, please merge it also to GCC-6 and
GCC-5 branches.
2016-06-15 Jakub Sejdak
* config.gcc: Add support for arm*-*-phoenix* targets.
* config/arm/t-phoenix: New.
* config/phoenix.h: New.
---
gcc/
On 06/15/2016 08:22 AM, Kuba Sejdak wrote:
Is it ok for trunk? If possible, If possible, please merge it also to GCC-6 and
GCC-5 branches.
2016-06-15 Jakub Sejdak
* config.host: Add suport for arm*-*-phoenix* targets.
OK for the trunk.
jeff
Hi,
I discovered recently that, with -mcpu=power9, an attempt to generate a
vspltish instruction resulted instead in an xxspltib followed by a vupkhsb.
This is semantically correct but the extra instruction is not optimal. I found
that there was some logic in xxspltib_constant_p to do special
On Tue, Jun 21, 2016 at 05:41:36PM +, Joseph Myers wrote:
> [Changes in version 2 of the patch:
>
> * PowerPC always uses KFmode for _Float128 and _Float64x when those
> types are supported, not TFmode.
While from one perspective, it would have been cleaner if the PowerPC
had separate inter
On Tue, 21 Jun 2016, Michael Meissner wrote:
> > I'm now working on support for TS 18661-3 _FloatN / _FloatNx type names
> > (keywords), constant suffixes and addiitions. That will
> > address, for C, the need to use modes for complex float128 (bug 32187) by
> > allowing the standard _Complex
On 06/16/2016 05:06 AM, Ilya Enkovich wrote:
Hi,
This patch fixes incorrect comparison vectorization for booleans.
The problem is that regular comparison which works for scalars
doesn't work for vectors due to different binary representation.
Also this never works for scalar masks.
This patch r
On Tue, 21 Jun 2016, Michael Meissner wrote:
> While from one perspective, it would have been cleaner if the PowerPC
> had separate internal types for IBM extended double and IEEE 128-bit floating
> point. But the way the compiler has been implemented is that TFmode is which
> ever type is the de
On 06/16/2016 08:47 AM, Bernd Edlinger wrote:
Hi!
By the design of the target hook INITIAL_ELIMINATION_OFFSET
it is necessary to call this function several times with
different register combinations.
Most targets use a cached data structure that describes the
exact frame layout of the current f
On June 21, 2016 5:50:26 PM GMT+02:00, James Greenhalgh
wrote:
>
>On Fri, Jun 03, 2016 at 12:39:42PM +0200, Richard Biener wrote:
>> On Thu, Jun 2, 2016 at 6:53 PM, James Greenhalgh
>> wrote:
>> >
>> > Hi,
>> >
>> > This patch introduces a new target hook, to be used like
>BRANCH_COST but
>> > w
On 06/15/2016 05:47 AM, Jakub Jelinek wrote:
On Tue, Jun 14, 2016 at 11:13:28AM -0600, Martin Sebor wrote:
Here is an untested patch for that. Except that the middle-end considers
conversions between BOOLEAN_TYPE and single bit unsigned type as useless,
so in theory this can't work well, and in
More specifically the ??? comment:
/* ??? Copy and original type are not supposed to be variant but we
really need a variant for the placeholder machinery to work. */
if (TYPE_IS_FAT_POINTER_P (t))
tt = build_variant_type_copy (t);
else
On 06/14/2016 09:15 AM, David Malcolm wrote:
This patch introduces a new lookup_name_fuzzy function to the
C frontend and uses it to provides suggestions for various error
messages that may be due to misspellings, and also for the
warnings in implicit_decl_warning.
This latter part may be contro
On 06/13/2016 11:40 AM, Mike Frysinger wrote:
The current header depends on glibc version checks to determine whether
execinfo.h exists which breaks uClibc. Instead, add an explicit configure
check for it.
2015-08-29 Mike Frysinger
* configure.ac: Call AC_CHECK_HEADERS([execinfo.h])
On 05/27/2016 05:56 AM, Richard Biener wrote:
On Fri, May 27, 2016 at 1:11 PM, Bin.Cheng wrote:
On Fri, May 27, 2016 at 11:45 AM, Richard Biener
wrote:
On Wed, May 25, 2016 at 1:22 PM, Bin Cheng wrote:
Hi,
As analyzed in PR68303 and PR69710, vectorizer generates duplicated
computations in
On 06/06/2016 05:23 AM, Bin.Cheng wrote:
Hi Jeff,
What's your opinion on this (and how to extend it to a region based
interface)? I will update this patch for further review if you are
okay.
I've never pondered how to revamp DOM into a regional interface (though
I have pondered how to revamp t
On 05/26/2016 10:16 AM, Nick Clifton wrote:
Hi Jeff,
I may be missing something, but isn't it the transition to an FP
relative address rather than a SP relative address that's the problem
here?
Yes, I believe so.
Where does that happen?
I think that it happens in dwarf2out.c:based_loc_des
On 05/24/2016 03:14 AM, Richard Biener wrote:
On Wed, 18 May 2016, Richard Biener wrote:
The following adjusts get_alias_set beahvior when applied to
union accesses to use the union alias-set rather than alias-set
zero. This is in line with behavior from the alias oracle
which (bogously) circ
On 05/20/2016 12:09 PM, John David Anglin wrote:
On 2016-05-18 2:20 AM, Jakub Jelinek wrote:
On Tue, May 17, 2016 at 08:31:00PM -0400, John David Anglin wrote:
>r235550 introduced the use of long long, and the macros LLONG_MIN
and LLONG_MAX. These macros
>are not defined by default and we need
On 06/21/2016 03:35 AM, Dominik Vogt wrote:
What do we do now with the two patches? At the moment, the
functional patch depends on the changes in the cleanup patch, so
it cannot be applied on its own. Options:
(with the requested cleanup in the functional patch)
1) Apply both patches as they
On Tue, Jun 21, 2016 at 03:14:51PM -0500, Bill Schmidt wrote:
> I discovered recently that, with -mcpu=power9, an attempt to generate a
> vspltish instruction resulted instead in an xxspltib followed by a vupkhsb.
> This is semantically correct but the extra instruction is not optimal. I
> fou
On 06/15/2016 02:52 AM, Richard Sandiford wrote:
This is the main patch in the series. It adds a new enum and routines
for classifying a vector load or store implementation.
Tested on aarch64-linux-gnu and x86_64-linux-gnu. OK to install?
Thanks,
Richard
gcc/
* tree-vectorizer.h (ve
On 06/15/2016 02:53 AM, Richard Sandiford wrote:
This patch uses the vect_memory_access_type from patch 6 to represent
the effect of a negative contiguous stride or a zero stride. The latter
is valid only for loads.
Tested on aarch64-linux-gnu and x86_64-linux-gnu. OK to install?
Thanks,
Rich
> On Jun 21, 2016, at 5:34 PM, Segher Boessenkool
> wrote:
>
> On Tue, Jun 21, 2016 at 03:14:51PM -0500, Bill Schmidt wrote:
>> I discovered recently that, with -mcpu=power9, an attempt to generate a
>> vspltish instruction resulted instead in an xxspltib followed by a vupkhsb.
>> This is se
On 21 Jun 2016 15:46, Jeff Law wrote:
> On 06/13/2016 11:40 AM, Mike Frysinger wrote:
> > The current header depends on glibc version checks to determine whether
> > execinfo.h exists which breaks uClibc. Instead, add an explicit configure
> > check for it.
> >
> > 2015-08-29 Mike Frysinger
> >
On 06/10/2016 10:56 AM, Andrew Burgess wrote:
The global flag `user_defined_section_attribute' is set while parsing C
code when the section attribute is encountered. The flag is set when
anything has the section attribute applied to it, functions or data.
The only place this global was used was
On 06/10/2016 10:56 AM, Andrew Burgess wrote:
* gcc/bb-reorder.c (pass_partition_blocks::gate): Update comment.
Thanks. Installed.
jeff
Both GCC and Clang can emit "fix-it" hints for a diagnostic, giving
a suggestion about how to fix the issue.
Clang has an option -fdiagnostics-parseable-fixits, which emits a
machine-readable version of the fixits, for use by IDEs. (The only
IDE I know of that supports this format is Xcode [1]; d
On 06/06/2016 02:16 AM, Rainer Orth wrote:
The following patches have remained unreviewed for a week:
[gotools, libcc1] Update copyright dates
https://gcc.gnu.org/ml/gcc-patches/2016-05/msg02307.html
Everything bug the gotools changes are OK. THe master bits for gotools
is outs
On 06/03/2016 05:24 AM, Marcin Baczyński wrote:
Hi,
the patch below fixes PR/42014. Although the fix itself seems easy enough,
I have a problem with the test. Is there a way to match the output before
the "warning:" line? dg-{begin,end}-multiline-output doesn't do the job, or
at least I don't kno
On 06/21/2016 06:59 PM, Mike Frysinger wrote:
On 21 Jun 2016 15:46, Jeff Law wrote:
If accepted into upstream Boehm-GC, then this is obviously acceptable in
GCC's copy.
so changes can be pushed directly if it's already in upstream ?
my original goal is already fixed in upstream, but it's not
On 06/01/2016 04:46 AM, kugan wrote:
Hi All,
Factoring out CONVERT_EXPR introduced a regression for (PR66726). I had
to revert my previous patch due to some regressions. This is a much
simplified version compared to the one I reverted.
There is a test-case (pr46309.c) in the test-suite which i
On 05/04/2016 09:17 AM, Bernd Schmidt wrote:
On 04/25/2016 10:18 PM, Joseph Myers wrote:
On Fri, 22 Apr 2016, Bernd Schmidt wrote:
+/* Returns the smallest location != UNKNOWN_LOCATION in LOCATIONS,
+ considering only those c_declspec_words found in LIST, which
+ must be terminated by cdw_
On 06/21/16 23:29, Jeff Law wrote:
> On 06/16/2016 08:47 AM, Bernd Edlinger wrote:
>> Hi!
>>
>>
>> By the design of the target hook INITIAL_ELIMINATION_OFFSET
>> it is necessary to call this function several times with
>> different register combinations.
>> Most targets use a cached data structure
On Tue, Jun 21, 2016 at 08:55:15PM -0600, Jeff Law wrote:
> user_defined_section_attribute was introduced as part of the hot/cold
> partitioning changes.
>
> https://gcc.gnu.org/ml/gcc-patches/2004-07/msg01545.html
>
>
> What's supposed to happen is hot/cold partitioning is supposed to be turned
Hello!
> this fixes an ICE that happens when an asm statement tries to print
> the flags output operand.
> gcc:
> 2016-06-11 Bernd Edlinger
>
> * config/i386/i386.c (print_reg): Emit an error message on attempt to
> print FLAGS_REG.
>
> testsuite:
> 2016-06-11 Bernd Edlinger
>
> * gcc.targe
1 - 100 of 102 matches
Mail list logo