[PATCH] Fix PR69157

With the work-around-limited-IL patch I put in earlier we now need to cope with dt_external stmts (in self-referencing SLPs). Thus keep the def-type check to the analysis phase (larger refactoring to split analysis and transform phase more properly is not appropriate at this stage). Bootstrapped

[PATCH] Fix PR69174

This fixes an oversight in strided permuted SLP loads which miscomputed the number of required loads. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2016-01-12 Richard Biener PR tree-optimization/69174 * tree-vect-stmts.c (vect_mark_relevant): Remove

[PATCH] Fix PR69168

The following fixes the assumption that we consistently have patterns used in SLP. That's not true given we skip them if the original def is life or relevant during SLP analysis. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2016-01-12 Richard Biener PR tre

[PATCH, testsuite] Stabilize test result output of dump-noaddr

Hi, Everytime the static pass number of passes change, testsuite output for dump- noaddr will change, leading to a series of noise lines like the following under dg-cmp-results: PASS->NA: gcc.c-torture/unsorted/dump-noaddr.c.036t.fre1, -O1 comparison PASS->NA: gcc.c-torture/unsorted/dump-noadd

RE: [PATCH, libgcc/ARM 1/6] Fix Thumb-1 only == ARMv6-M & Thumb-2 only == ARMv7-M assumptions

> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- > ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme > Sent: Thursday, December 17, 2015 1:58 PM > > Hi, > > We decided to apply the following patch to the ARM embedded 5 branch. > This is *not* intended for trunk for now. We will send a

Re: [PATCH, ARM] Fox target/69180] #pragma GCC target should not warn about redefined macros

On 12/01/16 09:00, Christian Bruel wrote: On 01/11/2016 03:37 PM, Kyrill Tkachov wrote: On 11/01/16 12:54, Christian Bruel wrote: Hi Kyrill, On 01/11/2016 12:32 PM, Kyrill Tkachov wrote: Hi Christian, On 07/01/16 15:40, Christian Bruel wrote: as discussed with Kyrill (https://gcc.gnu.org/

Ping: check initializer to be zero in .bss-like sections

>>> On 10.12.15 at 08:21, wrote: > Just like gas, which has recently learned to reject such initializers, > gcc shouldn't accept such either. > --- > The only question really is whether the new test case should be limited > to certain targets - I haven't been able to figure out possible valid > qu

[PATCH, PR69110] Don't return NULL access_fns in dr_analyze_indices

Hi, This patch fixes PR69110, a wrong-code bug in autopar. I. consider testcase test.c: ... #define N 1000 unsigned int i = 0; static void __attribute__((noinline, noclone)) foo (void) { unsigned int z; for (z = 0; z < N; ++z) ++i; } extern void abort (void); int main (void) { f

Re: [Patch ifcvt] Add a new parameter to limit if-conversion

gcc.dg/ifcvt-5.c fails on ia64: >From ifcvt-5.c.223r.ce1: == Pass 2 == == no more changes 1 possible IF blocks searched. 1 IF blocks converted. 2 true changes made. Andreas. -- Andreas Schwab, SUSE Labs, sch...@suse.de GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE

[PATCH] Handle inter-block notes before BARRIER in rtl merge_blocks (PR target/69175, take 2)

On Sat, Jan 09, 2016 at 12:27:02AM +0100, Bernd Schmidt wrote: > Well, I checked a bit more. Most callers of merge_blocks seem to already > look for barriers if they are a concern and remove them. This occurs > multiple times in ifcvt.c and cfgcleanup.c. Oddly, > merge_blocks_move_predecessor_nojum

Re: Backport: [Patch AArch64] Reinstate CANNOT_CHANGE_MODE_CLASS to fix pr67609

On 18 December 2015 at 12:13, James Greenhalgh wrote: > Looking back at the patch just before I hit commit, the 4.9 backport was > a little different (as we still have a CANNOT_CHANGE_MODE_CLASS there). > We can drop the aarch64-protos.h and aarch64.h changes, and we need to > change the sense of

[PATCH] [RTEMS] Add Cortex-M7 multilib for FPU support

gcc/ChangeLog 2016-01-12 Sebastian Huber * config/arm/t-rtems: Add cortex-m7/fpv5-d16 multilib. --- gcc/config/arm/t-rtems | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/gcc/config/arm/t-rtems b/gcc/config/arm/t-rtems index 3b62181..02dcd65 100644 --- a/gcc/co

Re: [PATCH] PR target/69225: Set FLT_EVAL_METHOD to 2 only if 387 FPU is used

On Tue, Jan 12, 2016 at 1:15 AM, Joseph Myers wrote: > On Mon, 11 Jan 2016, H.J. Lu wrote: > >> Here is the updated patch. Joseph, is this OK? > > I have no objections to this patch. Thinking some more, it looks to me that we also have to return 2 when SSE2 (SSE doubles) is not enabled. I'm tes

Re: [PATCH] PR target/69225: Set FLT_EVAL_METHOD to 2 only if 387 FPU is used

On Tue, Jan 12, 2016 at 12:10:20PM +0100, Uros Bizjak wrote: > On Tue, Jan 12, 2016 at 1:15 AM, Joseph Myers wrote: > > On Mon, 11 Jan 2016, H.J. Lu wrote: > > > >> Here is the updated patch. Joseph, is this OK? > > > > I have no objections to this patch. > > Thinking some more, it looks to me t

Re: [PATCH, PR69110] Don't return NULL access_fns in dr_analyze_indices

On Tue, 12 Jan 2016, Tom de Vries wrote: > Hi, > > This patch fixes PR69110, a wrong-code bug in autopar. > > > I. > > consider testcase test.c: > ... > #define N 1000 > > unsigned int i = 0; > > static void __attribute__((noinline, noclone)) > foo (void) > { > unsigned int z; > > for (

Re: [PATCH] Cleanup vect testsuite includes

On Mon, Jan 11, 2016 at 3:01 PM, Alan Lawrence wrote: > This was an attempt to make more of the vect testsuite compilable with a > stage-1 > compiler, i.e. without standard header files like stdlib.h, to ease looking > for > differences in assembly output. (It is still necessary to comment out m

Re: [Patch AArch64] Use software sqrt expansion always for -mlow-precision-recip-sqrt

On Mon, Jan 11, 2016 at 04:57:56PM -0600, Evandro Menezes wrote: > On 01/11/2016 05:53 AM, James Greenhalgh wrote: > >I'd like to switch the logic around in aarch64.c such that > >-mlow-precision-recip-sqrt causes us to always emit the low-precision > >software expansion for reciprocal square root.

Re: [PATCH PR68911]Check overflow when computing range information from loop niter bound

On Mon, Jan 11, 2016 at 5:11 PM, Bin Cheng wrote: > Hi, > A wrong code bug is reported in PR68911, which GCC generates infinite loop > for below example after loop niter analysis changes. After that change, > scev_probably_wraps_p identifies that e_1 in below case never overflow/wrap: > : >

[PATCH, PING] DWARF: process all TYPE_DECL nodes when iterating on scopes

Hello, Ping for the patch submitted in . Thanks! -- Pierre-Marie de Rodat

[PATCH] Fix PR69007

The following fixes fallout by no longer overwriting detected patterns. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2016-01-12 Richard Biener PR tree-optimization/69007 * tree-vect-patterns.c (vect_vect_recog_func_ptrs): Move widen_sum afte

[PATCH] Fix PR69053

Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2016-01-12 Richard Biener PR tree-optimization/69053 * tree-vect-loop.c (get_initial_def_for_reduction): Properly convert initial value for cond reductions. * g++.dg/torture/pr69053.C: New

Re: [Patch AArch64] Use software sqrt expansion always for -mlow-precision-recip-sqrt

Hi all, On 12/01/16 11:32, James Greenhalgh wrote: On Mon, Jan 11, 2016 at 04:57:56PM -0600, Evandro Menezes wrote: On 01/11/2016 05:53 AM, James Greenhalgh wrote: I'd like to switch the logic around in aarch64.c such that -mlow-precision-recip-sqrt causes us to always emit the low-precision s

Re: [PATCH, testsuite] Stabilize test result output of dump-noaddr

On Jan 12, 2016, at 12:48 AM, Thomas Preud'homme wrote: > This patch solve this problem by replacing the static pass number in the > output by a star, allowing for a stable output while retaining easy copy/ > pasting in shell. > Is this ok for stage3? Ok.

Re: [PR tree-optimization/64946] Push integer type conversion to ABS_EXPR argument when possible.

On 11/01/16 17:46, Richard Biener wrote: On January 11, 2016 5:36:33 PM GMT+01:00, Bernd Schmidt wrote: On 01/11/2016 05:33 PM, Matthew Wahab wrote: The case I'm trying to fix has (short)abs((int)short_var). I'd thought that if abs(short_var) was undefined because the result couldn't be r

Re: [Patch AArch64] Use software sqrt expansion always for -mlow-precision-recip-sqrt

On Tue, Jan 12, 2016 at 05:53:21AM +, Kumar, Venkataramanan wrote: > Hi James, > > > -Original Message- > > From: James Greenhalgh [mailto:james.greenha...@arm.com] > > Sent: Monday, January 11, 2016 5:24 PM > > To: gcc-patches@gcc.gnu.org > > Cc: n...@arm.com; marcus.shawcr...@arm.com

[PATCH, i386, AVX512] PR target/69228: Restrict default masks for prefetch gathers/scatters instructions.

This patch addresses PR target/69228. Expanding non-mask builtins for prefetch gather/scatter insns results in using default mask. Although Intel ISA Extensions Programming Reference statement about EVEX.aaa field in prefetch gather/scatter insns encoding is a bit opaque, no default mask is allowed

Re: [RFC][ARM][PR67714] signed char is zero-extended instead of sign-extended

Hi Kugan, On 12/01/16 06:22, kugan wrote: When promote_function_mode and promote_ssa_mode changes the sign differently, following is the cause for the problem in PR67714. _8 = fn1D.5055 (); f_13 = _8; function returns -15 and in _8 it is sign extended. In the second statement, we say tha

Re: [RFC][ARM][PR67714] signed char is zero-extended instead of sign-extended

On Tue, Jan 12, 2016 at 12:04:22PM +, Kyrill Tkachov wrote: > >2016-01-12 Kugan Vivekanandarajah > > > >* expr.c (expand_expr_real_1): Fix promoted sign in SUBREG_PRMOTED I'd like to just point at the ChangeLog typo - PRMOTED instead of PROMOTED. Jakub

Re: [RFC][ARM][PR67714] signed char is zero-extended instead of sign-extended

On 12/01/16 12:08, Jakub Jelinek wrote: On Tue, Jan 12, 2016 at 12:04:22PM +, Kyrill Tkachov wrote: 2016-01-12 Kugan Vivekanandarajah * expr.c (expand_expr_real_1): Fix promoted sign in SUBREG_PRMOTED I'd like to just point at the ChangeLog typo - PRMOTED instead of PROMOTED. Sin

Re: [PATCH] PR target/69225: Set FLT_EVAL_METHOD to 2 only if 387 FPU is used

On Tue, Jan 12, 2016 at 12:18 PM, Jakub Jelinek wrote: > On Tue, Jan 12, 2016 at 12:10:20PM +0100, Uros Bizjak wrote: >> On Tue, Jan 12, 2016 at 1:15 AM, Joseph Myers >> wrote: >> > On Mon, 11 Jan 2016, H.J. Lu wrote: >> > >> >> Here is the updated patch. Joseph, is this OK? >> > >> > I have no

Re: [PATCH : RL78] Disable interrupts during hardware multiplication routines

Hi Kaushik, +/* Structure for G13 MDUC registers. */ +struct mduc_reg_type +{ + unsigned int address; + enum machine_mode mode; + bool is_volatile; +}; + +struct mduc_reg_type mduc_regs[NUM_OF_MDUC_REGS] = + {{0xf00e8, QImode, true}, + {0x0, HImode, true}, + {0x2, HImode, true}

Re: [PATCH] Handle inter-block notes before BARRIER in rtl merge_blocks (PR target/69175, take 2)

On 01/12/2016 11:17 AM, Jakub Jelinek wrote: PR target/69175 * ifcvt.c (cond_exec_process_if_block): When removing the last insn from then_bb, remove also any possible barriers that follow it. * g++.dg/opt/pr69175.C: New test. Ok. Bernd

Re: [PATCH] Be less conservative in process_{output,input}_constraints (PR target/65689)

On Wed, Apr 08, 2015 at 11:00:59PM +0200, Jakub Jelinek wrote: > Hi! > > Right now, stmt.c on constraints not hardcoded in it, and not > define_{register,address,memory}_constraint just assumes the > constraint might allow both reg and mem. Unfortunately, on some > constraints which clearly can't

Re: [PATCH] PR target/69225: Set FLT_EVAL_METHOD to 2 only if 387 FPU is used

On Tue, Jan 12, 2016 at 1:12 PM, Uros Bizjak wrote: > On Tue, Jan 12, 2016 at 12:18 PM, Jakub Jelinek wrote: >> On Tue, Jan 12, 2016 at 12:10:20PM +0100, Uros Bizjak wrote: >>> On Tue, Jan 12, 2016 at 1:15 AM, Joseph Myers >>> wrote: >>> > On Mon, 11 Jan 2016, H.J. Lu wrote: >>> > >>> >> Here i

Re: [PATCH] Be less conservative in process_{output,input}_constraints (PR target/65689)

On Tue, Jan 12, 2016 at 12:30:20PM +, James Greenhalgh wrote: > > 2015-04-08 Jakub Jelinek > > > > PR target/65689 > > * genpreds.c (struct constraint_data): Add maybe_allows_reg and > > maybe_allows_mem bitfields. > > (maybe_allows_none_start, maybe_allows_none_end, > >

Re: [PATCH] PR target/69225: Set FLT_EVAL_METHOD to 2 only if 387 FPU is used

On Tue, Jan 12, 2016 at 01:32:05PM +0100, Uros Bizjak wrote: > Using this patch, SSE math won't be emitted for a simple testcase > using " -O2 -msse -m32 -std=c99 -mfpmath=sse" compile flags: > > float test (float a, float b) > { > return a + b; > } > > since we start with: > > test (float a,

Re: [PATCH, PR69110] Don't return NULL access_fns in dr_analyze_indices

On 12/01/16 12:22, Richard Biener wrote: Doesnt' the same issue apply to >unsigned int *p; > >static void __attribute__((noinline, noclone)) >foo (void) >{ > unsigned int z; > > for (z = 0; z < N; ++z) > ++(*p); >} thus when we have a MEM_REF[p_1]? SCEV will not analyze its evolution

C++ PATCH to abate shift warnings (PR c++/68979)

Seems that people find compile-time error on the following testcase overly pedantic. I.e. that "enum A { X = -1 << 1 };" should compile, at least with -fpermissive. So I've changed the error_at into permerror and the return value of cxx_eval_check_shift_p now depends on flag_permissive. Luckily,

Re: [hsa 2/10] Modifications to libgomp proper

Hello, Martin, Jakub, community, This part of the patch: On Mon, 7 Dec 2015, Martin Jambor wrote: > include/ > * gomp-constants.h (GOMP_DEVICE_HSA): New macro. [snip] > (GOMP_kernel_launch_attributes): New type. > (GOMP_hsa_kernel_dispatch): New type. is going to break build of

Re: C++ PATCH to abate shift warnings (PR c++/68979)

On Tue, Jan 12, 2016 at 01:52:01PM +0100, Marek Polacek wrote: > --- gcc/testsuite/g++.dg/warn/permissive-1.C > +++ gcc/testsuite/g++.dg/warn/permissive-1.C > @@ -0,0 +1,8 @@ > +// PR c++/68979 > +// { dg-do compile } > +// { dg-options "-fpermissive -Wno-shift-overflow -Wno-shift-count-overflow >

Re: [PATCH, PR69110] Don't return NULL access_fns in dr_analyze_indices

On Tue, 12 Jan 2016, Tom de Vries wrote: > On 12/01/16 12:22, Richard Biener wrote: > > Doesnt' the same issue apply to > > > > > >unsigned int *p; > > > > > > > >static void __attribute__((noinline, noclone)) > > > >foo (void) > > > >{ > > > > unsigned int z; > > > > > > > > for (z = 0; z <

Re: [hsa 2/10] Modifications to libgomp proper

On Tue, Jan 12, 2016 at 04:00:11PM +0300, Alexander Monakov wrote: > Hello, Martin, Jakub, community, > > This part of the patch: > > On Mon, 7 Dec 2015, Martin Jambor wrote: > > include/ > > * gomp-constants.h (GOMP_DEVICE_HSA): New macro. > [snip] > > (GOMP_kernel_launch_attributes): Ne

Re: [PATCH] PR target/69225: Set FLT_EVAL_METHOD to 2 only if 387 FPU is used

On Tue, Jan 12, 2016 at 1:43 PM, Jakub Jelinek wrote: > On Tue, Jan 12, 2016 at 01:32:05PM +0100, Uros Bizjak wrote: >> Using this patch, SSE math won't be emitted for a simple testcase >> using " -O2 -msse -m32 -std=c99 -mfpmath=sse" compile flags: >> >> float test (float a, float b) >> { >> re

Re: C++ PATCH to abate shift warnings (PR c++/68979)

On Tue, Jan 12, 2016 at 02:02:16PM +0100, Jakub Jelinek wrote: > On Tue, Jan 12, 2016 at 01:52:01PM +0100, Marek Polacek wrote: > > --- gcc/testsuite/g++.dg/warn/permissive-1.C > > +++ gcc/testsuite/g++.dg/warn/permissive-1.C > > @@ -0,0 +1,8 @@ > > +// PR c++/68979 > > +// { dg-do compile } > > +/

Re: [Patch ifcvt] Add a new parameter to limit if-conversion

Andreas, Is it OK for you if we exclude dg/ifcvt-5.c from ia64 testing since predication must be used instead of conditional move's. 2016-01-12 13:07 GMT+03:00 Andreas Schwab : > gcc.dg/ifcvt-5.c fails on ia64: > > From ifcvt-5.c.223r.ce1: > > == Pass 2 == > > > == no more

Re: [PATCH] Fix memory alignment on AVX512VL masked floating point stores (PR target/69198)

Hello Jakub On 08 Jan 21:20, Jakub Jelinek wrote: > Hi! > > This patch fixes > FAIL: gcc.target/i386/avx512vl-vmovapd-1.c scan-assembler-times vmovapd[ > t]+[^{\\n]*%xmm[0-9]+[^\\n]*){%k[1-7]}(?:\\n|[ t]+#) 1 > FAIL: gcc.target/i386/avx512vl-vmovapd-1.c scan-assembler-times vmovapd[

[Committed, PATCH] Define STDINT_LONG32 and add predefined integer types for IAMCU

Define STDINT_LONG32 to 0, add SIZE_TYPE, PTRDIFF_TYPE and WCHAR_TYPE for IAMCU to make integer types compatible with i386 Linux. Checked into trunk. H.J. PR target/68456 PR target/69226 * config/i386/iamcu.h (SIZE_TYPE): New macro. (PTRDIFF_TYPE): Likewise.

Re: C++ PATCH to abate shift warnings (PR c++/68979)

Changing the diagnostic is OK, but cxx_eval_check_shift_p should return true regardless of flag_permissive, so that SFINAE results follow the standard. Jason

Re: [C++ PATCH] Fix ICE due to Cilk+ related cp_gimplify_expr bug (PR objc++/68511, PR c++/69213)

OK. Jason

Re: [hsa 2/10] Modifications to libgomp proper

On Tue, Jan 12, 2016 at 02:29:06PM +0100, Martin Jambor wrote: > GOMP_kernel_launch_attributes should not be there (it is a > reminiscence from before the device-specific target arguments) and > should be moved just to the HSA plugin. I'll prepare a patch today. > > While we do not have to share

Re: [PATCH] Fix memory alignment on AVX512VL masked floating point stores (PR target/69198)

On Tue, Jan 12, 2016 at 5:12 AM, Kirill Yukhin wrote: > Hello Jakub > On 08 Jan 21:20, Jakub Jelinek wrote: >> Hi! >> >> This patch fixes >> FAIL: gcc.target/i386/avx512vl-vmovapd-1.c scan-assembler-times vmovapd[ >> t]+[^{\\n]*%xmm[0-9]+[^\\n]*){%k[1-7]}(?:\\n|[ t]+#) 1 >> FAIL: gcc.

Re: [PATCH] Fix memory alignment on AVX512VL masked floating point stores (PR target/69198)

On Tue, Jan 12, 2016 at 05:39:29AM -0800, H.J. Lu wrote: > GCC 5 has the same issue. This patch should be backported to GCC 5 > with > > https://gcc.gnu.org/ml/gcc-patches/2016-01/msg00528.html > > which supersedes: > > https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=231269 > > OK to ba

Re: [PATCH] Fix memory alignment on AVX512VL masked floating point stores (PR target/69198)

On Tue, Jan 12, 2016 at 2:42 PM, Jakub Jelinek wrote: > On Tue, Jan 12, 2016 at 05:39:29AM -0800, H.J. Lu wrote: >> GCC 5 has the same issue. This patch should be backported to GCC 5 >> with >> >> https://gcc.gnu.org/ml/gcc-patches/2016-01/msg00528.html >> >> which supersedes: >> >> https://gcc.g

Re: [hsa 2/10] Modifications to libgomp proper

Hi, On Fri, Dec 11, 2015 at 07:05:29PM +0100, Jakub Jelinek wrote: > On Thu, Dec 10, 2015 at 06:52:23PM +0100, Martin Jambor wrote: > > > > --- a/libgomp/task.c > > > > +++ b/libgomp/task.c > > > > @@ -581,6 +581,7 @@ GOMP_PLUGIN_target_task_completion (void *data) > > > >gomp_mutex_unlock

Re: [Patch ifcvt] Add a new parameter to limit if-conversion

Yuri Rumyantsev writes: > Is it OK for you if we exclude dg/ifcvt-5.c from ia64 testing Sure, go ahead. Andreas. -- Andreas Schwab, SUSE Labs, sch...@suse.de GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7 "And now for something completely different."

Re: C++ PATCH to abate shift warnings (PR c++/68979)

On Tue, Jan 12, 2016 at 08:27:47AM -0500, Jason Merrill wrote: > Changing the diagnostic is OK, but cxx_eval_check_shift_p should return true > regardless of flag_permissive, so that SFINAE results follow the standard. There's a complication, because if I keep returning true, we'll give a compile-

Re: C++ PATCH to abate shift warnings (PR c++/68979)

On 01/12/2016 09:05 AM, Marek Polacek wrote: On Tue, Jan 12, 2016 at 08:27:47AM -0500, Jason Merrill wrote: Changing the diagnostic is OK, but cxx_eval_check_shift_p should return true regardless of flag_permissive, so that SFINAE results follow the standard. There's a complication, because if

[gomp4] fix kernel reductions

This patch fixes an ICE encountered with the Houston's testsuite when kernel optimizations are enabled. The reduction is implemented via a cmp&swap loop, but later than the omp code usually does that lowering. At the point it happens for kernels, loops must have simple latches, which this pa

Re: C++ PATCH to abate shift warnings (PR c++/68979)

On Tue, Jan 12, 2016 at 09:09:38AM -0500, Jason Merrill wrote: > In that case, we need to return (!flag_permissive || ctx->quiet). Thanks. So is this one ok once it passes testing? Bootstrapped/regtested on x86_64-linux, ok for trunk? 2016-01-12 Marek Polacek PR c++/68979 *

[PATCH] Fix PR69077

The following fixes PR69077. LTO bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2016-01-12 Richard Biener lto/ PR lto/69077 * lto-symtab.c (lto_symtab_prevailing_virtual_decl): Properly merge TREE_ADDRESSABLE and DECL_POSSIBLY_INLINED

Re: [PATCH] Fix up my recent change to vect_get_constant_vectors (PR tree-optimization/69207)

2016-01-11 20:13 GMT+03:00 Jakub Jelinek : > Hi! > > Based on discussions on IRC, I'm submitting following fix for a regression > on aarch64 - partial reversion (the case where VCE works too, just I thought > using NOP_EXPR would be nicer) and change in the assert - op better be > some integral val

Re: [hsa 2/10] Modifications to libgomp proper

On Tue, Jan 12, 2016 at 02:46:52PM +0100, Martin Jambor wrote: > diff --git a/libgomp/task.c b/libgomp/task.c > index ab5df51..828c1fb 100644 > --- a/libgomp/task.c > +++ b/libgomp/task.c > @@ -584,8 +592,34 @@ GOMP_PLUGIN_target_task_completion (void *data) >gomp_mutex_unlock (&team->task_

[RFC] non-unit stride loads for size power of 2.

Hi The code below it looks like we always call “vect_permute_load_chain” to load non-unit strides of size powers of 2. (---snip---) /* If reassociation width for vector type is 2 or greater target machine can execute 2 or more vector instructions in parallel. Otherwise try to get ch

[patch] libstdc++/69222 Prevent recursive instantiation in std::function

This fixes PR 69222 and PR 69005 for gcc-5-branch, by ensuring we don't try to determine the result of invoking the function(Functor) constructor argument when the type is incomplete (because that might require instantiating the constructor again, which recurses). Jason fixed 69005 on trunk by ma

[PATCH][committed] libitm: Remove dead code and data.

This removes code and data members that have not been used for quite a while now. The user-visible benefit is 8MB less space overhead if libitm is used. Tested on x86_64-linux and committed as r232275. 2016-01-12 Torvald Riegel * libitm_i.h (gtm_mask_stack): Remove. * begine

Re: [PATCH] remove mark_hook gty attribute

On Mon, Jan 11, 2016 at 11:54 PM, wrote: > From: Trevor Saunders > > Hi, > > this hardly counts as a bug fix, but going through open bugs I saw PR54809, > and > realized we don't actually need this attribute any more, so we might as well > just remove it. > > bootstrapped + regtested on x86_64-

Re: [RFA] [PATCH][PR tree-optimization/64910] Fix reassociation of binary bitwise operations with 3 operands

On Tue, Jan 12, 2016 at 6:10 AM, Jeff Law wrote: > On 01/11/2016 03:32 AM, Richard Biener wrote: > >> >> Yeah, reassoc is largely about canonicalization. >> >>> Plus doing it in TER is almost certainly more complex than getting it >>> right >>> in reassoc to begin with. >> >> >> I guess canonicali

Re: [PATCH] OpenACC documentation for libgomp

Bernd, On 01/11/2016 11:23 AM, Bernd Schmidt wrote: On 01/05/2016 04:47 PM, James Norris wrote: I've updated the original patch after some very helpful comments from Sandra (thank you, thank you). OK to commit to trunk? I'm probably not fully qualified to review the contents either, but few

[4.9][PR69082]Backport "[PATCH][ARM]Tighten the conditions for arm_movw, arm_movt"

Hi all, Here I backport r227129 to branch 4.9 to fix exactly the same issue reported in PR69082. It's been already committed on trunk and backportted to branch 5. I have quoted the original message for the explanation. The patch applies to branch 4.9 without any modifications. Test case is not

Re: [Patch ifcvt] Add a new parameter to limit if-conversion

Hi All, Here is a simple fix to exclude dg/ifcvt-5.c test from ia64 testing. Is it OK for trunk? testsuite/ChangeLog: 2016-01-12 Yuri Rumyantsev PR rtl-optimization/68920 gcc/testsuite/ChangeLog * gcc.dg/ifcvt-5.c: Exclude it from ia64 testing. 2016-01-12 17:01 GMT+03:00 Andreas Schwab : > Y

Re: [PATCH : RL78] Disable interrupts during hardware multiplication routines

On Jan 11, 2016, at 11:20 PM, Kaushik M Phatak wrote: > Kindly review the updated patch and let me know if it is OK. My review comment is still outstanding.

Re: prevent "undef var" errors on gcc --help or --version

Hello Bernd, Thanks for your feedback on this :-) > On 11 Jan 2016, at 17:09, Bernd Schmidt wrote: > > On 01/08/2016 02:23 PM, Olivier Hainque wrote: >> + /* Undefined variable references in specs are harmless if >> + we're running for --help or --version alone, or together. */ >> + spec

Re: prevent "undef var" errors on gcc --help or --version

On 01/12/2016 05:11 PM, Olivier Hainque wrote: + /* Decide if undefined variable references are allowed in specs. */ + { +/* --version and --help alone or together are safe. Note that -v would + make them unsafe, as they'd then be run for subprocesses as well, the + location

[Committed, PATCH] Sync top-level configure.ac with binutils-gdb

diff --git a/ChangeLog b/ChangeLog index 1c5330a..4821c1f 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,13 @@ +2016-01-12 H.J. Lu + + Sync with binutils-gdb: + 2015-10-21 Nick Clifton + + PR gas/19109 + * configure.ac: Note the 'none' is an acceptable argument to +

Re: [4.9][PR69082]Backport "[PATCH][ARM]Tighten the conditions for arm_movw, arm_movt"

On 12/01/16 15:31, Renlin Li wrote: > Hi all, > > Here I backport r227129 to branch 4.9 to fix exactly the same issue > reported in PR69082. > It's been already committed on trunk and backportted to branch 5. > > > I have quoted the original message for the explanation. > The patch applies to br

Re: C++ PATCH to abate shift warnings (PR c++/68979)

OK. Jason

Re: prevent "undef var" errors on gcc --help or --version

> On 12 Jan 2016, at 17:14, Bernd Schmidt wrote: > > I think you can do without the outer braces. Ok with those removed. Great! Thanks for the review and comments. With Kind Regards, Olivier

[trans-mem, aa64, arm, ppc, s390] Fixing PR68964

The problem in this PR is that we never got around to flushing out the vector support for transactions for anything but x86. My goal here is to make this as generic as possible, so that it should Just Work with existing vector support in the backend. In addition, if I encounter other unexpected r

[PATCH] DWARF: add abstract origin links on lexical blocks DIEs

Hello, Although the following patch does not fix a regression, I believe it fixes a bug visible from a debugger, so I think it’s a valid candidate at this stage. This change tracks from which abstract lexical block concrete ones come from in DWARF so that debuggers can inherit the former fro

Re: [PATCH] OpenACC documentation for libgomp

Hi! On 01/11/2016 11:35 AM, Jakub Jelinek wrote: On Tue, Jan 05, 2016 at 09:47:59AM -0600, James Norris wrote: I've updated the original patch after some very helpful comments from Sandra (thank you, thank you). I'd prefer if OpenMP * Enabling OpenMP::How to enable OpenMP for your

Re: [trans-mem, aa64, arm, ppc, s390] Fixing PR68964

On 12/01/16 16:53, Richard Henderson wrote: > The problem in this PR is that we never got around to flushing out the vector > support for transactions for anything but x86. My goal here is to make this > as > generic as possible, so that it should Just Work with existing vector support > in the b

Re: [trans-mem, aa64, arm, ppc, s390] Fixing PR68964

On 12/01/16 17:16, Richard Earnshaw (lists) wrote: > On 12/01/16 16:53, Richard Henderson wrote: >> The problem in this PR is that we never got around to flushing out the vector >> support for transactions for anything but x86. My goal here is to make this >> as >> generic as possible, so that it

Re: [patch] Avoid an unwanted decl re-map in copy_gimple_seq_and_replace_locals

Hi, On Mon, Jan 11, 2016 at 05:38:47PM +0100, Jakub Jelinek wrote: > On Mon, Jan 11, 2016 at 09:41:31AM +0100, Richard Biener wrote: > > Hum. Can't you check id->remapping_type_depth? For some reason, last week I reached the conclusion that no. But I must have done something wrong because I hav

Re: [trans-mem, aa64, arm, ppc, s390] Fixing PR68964

On 01/12/2016 09:16 AM, Richard Earnshaw (lists) wrote: > For normal core attributes you can use .object_arch to force the .arch > entry recorded in the attributes to a specific value, but I'm not sure > if you can override the .fpu directive in this way. You might have to > experiment a bit. Alt

[Patch,microblaze]: Optimized register reorganization for Microblaze.

The patch contains the changes in the macros fixed_registers and call_used_registers. Earlier the register r21 is marked as fixed and also marked as 1 for call_used registers. On top of that r21 is not assigned to any of the temporaries in rtl insns. This makes the usage of registers r21 in the

[doc, 1/n] invoke.texi: name of gcc executable

I've checked in the first installment of my planned reorganization of the invoke.texi chapter. Here I've deleted the section placed randomly in the middle of option descriptions that contained only a paragraph about the name of the gcc executable, and incorporated that information into the cha

Re: [patch] Avoid an unwanted decl re-map in copy_gimple_seq_and_replace_locals

On Tue, Jan 12, 2016 at 06:36:21PM +0100, Martin Jambor wrote: > > remap_decl (old_var, id); > > } > > - phase 2 - do the full remap_decls, but during that arrange that > > remap_decl for non-zero id->remapping_type_depth if (!n) just returns > > decl > > ...they would not be copied he

Re: [PATCH] c++/58109 - alignas() fails to compile with constant expression

On 01/11/2016 10:20 PM, Jason Merrill wrote: On 12/22/2015 09:32 PM, Martin Sebor wrote: + if (is_attribute_p ("aligned", name) + || is_attribute_p ("vector_size", name)) +{ + /* Attribute argument may be a dependent indentifier. */ + if (tree t = args ? TREE_VALUE (args) :

Re: [patch] Avoid an unwanted decl re-map in copy_gimple_seq_and_replace_locals

On Tue, Jan 12, 2016 at 06:51:31PM +0100, Martin Jambor wrote: > On Tue, Jan 12, 2016 at 06:36:21PM +0100, Martin Jambor wrote: > > > remap_decl (old_var, id); > > > } > > > - phase 2 - do the full remap_decls, but during that arrange that > > > remap_decl for non-zero id->remapping_type_de

Re: [PATCH] PR target/69225: Set FLT_EVAL_METHOD to 2 only if 387 FPU is used

On Tue, 12 Jan 2016, Uros Bizjak wrote: > I think that following definition describes -msse -mfpmath=sse > situation in the most elegant way. We can just declare that the > precision is not known in this case: > > #define TARGET_FLT_EVAL_METHOD\ > (TARGET_MIX_SSE_I387 ?

Re: [PATCH, PR69110] Don't return NULL access_fns in dr_analyze_indices

On 12/01/16 14:04, Richard Biener wrote: On Tue, 12 Jan 2016, Tom de Vries wrote: On 12/01/16 12:22, Richard Biener wrote: Doesnt' the same issue apply to unsigned int *p; static void __attribute__((noinline, noclone)) foo (void) { unsigned int z; for (z = 0; z < N; ++z) ++(*p);

Re: [PATCH], PowerPC IEEE 128-bit fp, #11-rev3 (enable libgcc conversions)

On Tue, Jan 12, 2016 at 12:18:55AM +, Joseph Myers wrote: > On Mon, 11 Jan 2016, Michael Meissner wrote: > > > I fixed the #ifdef to use __NO_FPRS__ (thanks for the heads up on that). I > > also believe I fixed the various formatting issues. These two patches > > build on > > a big endian p

Re: [hsa 2/10] Modifications to libgomp proper

Hi, On Tue, Jan 12, 2016 at 02:38:15PM +0100, Jakub Jelinek wrote: > On Tue, Jan 12, 2016 at 02:29:06PM +0100, Martin Jambor wrote: > > GOMP_kernel_launch_attributes should not be there (it is a > > reminiscence from before the device-specific target arguments) and > > should be moved just to the

[gomp4] OpenACC documentation for libgomp.

Hi, Backported: 2016-01-12 James Norris * libgomp.texi: Updates for OpenACC. from trunk. Thanks, Jim Index: ChangeLog.gomp === --- ChangeLog.gomp (revision 232292) +++ ChangeLog.gomp (working copy) @@ -1,3 +1,9 @@ +201

Re: [PATCH] PR testsuite/69181: ensure expected multiline outputs is cleared per-test

On Sat, 2016-01-09 at 03:07 +0100, Bernd Schmidt wrote: > On 01/09/2016 01:51 AM, David Malcolm wrote: > > The root cause here is that the logic to reset the list of expected > > multiline outputs was being run from: > >handle-multiline-outputs, called by > > prune.exp's prune_gcc_output >

Re: [patch] libstdc++/68276 and libstdc++68995 qualification in

On 21/12/15 13:02 +, Jonathan Wakely wrote: Two patches to add missing std:: qualification to prevent ADL problems. Both are regressions, 68276 only on trunk, but 68995 has been broken since 4.8.0 (but only affects people mixing TR1 with C++11, and I was already rude about them in Bugzilla so

Re: [PATCH] Fix memory alignment on AVX512VL masked floating point stores (PR target/69198)

On Tue, Jan 12, 2016 at 5:45 AM, Uros Bizjak wrote: > On Tue, Jan 12, 2016 at 2:42 PM, Jakub Jelinek wrote: >> On Tue, Jan 12, 2016 at 05:39:29AM -0800, H.J. Lu wrote: >>> GCC 5 has the same issue. This patch should be backported to GCC 5 >>> with >>> >>> https://gcc.gnu.org/ml/gcc-patches/2016-

Re: [Patch, libstdc++/68877] Reimplement __is_[nothrow_]swappable

Ping - this is a tentative reminder for this patch proposal. 2015-12-23 22:15 GMT+01:00 Daniel Krügler : > This is a second try for a patch for libstdc++ bug 68877. See below > for responses. > > 2015-12-22 22:42 GMT+01:00 Jonathan Wakely : >> On 21/12/15 12:45 +0100, Daniel Krügler wrote: >>> >>>

Re: [trans-mem, aa64, arm, ppc, s390] Fixing PR68964

On Tue, Jan 12, 2016 at 11:53 AM, Richard Henderson wrote: > The problem in this PR is that we never got around to flushing out the vector > support for transactions for anything but x86. My goal here is to make this > as > generic as possible, so that it should Just Work with existing vector su

Re: [Patch, libstdc++/68877] Reimplement __is_[nothrow_]swappable

On 23/12/15 22:15 +0100, Daniel Krügler wrote: PR libstdc++/68877 * include/std/type_traits: Following N4511, reimplement __is_swappable and __is_nothrow_swappable. Move __is_swappable to namespace std, adjust callers. Use __is_nothrow_swappable in swap. * include/bits/move.h: Use

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