On Wed, Dec 30, 2015 at 9:53 PM, H.J. Lu wrote:
> SSE vector arithmetic and logic instructions only accept aligned memory
> operand. This patch adds vector_memory_operand and "Bm" constraint for
> aligned SSE memory operand. They are applied to SSE any_logic patterns.
>
> OK for trunk and releas
Hi!
ubsan_instrument_float_cast is called from convert.c, therefore for all FEs
that uses convert.c. For C/C++, the ubsan builtins are already initialized
through their inclusion from builtins.def, but for other builtins they can
be still uninitialized. This patch adds a call that ensures the bu
Hi All,
Here is slightly modified patch which limits a number of conditional
moves instead of changing conditional branch cost. This is in fact a
work-around for very poor cost model which needs to be enhanced to
evaluate cost of conditional move that could be greater then cost of
ordinary move (f
Hi!
The PR61441 change added REAL_VALUE_ISSIGNALING_NAN checks for both
operands, but only arg1 is guaranteed to be a REAL_CST at this point.
If arg0 is not a REAL_CST, I think we can allow all the opts the function
does, as all transformations replace the pow with some other expression
that uses
On Thu, Nov 26, 2015 at 08:38:55AM +, Saraswati, Sujoy (OSTL) wrote:
> PR tree-optimization/61441
> * gcc.dg/pr61441.c: New testcase.
Note the testcase fails on i686-linux, and even -fexcess-precision=standard
doesn't help (-ffloat-store works, but that is a big hammer
The attached patch fixes C++-11 handling of "alignas(0)" which
should be ignored but currently generates an error message. A
test case is included; the patch has been tested on S390x. Since
it's a language issue it should be independent of the backend
used.
https://gcc.gnu.org/bugzilla/show_bug.
On Sat, 21 Nov 2015, Steve Kargl wrote:
> 2015-11-21 Steven G. Kargl
>
> * simplify.c (gfc_simplify_cshift): Work around bootstrap issues
> due to inappropriate warning options.
> Index: simplify.c
> ===
> + /*
In adding a new warning, I got very confused as to why addint a flag failed to
behave as expected on some of the tests.I finally noticed the missing '}',
which caused dg to silently ignore the additional options. It seems they were
passing by din't of the test harness already providing -O2,
On Thu, Dec 31, 2015 at 1:14 AM, Uros Bizjak wrote:
> On Wed, Dec 30, 2015 at 9:53 PM, H.J. Lu wrote:
>> SSE vector arithmetic and logic instructions only accept aligned memory
>> operand. This patch adds vector_memory_operand and "Bm" constraint for
>> aligned SSE memory operand. They are appl
The Cilk Plus code may sometimes turn a COND_EXPR into an
error_mark_node for no good reason. This can be seen by compiling the
test case c-c++-common/cilk-plus/CK/pr60469.c with both gcc and g++ and
observing the differences of the -fdump-tree-original dumps:
With gcc, we get the following code
This patch makes it so that a gimplification failure is considered to be
an internal error under normal circumstances, so that we otherwise avoid
silently generating wrong code if e.g. a buggy frontend fed us a
malformed tree.
The rationale for this change is that it's better to abort compilation
If we do create such an initializer, we end up with an error_mark_node
during gimplification, because in cp-gimplify.c we pass this
VEC_INIT_EXPR of the flexible array member to build_vec_init, for which
it spits on an error_mark_node. This happens in e.g. the test case
g++.dg/ext/array1.C.
This
Jason,
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58583
It's noticed that the testcase passes with enable-checking build but fails
with enable-checking=release. Looking at what is happening, I think the
checking build is changing the instantiation point of a template.
The failure manifes
On Thu, Dec 31, 2015 at 07:29:21AM -0800, H.J. Lu wrote:
> > This patch is just papering over deeper problem, as Jakub said in the PR
> > [1]:
> >
> > --q--
> > GCC uses the ix86_legitimate_combined_insn target hook to disallow
> > misaligned memory into certain SSE instructions.
> > (subreg:V4SI
On Thu, Dec 31, 2015 at 09:57:10PM +0800, Gerald Pfeifer wrote:
> On Sat, 21 Nov 2015, Steve Kargl wrote:
> > 2015-11-21 Steven G. Kargl
> >
> > * simplify.c (gfc_simplify_cshift): Work around bootstrap issues
> > due to inappropriate warning options.
>
> > Index: simplify.c
> > ===
On Thu, Dec 31, 2015 at 8:12 AM, Jakub Jelinek wrote:
> On Thu, Dec 31, 2015 at 07:29:21AM -0800, H.J. Lu wrote:
>> > This patch is just papering over deeper problem, as Jakub said in the PR
>> > [1]:
>> >
>> > --q--
>> > GCC uses the ix86_legitimate_combined_insn target hook to disallow
>> > mis
On 2015-12-30, at 6:46 PM, Joseph Myers wrote:
> On Mon, 28 Dec 2015, John David Anglin wrote:
>
>> The attach change fixes PR middle-end/68743 on hppa*-*-hpux*. In compiling
>> c99_functions.c in libgfortran, floor ((double)x) was transformed to
>> floorf(x) but
>> floorf is not available on
This patch adds support for the ISA 3.0 XXPERM instruction, which is like
VPERM, except it can operate on any VSX register. Since the instruction is a 3
operand instruction (RT and RA must be the same), I made it so VPERM was
preferred. I also added XXPERM fusion support where a XXLOR move instru
On Tue, 29 Dec 2015, Michael Meissner wrote:
> +/* __eqkf2 returns 0 if equal, or 1 if not equal or NaN. */
> +CMPtype
> +__eqkf2_hw (TFtype a, TFtype b)
> +{
> + return (__builtin_isunordered (a, b) || (a != b)) ? 1 : 0;
This is more complicated than necessary. "return a != b;" will suffice.
When I did the inital d-form support for ISA 3.0 (power9) for loading scalar
SF/DF values into Altivec registers, I did not enable -mpower9-dform with the
other ISA 3.0 switches when you used -mcpu=power9. This was during the initial
development, I had some bugs. I fixed the bugs, but I forgot to
On 12/27/2015 2:38 PM, Bernd Edlinger wrote:
> Hi,
>
> due to more thorough checks in the middle end the builtin clz instruction
> causes now an ICE on the tilegx target.
>
> I have built a tilegx-cross-comiler and inspected the generated code
> to verify that the patch works.
>
> Is is OK for trun
On Sat, 26 Dec 2015, Thomas Preud'homme wrote:
> +#define CMSE_TT_ASM(flags) \
> +{ \
> + cmse_address_info_t result; \
> + __asm__ ("tt" # flags " %0,%1" \
> +: "=r"(result) \
> +: "r"(p) \
> +: "memory"); \
> + return result; \
Are the identifiers "result" and "p" re
On 12/31/2015 11:04 AM, Nathan Sidwell wrote:
Jason,
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58583
It's noticed that the testcase passes with enable-checking build but
fails with enable-checking=release. Looking at what is happening, I
think the checking build is changing the instantiati
On December 31, 2015 10:49:14 PM GMT+01:00, Jason Merrill
wrote:
>On 12/31/2015 11:04 AM, Nathan Sidwell wrote:
>> Jason,
>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58583
>>
>> It's noticed that the testcase passes with enable-checking build
>but
>> fails with enable-checking=release. Loo
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