Re: [google][gcc-4_9] Remove unused key field in gcov_fn_info

2015-09-29 Thread Xinliang David Li
else { gfi_ptr = gi_ptr->functions[f_ix]; - if (gfi_ptr && gfi_ptr->key == gi_ptr) + if (gfi_ptr) length = GCOV_TAG_FUNCTION_LENGTH; - else -length = 0; } The removal of 'else' path seems wrong. David On Tue

Re: [PATCH] x86 interrupt attribute

2015-09-29 Thread H.J. Lu
On Tue, Sep 29, 2015 at 2:23 PM, Mike Stump wrote: > On Sep 29, 2015, at 1:59 PM, H.J. Lu wrote: >> commit f3a6675a8d69d810d2cad0c090a762094a0a8622 >> Author: H.J. Lu >> Date: Tue Sep 29 13:47:18 2015 -0700 >> >>Define EPILOGUE_USES in i386 so that all preserved registers are used >>by

Re: [PATCH] remove dead code of commutative_reductions

2015-09-29 Thread Sebastian Pop
Tobias Grosser wrote: > On 09/29/2015 06:26 PM, Sebastian Pop wrote: > >This code is not used anymore after we removed the previous loop optimizer > >(not > >based on the ISL scheduler.) We will add back the detection of commutative > >reductions after we improve the code generation of scalar dep

Re: [PATCH] use MIN fusion for ISL-14

2015-09-29 Thread Tobias Grosser
On 09/30/2015 12:10 AM, Sebastian Pop wrote: This patch fixes PR66754 by reverting an earlier unintended change. We now generate a much simpler AST for interchange-1.c: ISL AST generated by ISL: { for (int c1 = 0; c1 <= 1334; c1 += 1) { S_7(c1); for (int c3 = 0; c3 <= 1334; c3 += 1)

Re: [PATCH] x86 interrupt attribute

2015-09-29 Thread H.J. Lu
On Tue, Sep 29, 2015 at 2:12 PM, Mike Stump wrote: > On Sep 29, 2015, at 1:16 PM, H.J. Lu wrote: >> On Tue, Sep 29, 2015 at 11:49 AM, Mike Stump wrote: >>> To be feature complete, it would be nice to have two styles of interrupt >>> functions, one that returns with iret, and one that returns wi

RE: [PATCH] use MIN fusion for ISL-14

2015-09-29 Thread Sebastian Paul Pop
The AST looked very bad: see https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67754#c2 There were a lot of testcases failing with MAX fusion. Sebastian -Original Message- From: Tobias Grosser [mailto:tob...@grosser.es] Sent: Tuesday, September 29, 2015 5:14 PM To: Sebastian Pop; gcc-patches@

Go patch committed: Accept untyped integer values as indexes

2015-09-29 Thread Ian Lance Taylor
This patch by Chris Manghane fixes the Go frontend to accept any untyped integer value as an index, even if the default type of the value is not "int". This fixes https://golang.org/issue/11545 . Bootstrapped and ran Go testsuite on x86_64-unknown-linux-gnu. Committed to mainline. Ian Index: gcc/

Re: [PATCH] x86 interrupt attribute

2015-09-29 Thread H.J. Lu
On Tue, Sep 29, 2015 at 3:19 PM, H.J. Lu wrote: > On Tue, Sep 29, 2015 at 2:12 PM, Mike Stump wrote: >> On Sep 29, 2015, at 1:16 PM, H.J. Lu wrote: >>> On Tue, Sep 29, 2015 at 11:49 AM, Mike Stump wrote: To be feature complete, it would be nice to have two styles of interrupt functio

Re: [google][gcc-4_9] Remove unused key field in gcov_fn_info

2015-09-29 Thread Rong Xu
You are right. I attached the updated patch to this email. On Tue, Sep 29, 2015 at 3:10 PM, Xinliang David Li wrote: >else > { >gfi_ptr = gi_ptr->functions[f_ix]; > - if (gfi_ptr && gfi_ptr->key == gi_ptr) > + if (gfi_ptr) > length = GCO

Re: [google][gcc-4_9] Remove unused key field in gcov_fn_info

2015-09-29 Thread Xinliang David Li
ok. David On Tue, Sep 29, 2015 at 4:08 PM, Rong Xu wrote: > You are right. I attached the updated patch to this email. > > On Tue, Sep 29, 2015 at 3:10 PM, Xinliang David Li wrote: >>else >> { >>gfi_ptr = gi_ptr->functions[f_ix]; >> - if (gfi_ptr && gfi_ptr

[patch committed FT32] Limit MEMSET, MEMCPY to <512 bytes

2015-09-29 Thread James Bowman
The attached patch limits the MEMSET (setmemsi pattern) and MEMCPY (movmemsi pattern) instructions to 0-511 bytes. There is a hardware limitation on large MEMSET, MEMCPY operations that the library versions of memset() and memcpy() deal with. [gcc] 2015-09-29 James Bowman * config/ft3

Re: [PATCH] x86 interrupt attribute

2015-09-29 Thread Mike Stump
On Sep 29, 2015, at 3:10 PM, H.J. Lu wrote: > On Tue, Sep 29, 2015 at 2:23 PM, Mike Stump wrote: >> On Sep 29, 2015, at 1:59 PM, H.J. Lu wrote: >>> commit f3a6675a8d69d810d2cad0c090a762094a0a8622 >>> Author: H.J. Lu >>> Date: Tue Sep 29 13:47:18 2015 -0700 >>> >>> Define EPILOGUE_USES in i

Re: [PATCH] x86 interrupt attribute

2015-09-29 Thread H.J. Lu
On Tue, Sep 29, 2015 at 4:53 PM, Mike Stump wrote: > On Sep 29, 2015, at 3:10 PM, H.J. Lu wrote: >> On Tue, Sep 29, 2015 at 2:23 PM, Mike Stump wrote: >>> On Sep 29, 2015, at 1:59 PM, H.J. Lu wrote: commit f3a6675a8d69d810d2cad0c090a762094a0a8622 Author: H.J. Lu Date: Tue Sep

[committed, PATCH] gcc.dg/debug/pr65771.c: Use tls_runtime instead of tls.

2015-09-29 Thread Jonathan Roelofs
The attached patch fixes a few failures on bare-metal arm that happen because `dg-require-effective-target tls` only checks for compile-time support, whereas `dg-require-effective-target tls_runtime` checks for runtime support too. The latter is needed due to the missing support for __aeabi_rea

Re: [PATCH] x86 interrupt attribute

2015-09-29 Thread Mike Stump
On Sep 29, 2015, at 3:40 PM, H.J. Lu wrote: > How about adding a "no_caller_saved_registers" attribute? You can save all call clobbered registers with 3 instructions? Really? I’m skeptical. Anyway, if you do this by turning off great swaths of registers, then, I guess that doesn’t surprise m

Re: [PATCH][AArch64] Add separate insn sched class for vector LDP & STP

2015-09-29 Thread Ramana Radhakrishnan
On Tue, Sep 29, 2015 at 12:52 AM, Evandro Menezes wrote: > In some micro-architectures the insns to load or store pairs of vector > registers are implemented rather differently from those affecting lanes in > vector registers. Then, it's important that such insns be described > likewise different

[PATCH] add static-linked PIE support

2015-09-29 Thread Rich Felker
This is the gcc side support of the static-linked PIE functionality added to binutils in commit 9b8b325a1f4cdaf235e7d803849dde6ededec865: https://sourceware.org/git/?p=binutils-gdb.git;a=commitdiff;h=9b8b325a1f4cdaf235e7d803849dde6ededec865 I've moved the linking spec change from SUBTARGET_LINK_S

Re: [PATCH] Convert SPARC to LRA

2015-09-29 Thread Jeff Law
On 09/29/2015 08:00 AM, Richard Biener wrote: On Tue, Sep 29, 2015 at 3:39 PM, Jeff Law wrote: On 09/29/2015 07:19 AM, Oleg Endo wrote: On Mon, 2015-09-28 at 15:28 -0500, Segher Boessenkool wrote: We can at least change the default to LRA, so new ports get it unless they like to hurt themse

Re: [PATCH] x86 interrupt attribute

2015-09-29 Thread H.J. Lu
On Tue, Sep 29, 2015 at 5:23 PM, Mike Stump wrote: > On Sep 29, 2015, at 3:40 PM, H.J. Lu wrote: >> How about adding a "no_caller_saved_registers" attribute? > > You can save all call clobbered registers with 3 instructions? Really? I’m > skeptical. Anyway, if you do this by turning off great

Re: [PATCH] x86 interrupt attribute

2015-09-29 Thread H.J. Lu
On Tue, Sep 29, 2015 at 5:02 PM, H.J. Lu wrote: > On Tue, Sep 29, 2015 at 4:53 PM, Mike Stump wrote: >> On Sep 29, 2015, at 3:10 PM, H.J. Lu wrote: >>> On Tue, Sep 29, 2015 at 2:23 PM, Mike Stump wrote: On Sep 29, 2015, at 1:59 PM, H.J. Lu wrote: > commit f3a6675a8d69d810d2cad0c090a76

Re: [PATCH] Convert SPARC to LRA

2015-09-29 Thread Vladimir Makarov
On 09/29/2015 09:43 AM, Jeff Law wrote: FWIW, I tried to build a simple cc0 target with LRA (v850-elf), but it fell over pretty early. Essentially LRA doesn't seem to be cc0-aware in split_reg as ultimately inserted something between a cc0-setter and cc0-user. Oops. Yes, that is true. When

Re: [PATCH GCC]Improve rtl loop inv cost by checking if the inv can be propagated to address uses

2015-09-29 Thread Bin.Cheng
On Tue, Sep 29, 2015 at 1:21 AM, Jeff Law wrote: > On 09/28/2015 05:28 AM, Bernd Schmidt wrote: >> >> On 09/28/2015 11:43 AM, Bin Cheng wrote: >>> >>> Bootstrap and test on x86_64 and x86_32. Will test it on aarch64. So >>> any >>> comments? >>> >>> Thanks, >>> bin >>> >>> 2015-09-28 Bin Cheng

Re: [PATCH] add static-linked PIE support

2015-09-29 Thread Rich Felker
On Tue, Sep 29, 2015 at 09:34:07PM -0400, Rich Felker wrote: > This is the gcc side support of the static-linked PIE functionality > added to binutils in commit 9b8b325a1f4cdaf235e7d803849dde6ededec865: And unfortunately I wasn't aware of this: https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=e9

Re: [PATCH] Convert SPARC to LRA

2015-09-29 Thread Sebastian Huber
On 30/09/15 04:07, Jeff Law wrote: If the port does get occasional fixes (primarily driven by BZs), but not getting updated on a regular basis (such as conversion to LRA, conversion to RTL prologue/epilogue, etc), may be only getting occasional testing, etc. Then it's probably fair to call it in

Re: [PATCH, PR target/67761] Fix i686-*-* bootstrap comparison failure

2015-09-29 Thread Uros Bizjak
Hello! > My recenttly introduced STV pass doesn't skip debug instructions and it > causes transformation > (mistly cost computation) depending on debug info. It causes bootstrap > comparison failure. This > patch fixes. Bootstrapped for i686-linux. Testing for > x86_64-unknown-linux-gnu{,m3

[RS6000] Make -msingle-pic-base remove the ELFv2 global entry code

2015-09-29 Thread Alan Modra
For other ABIs, -msingle-pic-base makes gcc omit loading of the PIC register in function prologues. This patch makes the option affect ELFv2 too. I wrote a patch like this during the initial ELFv2 effort, but there were many more important patches to push and this one somehow got dropped. Dusted

[gomp4,committed] Remove release_dangling_ssa_names

2015-09-29 Thread Tom de Vries
[ was: Re: [PATCH] Don't create superfluous parm in expand_omp_taskreg ] On 24/09/15 11:02, Thomas Schwinge wrote: Hi Tom! On Thu, 24 Sep 2015 08:36:27 +0200, Tom de Vries wrote: >On 24/09/15 08:23, Thomas Schwinge wrote: > >On Tue, 11 Aug 2015 20:53:39 +0200, Tom de Vries wrote: > >>Don't

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