Re: [PATCH] Improve VPR for some builtins and non pointer checks

On Sun, Sep 02, 2012 at 10:18:15PM -0700, Andrew Pinski wrote: > While fixing some code not to have aliasing violations in it, I can > across that some builtins were not causing their arguments or their > return values being marked as non-null. This patch implements just > that in VPR while allo

Re: [PATCH 4/6] Thread pointer built-in functions, s390

On 28/08/12 10:14, Chung-Lin Tang wrote: > On 12/7/18 8:05 PM, Andreas Krebbel wrote: >> On 07/12/2012 08:52 AM, Chung-Lin Tang wrote: >>> * config/s390/s390.c (s390_builtin,code_for_builtin_64, >>> code_for_builtin_31,s390_init_builtins,s390_expand_builtin): >>> Remove. >>>

Re: [PATCH] Improve VPR for some builtins and non pointer checks

On Sun, Sep 2, 2012 at 11:36 PM, Georg-Johann Lay wrote: > Andrew Pinski schrieb: >> >> Hi, >> While fixing some code not to have aliasing violations in it, I can >> across that some builtins were not causing their arguments or their >> return values being marked as non-null. This patch impleme

Re: [PATCH] Improve VPR for some builtins and non pointer checks

On Mon, Sep 3, 2012 at 12:03 AM, Jakub Jelinek wrote: > On Sun, Sep 02, 2012 at 10:18:15PM -0700, Andrew Pinski wrote: >> While fixing some code not to have aliasing violations in it, I can >> across that some builtins were not causing their arguments or their >> return values being marked as no

[SH] PR 51244 - Add CANONICALIZE_COMPARISON macro

Hello, This adds implementation of the CANONICALIZE_COMPARISON macro to the SH target. So far, it doesn't seem to have an impact on the generated code, but it might be useful to have it in place in the future. Moreover, it changes the behavior of the cbranchsi4 expander, which was checking for TA

Re: Re-implement VEC_* to be member functions of vec_t

On Thu, 23 Aug 2012, Diego Novillo wrote: > This patch is the first step towards making the API for VEC use > member functions. > > There are no user code modifications in this patch. Everything > is still using the VEC_* macros, but this time they expand into > member function calls. > > Becau

Re: Re-implement VEC_* to be member functions of vec_t

On Fri, 24 Aug 2012, Diego Novillo wrote: > On 2012-08-24 12:03 , Gabriel Dos Reis wrote: > > > I would just use C++ standard function `at()' (e.g. as found in vector) > > for this. > > Sure. For regular functions, using default-valued arguments would be fine. > But I think the mechanism would

Re: [PATCH, ARM] Constant vector permute for the Neon vext insn

On 31 August 2012 17:59, Richard Henderson wrote: > On 2012-08-31 07:25, Christophe Lyon wrote: >> + offset = gen_rtx_CONST_INT (VOIDmode, location); > > Never call gen_rtx_CONST_INT directly. Use GEN_INT. > > Here is an updated patch with that small change. For the record, there are quite a few

Re: [Patch ARM testsuite] fix 3 tests for big-endian

On 31 August 2012 18:14, Janis Johnson wrote: > > do something like > > /* { dg-final { scan-assembler-times "fmrrd\[\\t \]+r0,\[\\t \]*r1,\[\\t > \]*d0" 2 } { target arm_little_endian } } */ > /* { dg-final { scan-assembler-times "fmrrd\[\\t \]+r1,\[\\t \]*r0,\[\\t > \]*d0" 2 } {target { ! arm

Re: [wwwdocs] PATCH for Re: [PATCH] Remove matrix-reorg

On Sun, 2 Sep 2012, Gerald Pfeifer wrote: > Hi Richi, > > On Fri, 10 Aug 2012, Richard Guenther wrote: > > This removes matrix-reorg which is today useless and possibly > > dangerous. It follows struct-reorg down the kitchen-sink. > > how about the following patch for the GCC 4.8 release notes?

[avr]: Disable libquadmath

This patch disables libquadmath. 128 bit wide floats are not really sensible on avr. Ok for trunk? Johann -- * configure.ac (noconfigdirs,target=avr): Add target-libquadmath. * configure: Regenerate. Index: configure.ac ==

Re: Fold VEC_PERM_EXPR a little more

On Sun, 2 Sep 2012, Hans-Peter Nilsson wrote: On Sat, 1 Sep 2012, Marc Glisse wrote: gcc/ * fold-const.c (fold_ternary_loc): Constant-propagate after removing dead operands. gcc/testsuite/ * gcc.dg/fold-perm.c: Improve test. (adding a line and a parameter to the funct

Re: [SH] PR 51244 - Add CANONICALIZE_COMPARISON macro

Oleg Endo wrote: > --- gcc/config/sh/sh.c(revision 190840) > +++ gcc/config/sh/sh.c(working copy) > @@ -21,6 +21,12 @@ > along with GCC; see the file COPYING3. If not see > . */ > > +/* FIXME: This is a temporary hack, so that we can include > +

Re: [SH] PR 51244 - Add CANONICALIZE_COMPARISON macro

On 3 Sep 2012, at 11:18, Kaz Kojima wrote: Oleg Endo wrote: --- gcc/config/sh/sh.c(revision 190840) +++ gcc/config/sh/sh.c(working copy) @@ -21,6 +21,12 @@ along with GCC; see the file COPYING3. If not see . */ +/* FIXME: This is a temporary hack, so t

Re: [wwwdocs] PATCH for Re: Commit: XStormy16: Add support for -fstack-usage

Hi Gerald, Anything you'd like to add or tweak? No, it is fine thanks. (Is "stormy" fine as an anchor, or should we go for "xstormy" or the full "xstormy16"? I used what we have for the port itself...) I like the full "xstormy16" as well. I think that the fact that the gcc backend sourc

[AArch64] Correct cache line size calculation

I've just committed the attached patch to correct the i and d cache line size calculation used in sync_cache_range() for AArch64. /Marcus 2012-09-03 Marcus Shawcroft * config/aarch64/sync-cache.c (__aarch64_sync_cache_range): Lift declarations to top of function. Update com

[AArch64] cache CTR_EL0 in sync_cache_range()

I've just committed the attached patch to cache the CTR_EL0 register between calls to sync_cache_range(). /Marcus 2012-09-03 Marcus Shawcroft * config/aarch64/sync-cache.c (__aarch64_sync_cache_range): Cache the ctr_el0 register.diff --git a/libgcc/config/aarch64/sync-cache.

Re: [PATCH, ARM] Constant vector permute for the Neon vext insn

On 09/03/12 09:59, Christophe Lyon wrote: On 31 August 2012 17:59, Richard Henderson wrote: On 2012-08-31 07:25, Christophe Lyon wrote: + offset = gen_rtx_CONST_INT (VOIDmode, location); Never call gen_rtx_CONST_INT directly. Use GEN_INT. Here is an updated patch with that small change.

Re: [SH] PR 51244 - Add CANONICALIZE_COMPARISON macro

Oleg Endo wrote: > In any case, I have no problem with changing the multi line comments > to /* ... */. Just let me know. Other than that, the patch is OK. Regards, kaz

Re: [avr]: Disable libquadmath

2012/9/3 Georg-Johann Lay : > This patch disables libquadmath. > > 128 bit wide floats are not really sensible on avr. > > Ok for trunk? > Ok. Please commit. Denis

Re: PATCH: PR driver/54335: -dm doesn't work

On Thu, Aug 23, 2012 at 3:38 PM, H.J. Lu wrote: > On Thu, Aug 23, 2012 at 1:45 AM, Richard Guenther > wrote: >> On Wed, Aug 22, 2012 at 10:09 PM, H.J. Lu wrote: >>> Hi, >>> >>> -dm hasn't worked for a long time, at least dating back to GCC 3.4. >>> This patch removes -dm and puts back -da, which

Re: Ping^3 Re: Add --no-sysroot-suffix driver option

On Thu, Aug 23, 2012 at 4:43 PM, Joseph S. Myers wrote: > Ping^3. This patch > is still pending > review. Ok. Thanks, Richard. > -- > Joseph S. Myers > jos...@codesourcery.com

Re: [PATCH] Don't ICE if COMPOUND_LITERAL_EXPR's DECL_INITIAL isn't CONSTRUCTOR (PR c/54363)

On Fri, Aug 24, 2012 at 11:39 PM, Joseph S. Myers wrote: > On Fri, 24 Aug 2012, Jakub Jelinek wrote: > >> Hi! >> >> On this testcase, we ICE in optimize_compound_literals_in_ctor >> because init isn't CONSTRUCTOR, but the recursive call relies on it >> being a CONSTRUCTOR. >> >> Either we can add

Re: [PATCH] Fix emit_conditional_add and documentation for add@var{mode}cc

On Sat, Aug 25, 2012 at 12:43 AM, Andrew Pinski wrote: > Forgot to attach the patch. > > -- Andrew > > On Fri, Aug 24, 2012 at 3:42 PM, Andrew Pinski wrote: >> Hi, >> I decided to split this patch from the other patch which uses >> emit_conditional_add in expand as that part of the patch needs

Re: [PATCH] fix for PR53986 - missing vrp on bit-mask test, LSHIFT_EXPR not handled

On Sun, Aug 26, 2012 at 4:28 PM, Tom de Vries wrote: > Richard, > > this patch fixes PR53986. > > The patch calculates the range of an LSHIFT_EXPR in case both operands are > constants ranges, and the operation is guaranteed not to overflow. > > F.i., it evaluates [1, 2] << [1, 8] to [2, 512]. > >

Re: another wrong-code problem with -fstrict-volatile-bitfields

On Sat, Aug 25, 2012 at 10:15 PM, Sandra Loosemore wrote: > While I was grovelling around trying to swap in more state on the bitfield > store/extract code for the patch rewrite being discussed here: > > http://gcc.gnu.org/ml/gcc-patches/2012-08/msg01546.html > > I found a reference to PR23623 and

Re: Patch ping

On Mon, Aug 27, 2012 at 9:42 AM, Jakub Jelinek wrote: > http://gcc.gnu.org/ml/gcc-patches/2012-08/msg01100.html > - C++ -Wsizeof-pointer-memaccess support (C is already in) > > http://gcc.gnu.org/ml/gcc-patches/2012-08/msg01376.html > - valtrack ICE fix This one is ok. Thanks, Richard. >

Re: [PATCH] Fix PR 53395: tree-if-conv.c not producing MAX_EXPR

On Tue, Aug 28, 2012 at 9:09 AM, Andrew Pinski wrote: > On Mon, May 21, 2012 at 2:56 AM, Richard Guenther > wrote: >> On Sun, May 20, 2012 at 1:40 AM, Andrew Pinski wrote: >>> The problem here is that tree-if-conv.c produces COND_EXPR instead of >>> the MAX/MIN EXPRs. When I added the expansion

[Committed] S/390: Use load relative to access GOT slots

Hi, so far we were missing to use load relative when accessing GOT slots. Fixed with the attached patch. Committed to mainline after tested on s390 and s390x. Bye, -Andreas- 2012-09-03 Andreas Krebbel * config/s390/s390.c (s390_loadrelative_operand_p): New function. (s390_c

Re: [PATCH 3/3] Compute predicates for phi node results in ipa-inline-analysis.c

On Fri, Aug 31, 2012 at 7:24 PM, Martin Jambor wrote: > Hi, > > On Thu, Aug 30, 2012 at 05:11:35PM +0200, Martin Jambor wrote: >> this is a new version of the patch which makes ipa analysis produce >> predicates for PHI node results, at least at the bottom of the >> simplest diamond and semi-diamo

Re: [patch] Make every GIMPLE switch have a default case, always

On Sat, Aug 25, 2012 at 1:14 AM, Steven Bosscher wrote: > Hello, > > This patch restores the old invariant that every GIMPLE switch has a > default case. This invariant is only broken by the SJLJ exception > dispatch code, and it's resulted in some code accepting a switch > without a default while

Re: [PATCH, C] Mixed pointer types in call to streamer_tree_cache_lookup() in gcc/lto-streamer-out.c

On Sat, Sep 1, 2012 at 2:21 PM, Andris Pavenis wrote: > uint32_t * is used as a 3rd parameter in call to > streamer_tree_cache_lookup() > in 2 places in gcc/lto-streamer-out.c when the procedure prototype have > unsigned *. They are not guaranteed to be the same for all targets > (I got error when

Re: combine BIT_FIELD_REF and VEC_PERM_EXPR

On Sat, Sep 1, 2012 at 8:54 PM, Marc Glisse wrote: > Hello, > > this patch makes it so that instead of taking the k-th element of a shuffle > of V, we directly take the k'-th element of V. > > Note that I am *not* checking that the shuffle is only used once. There can > be some circumstances where

Re: Fold VEC_PERM_EXPR a little more

On Sat, Sep 1, 2012 at 4:38 PM, Marc Glisse wrote: > Hello, > > I noticed while writing the patch posted at: > http://gcc.gnu.org/ml/gcc-patches/2012-08/msg01755.html > > that fold_ternary_loc sometimes doesn't go all the way for VEC_PERM_EXPR, > calling it a second time would fold even more. Fixe

[PATCH] Fix parts of PR54362

Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk. Richard. 2012-09-03 Richard Guenther PR tree-optimization/54362 * tree-ssa-structalias.c (find_func_aliases): Handle COND_EXPR. Index: gcc/tree-ssa-structalias.c ==

Re: Speedup loop header copying [part of PR 46590]

On Sun, Sep 2, 2012 at 9:35 PM, Michael Matz wrote: > Hi, > > as the bug report tells us one speed problem is loop header copying, in > particular the update_ssa call that is done for each and every copied loop > header but touches all blocks in a function. > > Now, one idea was to use an optimize

Re: [PATCH][build] Fix PR54138, make --without-cloog work

On Tue, Aug 14, 2012 at 1:27 PM, Richard Guenther wrote: > > This makes --without-cloog and --without-isl disable GRAPHITE support > as intended. > > Tested up to building stage2 with --without-isl, verified ISL was not > used or checked for, tested up to building stage2 without --without-isl, > v

Re: [PATCH][RFC] Add -Og

On Fri, Aug 10, 2012 at 1:30 PM, Richard Guenther wrote: > > This adds a new optimization level, -Og, as previously discussed. > It aims at providing fast compilation, a superior debugging > experience and reasonable runtime performance. Instead of making > -O1 this optimization level this adds a

Re: combine BIT_FIELD_REF and VEC_PERM_EXPR

On Mon, 3 Sep 2012, Richard Guenther wrote: Please do the early outs where you compute the arguments. Thus, right after getting op0 in this case or right after computing n for the n != 1 check. Ok. I think you need to verify that the type of 'op' is actually the element type of op0. The B

Re: combine vec_perm_expr with constructor

On Sat, Aug 25, 2012 at 10:54 PM, Marc Glisse wrote: > Hello, > > this patch (bootstrapped and regtested on x86_64) deals with the same issue > as the one at: > > http://gcc.gnu.org/ml/gcc-patches/2012-08/msg00205.html > > that is combining a shuffle of a constructor into a constructor, but at the

Re: combine vec_perm_expr with constructor

On Mon, 3 Sep 2012, Richard Guenther wrote: You shouldn't need the VECTOR_CST handling - constant propagation should already ensure properly simplified code here (and is the more canonical place to handle this). IIRC, I added VECTOR_CST because of mixed constructor/vector_cst shuffles (and be

[Patch, Fortran, committed] Fix PR54467 (TBP ICEs due to _final wrapper disabling)

Committed as obvious (Rev. 190892). My patch which disabled the generation of the FINAL wrapper subroutine cut out too much, namely also normal type-bound procedures. Fixed by the obvious patch. (The wrapper is currently disabled as it would be an ABI changing patch; the current plan is to ena

Re: [PATCH][build] Fix PR54138, make --without-cloog work

On Mon, Sep 03, 2012 at 03:27:29PM +0200, Richard Guenther wrote: > On Tue, Aug 14, 2012 at 1:27 PM, Richard Guenther wrote: > > > > This makes --without-cloog and --without-isl disable GRAPHITE support > > as intended. > > > > Tested up to building stage2 with --without-isl, verified ISL was not

Re: combine BIT_FIELD_REF and VEC_PERM_EXPR

On Mon, Sep 3, 2012 at 3:39 PM, Marc Glisse wrote: > On Mon, 3 Sep 2012, Richard Guenther wrote: > >> Please do the early outs where you compute the arguments. Thus, right >> after getting op0 in this case or right after computing n for the n != 1 >> check. > > > Ok. > >> I think you need to veri

Re: combine vec_perm_expr with constructor

On Mon, Sep 3, 2012 at 4:00 PM, Marc Glisse wrote: > On Mon, 3 Sep 2012, Richard Guenther wrote: > >> You shouldn't need the VECTOR_CST handling - constant propagation should >> already ensure properly simplified code here (and is the more canonical >> place >> to handle this). > > > IIRC, I added

[Patch contrib] check_GNU_style: remove tmp file

Hi, check_GNU_style.sh currently leaves a temporary file in the current directory. This patch removes it upon exit. Christophe. 2012-09-03 Christophe Lyon * check_GNU_style.sh: Remove temporay file upon exit. check-gnu-style.patch Description: Binary data

Re: [PATCH][RFC] Add -Og

Richard Guenther writes: >> >> Comments welcome, > > No comments? Then I'll drop this idea for 4.8. FWIW I liked the idea. But I'm not really competent to review the implementation. On x86 I would enable frame pointers. Even though gdb doesn't need them, some other profiling and debugging tool

[Patch, ARM] Replace gen_rtx_CONST_INT by GEN_INT

Hi, As discussed in http://gcc.gnu.org/ml/gcc-patches/2012-09/msg00077.html, this patch is a cleanup pass to replace calls to gen_rtx_CONST_INT by GEN_INT. Tested on arm-linuxeabi with qemu. Christophe. 2012-09-03 Christophe Lyon * config/arm/arm.c (arm_expand_builtin): Replace gen_

[patch,libgcc] fp-bit.c: filter-out LIB2FUNCS_EXCLUDE

Currently LIB2FUNCS_EXCLUDE is ignoref for the bits of libgcc*.a that come from fp-bit.c, fixed by this patch. Ok to install? Johann * Makefile.in (FPBIT_FUNCS): filter-out LIB2FUNCS_EXCLUDE. (DPBIT_FUNCS): Ditto. (TPBIT_FUNCS): Ditto. Index: libgcc/Makefile.in ==

Re: combine vec_perm_expr with constructor

On Mon, 3 Sep 2012, Richard Guenther wrote: On Mon, Sep 3, 2012 at 4:00 PM, Marc Glisse wrote: On Mon, 3 Sep 2012, Richard Guenther wrote: You shouldn't need the VECTOR_CST handling - constant propagation should already ensure properly simplified code here (and is the more canonical place to

Re: [PATCH 3/3] Compute predicates for phi node results in ipa-inline-analysis.c

> On Fri, Aug 31, 2012 at 7:24 PM, Martin Jambor wrote: > > Hi, > > > > On Thu, Aug 30, 2012 at 05:11:35PM +0200, Martin Jambor wrote: > >> this is a new version of the patch which makes ipa analysis produce > >> predicates for PHI node results, at least at the bottom of the > >> simplest diamond

Re: [Patch, ARM] Replace gen_rtx_CONST_INT by GEN_INT

On 09/03/12 16:28, Christophe Lyon wrote: Hi, As discussed in http://gcc.gnu.org/ml/gcc-patches/2012-09/msg00077.html, this patch is a cleanup pass to replace calls to gen_rtx_CONST_INT by GEN_INT. Tested on arm-linuxeabi with qemu. Ok. Thanks for doing this so quickly. Thanks, Ramana

Re: [PATCH][RFC] Add -Og

Hi, On Mon, 3 Sep 2012, Richard Guenther wrote: > > Comments welcome, > > No comments? Then I'll drop this idea for 4.8. Hey, don't discard my face2face comments :) Regarding -Og it's about time, I like it, and your implementation is a start. The pass list (e.g. if to include LIM or not, o

Re: [PATCH, C] Mixed pointer types in call to streamer_tree_cache_lookup() in gcc/lto-streamer-out.c

On 09/03/2012 03:27 PM, Richard Guenther wrote: On Sat, Sep 1, 2012 at 2:21 PM, Andris Pavenis wrote: uint32_t * is used as a 3rd parameter in call to streamer_tree_cache_lookup() in 2 places in gcc/lto-streamer-out.c when the procedure prototype have unsigned *. They are not guaranteed to be t

Re: combine BIT_FIELD_REF and VEC_PERM_EXPR

On Mon, 3 Sep 2012, Richard Guenther wrote: + if (code == VEC_PERM_EXPR) +{ + tree p, m, index, tem; + unsigned nelts; + m = gimple_assign_rhs3 (def_stmt); + if (TREE_CODE (m) != VECTOR_CST) + return false; + nelts = VECTOR_CST_NELTS (m); + idx = TREE_INT

[Patch,avr] PR54461: Better AVR-Libc integration

AVR-Libc comes with hand-optimized float support functions written in assembler. These functions use the same naming conventions like libgcc. There are situations where this name clashed lead to performance regression because the functions from libgcc are linked. One example are the new fixed-po

[Patch,avr] Fix PR54220

This implements TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS as obvious fix for PR54220. Ok to install? Johann PR target/54220 * config/avr/avr.c (TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS): New define to... (avr_allocate_stack_slots_for_args): ...this new static function. In

Re: [PATCH] Fix emit_conditional_add and documentation for add@var{mode}cc

On Mon, Sep 3, 2012 at 4:12 AM, Richard Guenther wrote: > On Sat, Aug 25, 2012 at 12:43 AM, Andrew Pinski wrote: >> Forgot to attach the patch. >> >> -- Andrew >> >> On Fri, Aug 24, 2012 at 3:42 PM, Andrew Pinski wrote: >>> Hi, >>> I decided to split this patch from the other patch which uses

Re: [Patch,avr] PR54461: Better AVR-Libc integration

On Mon, Sep 3, 2012 at 11:29 AM, Georg-Johann Lay wrote: > AVR-Libc comes with hand-optimized float support functions written > in assembler. These functions use the same naming conventions like > libgcc. There are situations where this name clashed lead to performance > regression because the f

Re: [PATCH][RFC] Add -Og

On Mon, Sep 3, 2012 at 6:28 AM, Richard Guenther wrote: > On Fri, Aug 10, 2012 at 1:30 PM, Richard Guenther wrote: >> >> This adds a new optimization level, -Og, as previously discussed. >> It aims at providing fast compilation, a superior debugging >> experience and reasonable runtime performanc

Re: [Patch,avr] PR54461: Better AVR-Libc integration

Gabriel Dos Reis schrieb: On Mon, Sep 3, 2012 at 11:29 AM, Georg-Johann Lay wrote: AVR-Libc comes with hand-optimized float support functions written in assembler. These functions use the same naming conventions like libgcc. There are situations where this name clashed lead to performance reg

Re: [PATCH][RFC] Add -Og

"H.J. Lu" wrote: >On Mon, Sep 3, 2012 at 6:28 AM, Richard Guenther > wrote: >> On Fri, Aug 10, 2012 at 1:30 PM, Richard Guenther >wrote: >>> >>> This adds a new optimization level, -Og, as previously discussed. >>> It aims at providing fast compilation, a superior debugging >>> experience and re

Re: [PATCH][RFC] Add -Og

On Mon, Sep 3, 2012 at 11:50 AM, wrote: > "H.J. Lu" wrote: > >>On Mon, Sep 3, 2012 at 6:28 AM, Richard Guenther >> wrote: >>> On Fri, Aug 10, 2012 at 1:30 PM, Richard Guenther >>wrote: This adds a new optimization level, -Og, as previously discussed. It aims at providing fast com

Re: [Patch,avr] PR54461: Better AVR-Libc integration

On Mon, Sep 3, 2012 at 1:46 PM, Georg-Johann Lay wrote: > Gabriel Dos Reis schrieb: > >> On Mon, Sep 3, 2012 at 11:29 AM, Georg-Johann Lay wrote: >>> >>> AVR-Libc comes with hand-optimized float support functions written >>> in assembler. These functions use the same naming conventions like >>>

Re: [Patch,avr] PR54461: Better AVR-Libc integration

Gabriel Dos Reis schrieb: Georg-Johann Lay wrote: Gabriel Dos Reis schrieb: Georg-Johann Lay wrote: AVR-Libc comes with hand-optimized float support functions written in assembler. These functions use the same naming conventions like libgcc. There are situations where this name clashed lead

Re: [patch] Fix PR rtl-optimization/54290

> 2012-09-02 Eric Botcazou > > PR rtl-optimization/54290 > * reload1.c (choose_reload_regs): Also take into account secondary MEMs > to remove address replacements for inherited reloads. I forgot to attach the testcase... * gcc.c-torture/execute/20120902-1.c: New tes

[PATCH] Improve the mode which is used for insertion

Hi, On MIPS it is better sometimes not to use the word mode (DImode) but rather SImode. The main reason is for 32bits, the value has to be sign extended to 64bits so using the 32bit instruction for insertion is allows for that to happen automatically. This patch implements this by adding a targ

[PATCH] PR45070: Fix wrong epilogue code for cortex-m0/Os

Hi, I found below regression tests are failed on trunk for cortex-m0/Os: FAIL: gcc.c-torture/execute/pr45070.c execution, -Os FAIL: gcc.dg/compat/struct-layout-1 c_compat_x_tst.o-c_compat_y_tst.o execute FAIL: gcc.dg/compat/struct-return-2 c_compat_x_tst.o-c_compat_y_tst.o execute FAIL: tmpdir-gc

beta distribution

Another distribution missing is beta, related to the gamma distribution. Instead of the complex formula I've used an iterative process, similar to the one used for the normal distribution. There is no real surprise here, there are two scalar parameters. Unless someone things this distribution fo

[PATCH, M68K] Fix ICE from scheduler improvement

Andreas, This patch updates scheduling support for m68k to handle propagation of scheduler automaton states between basic blocks that Bernd checked in a couple of weeks ago. Currently m68k build fails on an assert that checks that basic block starts with a clean scheduler state, which no longe

Re: [Patch,avr] PR54461: Better AVR-Libc integration

As Georg-Johann Lay wrote: > What do you propose? I'm fine with that option, and think it's a good idea. -- cheers, J"org .-.-. --... ...-- -.. . DL8DTL http://www.sax.de/~joerg/NIC: JW11-RIPE Never trust an operating system you don't have sources for

Re: beta distribution

2012/9/4 Ulrich Drepper : > Another distribution missing is beta, related to the gamma > distribution. Instead of the complex formula I've used an iterative > process, similar to the one used for the normal distribution. There > is no real surprise here, there are two scalar parameters. Unless >

RE: [Patch ARM] Update the test case to differ movs and lsrs for ARM mode and non-ARM mode

> -Original Message- > From: Richard Earnshaw > Sent: Wednesday, August 22, 2012 10:00 PM > To: Terry Guo > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [Patch ARM] Update the test case to differ movs and lsrs > for ARM mode and non-ARM mode > > On 22/08/12 12:16, Terry Guo wrote: > > > >>

[Ping]RE: [Patch, test] Enable to prune warnings for tests defined in one exp file

Hi Mike, Is it ok to document this feature in README.gcc? Is it ok to back port this feature to 4.7 branch? Thanks. BR, Terry > -Original Message- > From: Terry Guo [mailto:terry@arm.com] > Sent: Thursday, August 30, 2012 10:45 AM > To: 'Mike Stump' > Cc: gcc-patches@gcc.gnu.org; Ric

Re: [Patch,avr] PR54461: Better AVR-Libc integration

2012/9/4 Joerg Wunsch : > As Georg-Johann Lay wrote: > >> What do you propose? > > I'm fine with that option, and think it's a good idea. > I have not objections against the patch. Denis

Re: [Patch,avr] Fix PR54220

2012/9/3 Georg-Johann Lay : > This implements TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS as > obvious fix for PR54220. > > Ok to install? > > Johann > > > PR target/54220 > * config/avr/avr.c (TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS): New > define to... > (avr_allocate_stack_

Re: [Patch,avr] PR54461: Better AVR-Libc integration

On Mon, Sep 3, 2012 at 4:23 PM, Georg-Johann Lay wrote: > Gabriel Dos Reis schrieb: >> >> Georg-Johann Lay wrote: >>> >>> Gabriel Dos Reis schrieb: Georg-Johann Lay wrote: > > AVR-Libc comes with hand-optimized float support functions written > in assembler. These functions

[SH] Define NO_IMPLICIT_EXTERN_C for newlib targets

newlib uses extern "C" wrappers in its headers, so GCC can be told it is C++ compatible. this patch fixes : FAIL: g++.dg/lookup/builtin5.C -std=c++11 scan-assembler _ZSt5atanhd t Tested om the 4.7 and 4.8 branches, OK for both ? nb: newlib can be added to the list of runtimes that need it (see

Re: [Patch,avr] PR54461: Better AVR-Libc integration

Gabriel Dos Reis schrieb: Georg-Johann Lay wrote: Gabriel Dos Reis schrieb: Georg-Johann Lay wrote: Gabriel Dos Reis schrieb: Georg-Johann Lay wrote: AVR-Libc comes with hand-optimized float support functions written in assembler. These functions use the same naming conventions like libgcc.