Hello,
by recent changes gcc begun to move code into the prologue region.
This is for x64 SEH an issue, as here the table-information for
prologue is limited to 255 bytes size. So we need to avoid moving
additional code into prologue. To achieve this we mark all standard
and xmm registers as pro
> The problem is that the references to object C1 and C2 live in
> a hash table, and that although the referenced nodes will be retained
> by the garbage collector, their mapping in int_cst_hash_table is
> deleted by the GC.
This isn't a simple hash table, is it?
> I am not familiar with the deta
On 10/12/11 09:27:43, Eric Botcazou wrote:
> > The problem is that the references to object C1 and C2 live in
> > a hash table, and that although the referenced nodes will be retained
> > by the garbage collector, their mapping in int_cst_hash_table is
> > deleted by the GC.
>
> This isn't a simpl
On 10/10/2011 05:50 PM, Eric Botcazou wrote:
>> So, the patch for build_constant_desc does not have the desired effect.
>
> OK, too bad that we need to play this back-and-forth game with MEMs. So the
> original patch is OK (with TREE_READONLY (base) on the next line to mimic
> what
> is done j
> It maps a type node into a corresponding integer node that is
> the "blocking factor" associated with the type node. Before
> the advent of this hash table the blocking factor was stored
> in a dedicated field in the tree type node. The suggestion was
> made to move this into a hash table to sa
On 12/10/11 01:48, Ramana Radhakrishnan wrote:
>> Any objections to this version of the patch ?
>
> Fine with me though I think it's worthwhile to have such comments
> without -dA but that's my personal impression. I don't care either
> way.
>
> cheers
> Ramana
>
Why not define an enum in arm.
2011/10/11 Georg-Johann Lay :
> This patch teaches avr-gcc to skip 2-word instructions like STS and LDS.
>
> It's just about looking into an 2-word insn and check if it's a 2-word
> instruction or not.
>
> Passes without regression. Ok to install?
Please commit.
Denis.
On Tue, 11 Oct 2011, Ian Lance Taylor wrote:
> On Tue, Oct 11, 2011 at 4:40 AM, Richard Guenther wrote:
>
> > this function misses to transfer TREE_THIS_NOTRAP which is supposed
> > to be set on the base of old_ref or any contained ARRAY[_RANGE]_REF.
> > If you make the function generic please a
2011/10/11 Michael Matz :
> Hi,
>
> On Tue, 11 Oct 2011, Kai Tietz wrote:
>
>> So updated version for patch. It creates new simple_operand_p_2
>> function instead of modifying simple_operand_p function.
>
> FWIW: I also can't think of a nice short name for that predicate function
> :) One thing:
Denis Chertykov schrieb:
> 2011/10/11 Georg-Johann Lay :
>> This patch teaches avr-gcc to skip 2-word instructions like STS and LDS.
>>
>> It's just about looking into an 2-word insn and check if it's a 2-word
>> instruction or not.
>>
>> Passes without regression. Ok to install?
>
> Please commit
Hi Guys,
I am checking in the patch below to add comments to the
.eabi_attribute assembler directives emitted by the ARM backend, when
commented assembler output is enabled.
Cheers
Nick
gcc/ChangeLog
2011-10-12 Nick Clifton
* config/arm/arm.h (EMIT_EABI_ATTRIBUTE): New macro.
Hi,
thus, per the discussion in the audit trail, I'm proceeding with
decorating with __attribute__((externally_visible)) both the 8 new and
delete in , and the 4 pre-declared by the C++ front-end. The below
is what I regression tested successfully, together with the library
bits, on x86_64-li
On Tue, Oct 11, 2011 at 5:32 PM, Joseph S. Myers
wrote:
> This patch fixes PR 50565, a failure to accept certain offsetof-type
> expressions in static initializers introduced by my constant
> expressions changes. (These expressions are permitted but not
> required by ISO C to be accepted; the int
Hi,
On Wed, 12 Oct 2011, Kai Tietz wrote:
> > And I think it could use some overview of the transformation done like in
> > the initial patch, ala:
> >
> > "Transform ((A && B) && C) into (A && (B & C))."
> >
> > and
> >
> > "Or (A && B) into (A & B)." for this part:
> >
> > + /* Needed for s
On Wed, Oct 12, 2011 at 8:50 AM, Maxim Kuvyrkov wrote:
> The following patch adds new knob to make GCC perform several iterations of
> early optimizations and inlining.
>
> This is for dont-care-about-compile-time-optimize-all-you-can scenarios.
> Performing several iterations of optimizations
On Wed, Oct 12, 2011 at 10:29 AM, Eric Botcazou wrote:
>> It maps a type node into a corresponding integer node that is
>> the "blocking factor" associated with the type node. Before
>> the advent of this hash table the blocking factor was stored
>> in a dedicated field in the tree type node. Th
2011/10/12 Michael Matz :
> Hi,
>
> On Wed, 12 Oct 2011, Kai Tietz wrote:
>
>> > And I think it could use some overview of the transformation done like in
>> > the initial patch, ala:
>> >
>> > "Transform ((A && B) && C) into (A && (B & C))."
>> >
>> > and
>> >
>> > "Or (A && B) into (A & B)." for
On Tue, Oct 11, 2011 at 13:52, Delesley Hutchins wrote:
> This patch fixes an error where Annotalysis generates bogus warnings
> when using lock and unlock functions that are attached to a base class.
> The canonicalize routine did not work correctly in this case.
>
> Bootstrapped and passed gcc r
On Sun, Oct 9, 2011 at 13:11, Andi Kleen wrote:
> Is it still a good idea?
Given that you found no speedups and it introduces added complexity, I
think it's best if we revisit the idea later. I never found bytecode
reading to be a bottleneck in LTO, but perhaps Jan can comment what
the experien
On Mon, Oct 10, 2011 at 17:28, Sandeep Soni wrote:
> 2011-10-11 Sandeep Soni
>
> * parser.c (gp_parse_var_decl): Fixed a bug for the
> missing symbol 'CPP_LESS' in the 'INTEGER_TYPE' declaration.
OK.
Diego.
On 10/12/2011 07:26 AM, Paolo Carlini wrote:
+delattrs
+ = build_tree_list (get_identifier ("externally_visible"),
+build_tree_list (NULL_TREE, integer_one_node));
Why integer_one_node?
Jason
On Wed, Oct 12, 2011 at 8:35 AM, Tom de Vries wrote:
> Richard,
>
> I have a patch for PR50672.
>
> When compiling the testcase from the PR with -ftree-tail-merge, the scenario
> is
> as follows:
>
> We start out tail_merge_optimize with blocks 14 and 20, which are alike, but
> not
> equal, sinc
On Tue, Oct 11, 2011 at 09:42, Tom Tromey wrote:
>> "Sandeep" == Sandeep Soni writes:
>
> Sandeep> The following patch is a basic attempt to build a symbol table that
> Sandeep> stores the names of all the declarations made in the input file.
>
> I don't know anything about gimplefe, but unle
> On Sun, Oct 9, 2011 at 13:11, Andi Kleen wrote:
>
> > Is it still a good idea?
>
> Given that you found no speedups and it introduces added complexity, I
> think it's best if we revisit the idea later. I never found bytecode
> reading to be a bottleneck in LTO, but perhaps Jan can comment wha
This fixes __builtin_object_size folding on static storage accessed
via a type with a trailing array element.
Bootstrapped and tested on x86_64-unknown-linux-gnu, will apply
after testing on the 4.6 branch.
Thanks,
Richard.
2011-10-12 Richard Guenther
PR tree-optimization/50700
Hi,
On Wed, 12 Oct 2011, Kai Tietz wrote:
> > Hmm? What do you mean? Both operations are binary. ANDIF is '&&', AND
> > is '&'. In fold-const.c comments we usually use the C notations of the
> > operations.
>
> See TRUTH_AND_EXPR is in C-notation && and TRUTH_ANDIF_EXPR is also
> &&.
Ah rig
This changes VRP to use the type of the variable we record
an assertion for to look for TYPE_MIN/MAX_VALUEs rather than
the limit that it is tested against. That makes sense anyway
and happens to mitigate the wrong-code bug for the testcase
in PR50189.
Bootstrapped on x86_64-unknown-linux-gnu, t
On 10/12/2011 02:18 PM, Jason Merrill wrote:
On 10/12/2011 07:26 AM, Paolo Carlini wrote:
+delattrs
+ = build_tree_list (get_identifier ("externally_visible"),
+ build_tree_list (NULL_TREE, integer_one_node));
Why integer_one_node?
To be honest? No idea, I copied what pre-
On Wed, Oct 12, 2011 at 2:29 PM, Paolo Carlini wrote:
> On 10/12/2011 02:18 PM, Jason Merrill wrote:
>>
>> On 10/12/2011 07:26 AM, Paolo Carlini wrote:
>>>
>>> + delattrs
>>> + = build_tree_list (get_identifier ("externally_visible"),
>>> + build_tree_list (NULL_TREE, integer_o
Hi,
On Tue, 11 Oct 2011, Richard Guenther wrote:
> Since we have the alias oracle we no longer optimize the testcase below
> because I initially restricted the stmt walking to give up for PHIs with
> more than 2 arguments because of compile-time complexity issues. But
> it's easy to see that c
On 10/11/11 14:35, Richard Sandiford wrote:
> No, reload 1 is inherited by a later instruction. And it's inherited
> correctly, in terms of the register contents being what we expect.
> (Reload 1 is the one that survives to the end of the instruction's
> reload sequence. Reload 2, in contrast, is
On 11-10-12 08:25 , Jan Hubicka wrote:
WPA is currently about 1/3 of reading&type merging, 1/3 of streaming out and
1/3 of inlining. inlining is relatively easy to cure, so yes, streaming
performance is important. The very basic streaming primitives actualy still
shows top in profile along wit
2011/10/12 Georg-Johann Lay :
> Denis Chertykov schrieb:
>> 2011/10/11 Georg-Johann Lay :
>>> This patch teaches avr-gcc to skip 2-word instructions like STS and LDS.
>>>
>>> It's just about looking into an 2-word insn and check if it's a 2-word
>>> instruction or not.
>>>
>>> Passes without regres
Hi,
+delattrs
+ = build_tree_list (get_identifier ("externally_visible"),
+ build_tree_list (NULL_TREE, integer_one_node));
Why integer_one_node?
To be honest? No idea, I copied what pre-existed for operator new. Shall I
test (NULL_TREE, NULL_TREE)??
build_tree_list (get_i
... or like this, maybe better.
Paolo.
/
Index: decl.c
===
--- decl.c (revision 179842)
+++ decl.c (working copy)
@@ -3654,7 +3654,7 @@ cxx_init_decl_processing (void)
current_lang_name = lang_name_c
On 11-10-10 17:47 , Sandeep Soni wrote:
Hi,
The following patch is a basic attempt to build a symbol table that
stores the names of all the declarations made in the input file.
Index: gcc/gimple/parser.c
===
--- gcc/gimple/parser.c
Hi,
dropping the optional DWARF attribute DW_AT_sibling has only advantages and no
disadvantages:
For files with .gdb_index GDB initial scan does not use DW_AT_sibling at all.
For files without .gdb_index GDB initial scan has 1.79% time _improvement_.
For .debug files it brings 3.49% size decreas
Hello all,
this patch does two things:
a) It updates the Fortran 2003 and TR/TS 29113 status in the GNU Fortran
manual.
b) It changes all references to Technical Report 29113 to Technical
Specification 29113
c) It changes -std=f2008tr to -std=f2008ts
(a) is obvious.
Regarding (b): For some r
On Oct 12, 2011, at 3:50 PM, Jan Kratochvil wrote:
> Hi,
>
> dropping the optional DWARF attribute DW_AT_sibling has only advantages and no
> disadvantages:
>
> For files with .gdb_index GDB initial scan does not use DW_AT_sibling at all.
> For files without .gdb_index GDB initial scan has 1.79
I have committed the attached patch to the 4.7 trunk (rev 179854) and
the 4.6 branch (rev 179855).
invoke.texi wasn't updated when -fwhole-file became the default in GCC
4.6. This was spotted by Janus, who created the first draft patch. This
patch was approved by Janus off list.
Tobias
On 1
On Wed, 12 Oct 2011 16:07:24 +0200, Tristan Gingold wrote:
> I fear that this may degrade performance of other debuggers. What about
> adding a command line option ?
I can test idb, there aren't so many DWARF debuggers out there I think.
If the default is removed DW_AT_sibling a new options may
> On 11-10-12 08:25 , Jan Hubicka wrote:
>
>> WPA is currently about 1/3 of reading&type merging, 1/3 of streaming out and
>> 1/3 of inlining. inlining is relatively easy to cure, so yes, streaming
>> performance is important. The very basic streaming primitives actualy still
>> shows top in prof
I don't think that will fix this bug. The bug occurs if:
(1) The exclusive lock set has error_mark_node.
(2) The shared lock set has the actual lock.
In this case, remove_lock_from_lockset thinks that it has found the
lock in the exclusive lock set, and fails to remove it from the shared
lock set
On Wed, 12 Oct 2011, Richard Guenther wrote:
>
> This changes VRP to use the type of the variable we record
> an assertion for to look for TYPE_MIN/MAX_VALUEs rather than
> the limit that it is tested against. That makes sense anyway
> and happens to mitigate the wrong-code bug for the testcase
On Wed, 12 Oct 2011, Michael Matz wrote:
> Hi,
>
> On Tue, 11 Oct 2011, Richard Guenther wrote:
>
> > Since we have the alias oracle we no longer optimize the testcase below
> > because I initially restricted the stmt walking to give up for PHIs with
> > more than 2 arguments because of compil
Hi,
no need to test a phi argument with itself (testing arg0 != arg1 is not
the right test, though, so remembering the candidate index):
> @@ -1948,18 +1958,35 @@ get_continuation_for_phi (gimple phi, ao
> until we hit the phi argument definition that dominates the other one.
> */
>
On Tue, Oct 11, 2011 at 9:11 AM, Artem Shinkarov
wrote:
>
> Committed with the revision 179807.
>
>
This caused:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50704
--
H.J.
Hi!
This patch allows vectorization of some loops that use
bool (which is especially important now that we use bool more often
even for stmts that weren't originally using bool in the sources),
in particular (when bool is cast to an integer type, and the bool rhs
has def stmts within the loop as e
On 10/12/2011 12:07 AM, Kai Tietz wrote:
> Hello,
>
> by recent changes gcc begun to move code into the prologue region.
> This is for x64 SEH an issue, as here the table-information for
> prologue is limited to 255 bytes size. So we need to avoid moving
> additional code into prologue. To achie
Hi!
This patch started with noticing while working on PR50596 that
#define N 1024
long long a[N];
char b[N];
void
foo (void)
{
int i;
for (i = 0; i < N; i++)
b[i] = a[i];
}
is even with -O3 -mavx2 vectorized just with 16-byte vectors
instead of 32-byte vectors and has various fixes I've no
Hi!
On
long long a[1024], c[1024];
char b[1024];
void
foo (void)
{
int i;
for (i = 0; i < 1024; i++)
b[i] = a[i] + 3 * c[i];
}
I've noticed that while i?86 backend supports
mulv16qi3, it doesn't support mulv32qi3 even with AVX2.
The following patch implements that similarly how
mulv16qi3
On 10/12/11 14:00:54, Richard Guenther wrote:
> I think there is an issue when two cache htabs refer to each other
> with respect to GC, you might search the list to find out more.
Richard, thanks. I thought that might be the case, but
I don't understand the GC well enough to make this determinat
On Tue, Oct 11, 2011 at 9:47 AM, Jason Merrill wrote:
> That looks pretty good, but do you really need to build up a separate data
> structure to search? You seem to be searching it in the same order that
> it's built up, so why not just walk the expansion chain directly when
> searching?
Agree
2011/10/12 Richard Henderson :
> On 10/12/2011 12:07 AM, Kai Tietz wrote:
>> Hello,
>>
>> by recent changes gcc begun to move code into the prologue region.
>> This is for x64 SEH an issue, as here the table-information for
>> prologue is limited to 255 bytes size. So we need to avoid moving
>> ad
On 10/12/2011 09:54 AM, Kai Tietz wrote:
> +;; We need to disable this for TARGET_SEH, as otherwise
> +;; shrink-wrapped prologue gets enabled too. This might exceed
> +;; the maximum size of prologue in unwind information.
> +
> (define_expand "simple_return"
>[(simple_return)]
> - ""
> +
Hi,
this adds a mean to retain restrict information without relying on
restrict casts. In the patch it's emitted by the gimplifier when it sees
a norestrict->restrict cast (which from then on is useless), at which
point also the tag of that restrict pointer is generated. That's later
used by
On Tue, Oct 11, 2011 at 8:37 AM, H.J. Lu wrote:
> On Tue, Oct 11, 2011 at 3:12 AM, Kirill Yukhin
> wrote:
>> Hi
>> Uros, you was right both with fpmath and configflags. That is why it
>> was passing for me.
>>
>> Attached patch which cures the problem.
>>
>> testsuite/ChangeLog entry:
>>
>> 2011
On 10/12/2011 09:09 AM, Jakub Jelinek wrote:
> /* Multiply the shuffle indicies by two. */
> - emit_insn (gen_avx2_lshlv8si3 (t1, t1, const1_rtx));
> + if (maskmode == V8SImode)
> + emit_insn (gen_avx2_lshlv8si3 (t1, t1, const1_rtx));
> + else
> + emit_ins
Copying the decl is unlikely to do what we want, I think. Does putting the
target decl directly into the method vec work?
Unfortunately not, it ends up with the same error: undefined
reference.
Hunh, that's surprising.
Furthermore, I don't think it is the right approach since
the access may
On 10/12/2011 09:18 AM, Paolo Carlini wrote:
newattrs
= build_tree_list (get_identifier ("alloc_size"),
build_tree_list (NULL_TREE, integer_one_node));
+extvisattr = build_tree_list (get_identifier ("externally_visible"),
+
On Wed, Oct 12, 2011 at 07:16:56PM +0200, Michael Matz wrote:
> This patch will fix the currently XFAILed tree-ssa/restrict-4.c again, as
> well as fix PR 50419. It also still fixes the original testcase of
> PR 49279. But it will break the checked in testcase for this bug report.
> I believe
On 10/12/2011 01:05 AM, Ed Smith-Rowland wrote:
cp_parser_operator(function_id) is simply run twice in
cp_parser_unqualified_id.
Once inside cp_parser_template_id called at parser.c:4515.
Once directly inside cp_parser_unqualified_id at parser.c:4525.
Ah. You could try replacing the operator "
On 10/12/2011 07:56 PM, Jason Merrill wrote:
On 10/12/2011 09:18 AM, Paolo Carlini wrote:
newattrs
= build_tree_list (get_identifier ("alloc_size"),
build_tree_list (NULL_TREE, integer_one_node));
+extvisattr = build_tree_list (get_identifier
("externally_visibl
OK.
Jason
On Sun, Oct 09, 2011 at 12:55:40PM +0200, Uros Bizjak wrote:
> BTW: No need to use %c modifier:
>
> /* Meaning of CODE:
>L,W,B,Q,S,T -- print the opcode suffix for specified size of operand.
>C -- print opcode suffix for set/cmov insn.
>c -- like C, but print reversed condition
>..
Hi,
these are the library bits, which I committed together with the
front-end bits approved by Jason. Tested x86_64-linux.
Paolo.
2011-10-12 Paolo Carlini
PR c++/50594
* libsupc++/new (operator new, operator delete): Decorate with
__attribute__
Committed to the 4.6 branch as r179864:
http://gcc.gnu.org/viewcvs?view=revision&revision=179723
Cheers,
Janus
2011/10/9 Janus Weil :
> Hi all,
>
> I have just committed as obvious a patch for an ICE-on-valid problem
> with PROCEDURE statements:
>
> http://gcc.gnu.org/viewcvs?root=gcc&view=rev
This moves the allocation of sorted_fields_type elements into a new
allocator function. It's not completely necessary in trunk, but in
the pph branch we need to allocate this type from pph images, so we
need to call it from outside of class.c
OK for trunk?
Tested on x86_64.
Diego.
* c
I added this code while learning my way through the parser. It dumps
most of the internal parser state. It also changes the lexer dumper
to support dumping a window of tokens and highlighting a specific
token when dumping.
Tested on x86_64.
OK for trunk?
Diego.
* parser.c: Remove ENA
Richard,
This patch fixes a trivial problem in gimplify_parameters, introduced by the
patch that introduced BUILT_IN_ALLOCA_WITH_ALIGN.
BUILT_IN_ALLOCA_WITH_ALIGN has 2 parameters, so the number of arguments in the
corresponding build_call_expr should be 2, not 1.
Bootstrapped and reg-tested (inc
On 10/12/2011 11:25 AM, Jakub Jelinek wrote:
> * config/i386/sse.md (avx2_gathersi,
> avx2_gatherdi, avx2_gatherdi256): Add clobber of
> match_scratch, change memory_operand to register_operand,
> add (mem:BLK (scratch)) use.
> (*avx2_gathersi, *avx2_gatherdi,
>
On 10/12/2011 09:24 AM, Jakub Jelinek wrote:
> BTW, I wonder if vector multiply expansion when one argument is VECTOR_CST
> with all elements the same shouldn't use something similar to what expand_mult
> does, not sure if in the generic code or at least in the backends.
> Testing the costs will be
From: Eric Botcazou
Date: Wed, 12 Oct 2011 00:33:43 +0200
>> I see, so we can test the code generation in the testsuite even if the
>> compiler was built against an assembler without support for the
>> instructions.
>
> At least partially, yes.
>
>> But in such a case, I'm unsure if I understan
This patch is needed in the pph branch because streamers need access
to the fields in struct language_function without going through
cp_function_chain.
Since these fields are named exactly like their #define counterparts,
we cannot reference them without the pre-processor expanding the
#defines,
Bernd Schmidt writes:
> On 10/11/11 14:35, Richard Sandiford wrote:
>> No, reload 1 is inherited by a later instruction. And it's inherited
>> correctly, in terms of the register contents being what we expect.
>> (Reload 1 is the one that survives to the end of the instruction's
>> reload sequenc
On 10/12/2011 04:48 PM, Diego Novillo wrote:
This patch is needed in the pph branch because streamers need access
to the fields in struct language_function without going through
cp_function_chain.
Since these fields are named exactly like their #define counterparts,
we cannot reference them with
OK.
Jason
> I think there is an issue when two cache htabs refer to each other
> with respect to GC, you might search the list to find out more.
I'm not sure this is the case here, there seems to be a clear hierarchy.
--
Eric Botcazou
> I'm currently testing the following patch in various scenerios, I'm pretty
> sure this is what you had in mind.
Yes, this seems to go in the right direction. Don't you need to pass -mvis3
instead of -mvis? Do you need to pass -mcpu=niagara3 at all?
--
Eric Botcazou
From: Eric Botcazou
Date: Wed, 12 Oct 2011 23:08:39 +0200
>> I'm currently testing the following patch in various scenerios, I'm pretty
>> sure this is what you had in mind.
>
> Yes, this seems to go in the right direction. Don't you need to pass -mvis3
> instead of -mvis? Do you need to pass
On Wed, Oct 12, 2011 at 10:49:33AM -0700, Richard Henderson wrote:
> I believe I've commented on everything else in the previous messages.
Here is an updated patch which should incorporate your comments from both
mails (thanks for them). Bootstrapped/regtested on x86_64-linux and
i686-linux, ok f
Hi!
This patch allows to vectorize
char a[1024], c[1024];
long long b[1024];
void
foo (void)
{
int i;
for (i = 0; i < 1024; i++)
b[i] = a[i] + 3 * c[i];
}
using 32-byte vectors with -mavx2. Bootstrapped/regtested
on x86_64-linux and i686-linux, ok for trunk?
2011-10-12 Jakub Jelinek
This patch fixed PR50704.
gcc/testsuite:
* gcc.target/i386/warn-vect-op-3.c: Exclude ia32 target.
* gcc.target/i386/warn-vect-op-1.c: Ditto.
* gcc.target/i386/warn-vect-op-2.c: Ditto.
Ok for trunk?
Artem.
On Wed, Oct 12, 2011 at 4:40 PM, H.J. Lu wrote:
> On Tue, Oct 11,
On 10/12/2011 02:23 PM, Jakub Jelinek wrote:
> 2011-10-12 Jakub Jelinek
>
> * config/i386/i386.md (UNSPEC_VPERMDI): Remove.
> * config/i386/i386.c (ix86_expand_vec_perm): Handle
> V16QImode and V32QImode for TARGET_AVX2.
> (MAX_VECT_LEN): Increase to 32.
> (expand_
On 10/12/2011 02:28 PM, Jakub Jelinek wrote:
> 2011-10-12 Jakub Jelinek
>
> * config/i386/sse.md (vec_unpacks_lo_,
> vec_unpacks_hi_, vec_unpacku_lo_,
> vec_unpacku_hi_): Change VI124_128 mode to
> VI124_AVX2.
> * config/i386/i386.c (ix86_expand_sse_unpack): Handle
Loops with static bounds are reasonably well vectorized in Ada. Problems arise
when things start to go dynamic, because of the dynamic bounds themselves but
also because of the checks. This patch is a first step towards enabling more
vectorization in the dynamic cases. The generated code isn'
Tested on i586-suse-linux, applied on the mainline.
2011-10-12 Eric Botcazou
* gcc-interface/trans.c (Attribute_to_gnu): Use remove_conversions.
(push_range_check_info): Likewise.
(gnat_to_gnu) : Likewise.
* gcc-interface/utils2.c (build_unary_op) : Likewise.
I suppose technically the middle-end could be improved to implement
ashl as vashl by broadcasting the scalar, but Altivec
is the only extant SIMD ISA that would make use of this. All of
the others can arrange for constant shifts to be encoded into the
insn, and so implement the ashl named pattern.
From: David Miller
Date: Wed, 12 Oct 2011 17:14:59 -0400 (EDT)
> From: Eric Botcazou
> Date: Wed, 12 Oct 2011 23:08:39 +0200
>
>>> I'm currently testing the following patch in various scenerios, I'm pretty
>>> sure this is what you had in mind.
>>
>> Yes, this seems to go in the right directio
Hi,
When combine tries to combine:
(insn 37 35 39 3 (set (reg:SI 90)
(plus:SI (mult:SI (reg/v:SI 84 [ i ])
(const_int 4 [0x4]))
(reg:SI 106))) x.i:11 247 {*leasi_2}
(nil))
(insn 39 37 41 3 (set (mem:SI (zero_extend:DI (reg:SI 90)) [3
MEM[symbol: x,
index:
From: Richard Henderson
Date: Wed, 12 Oct 2011 15:32:46 -0700
> I suppose technically the middle-end could be improved to implement
> ashl as vashl by broadcasting the scalar, but Altivec
> is the only extant SIMD ISA that would make use of this. All of
> the others can arrange for constant shif
> X86 backend doesn't accept the new expression as valid address while
> (zero_extend:DI) works just fine. This patches keeps ZERO_EXTEND
> when zero-extending address to Pmode. It reduces number of lea from
> 24173 to 21428 in x32 libgfortran.so. Does it make any senses?
I'd be inclined to hav
The generic support for vector permutation will allow for automatic
lowering to V*QImode, so all we need to add to support for these targets
is the single V16QI pattern that represents the base permutation insn.
I'm not touching any of the other ways that the permutation insn
could be generated.
They weren't enabled for the Ada part of the front-end and the C part of the
library. Of course there are a few warnings...
Tested on i586-suse-linux, applied on the mainline.
2011-10-12 Eric Botcazou
gnattools/
* Makefile.in (LOOSE_WARN): Delete.
(GCC_WARN_CFLAGS): Set to
On 10/12/2011 03:37 PM, David Miller wrote:
> From: Richard Henderson
> Date: Wed, 12 Oct 2011 15:32:46 -0700
>
>> I suppose technically the middle-end could be improved to implement
>> ashl as vashl by broadcasting the scalar, but Altivec
>> is the only extant SIMD ISA that would make use of thi
The pph streamer does not write out expanded locations. It emits the
line map tables exactly as it found them on the initial compile so
that it can recreate them when the pph image is restored.
This allows it to emit the location_t as integers and produce the same
line locations than the origina
On Wed, Oct 12, 2011 at 3:40 PM, Richard Kenner
wrote:
>> X86 backend doesn't accept the new expression as valid address while
>> (zero_extend:DI) works just fine. This patches keeps ZERO_EXTEND
>> when zero-extending address to Pmode. It reduces number of lea from
>> 24173 to 21428 in x32 libgf
From: Richard Henderson
Date: Wed, 12 Oct 2011 15:49:28 -0700
> Ok, if I read the rtl correctly, you can perform a vector shift,
> where each shift count comes from the corresponding element of op2.
> But VIS has no vector shift where the shift count comes from a
> single scalar (immediate or reg
> 1. The placement of subreg in
>
> (plus:DI (subreg:DI (mult:SI (reg/v:SI 85 [ i ])
> (const_int 4 [0x4])) 0)
> (subreg:DI (reg:SI 106) 0))
>
> isn't supported by x86 backend.
That's easy to fix.
> 2. The biggest problem is optimizing mask 0x to
Nothing major to report. I found a small buglet in
gcc/testsuite/g++.dg/dg.exp that is left over from the memmodel ->
simulate-thread rename.
I also found that trunk does not have the following change to
g++.dg/dg.exp and I will submit this as a follow up (to trunk).
Committed to branch.
h
1 - 100 of 111 matches
Mail list logo
