Sure.
We can come back to see in the future which doesn't change this codegen quality:
https://godbolt.org/z/d6rWPTWeW
juzhe.zh...@rivai.ai
From: Jeff Law
Date: 2023-07-08 05:11
To: juzhe.zh...@rivai.ai; Robin Dapp
CC: gcc-patches; kito.cheng; Kito.cheng; palmer; palmer
Subject: Re: [PATCH]
Commited, thanks Robin and Jeff.
-- Original --
From:
"juzhe.zh...@rivai.ai"
OK. Thanks. Will commit with your cleanup patch.
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-07-03 16:49
To: juzhe.zh...@rivai.ai
CC: rdapp.gcc; jeffreyalaw; gcc-patches; kito.cheng; Kito.cheng; palmer; palmer
Subject: Re: [PATCH] RISC-V: Support vfwmul.vv combine lowering
On 7/3/23 10:45
We can apply it but not sure why the patchwork shows it's rejected.
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-07-03 16:44
To: juzhe.zh...@rivai.ai
CC: rdapp.gcc; jeffreyalaw; gcc-patches; kito.cheng; Kito.cheng; palmer; palmer
Subject: Re: [PATCH] RISC-V: Support vfwmul.vv combine lower
We failed to merge it since it's been rejected.
https://patchwork.sourceware.org/project/gcc/patch/20230628041512.188243-1-juzhe.zh...@rivai.ai/
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-07-03 15:49
To: juzhe.zhong
CC: rdapp.gcc; Jeff Law; gcc-patches; kito.cheng; kito.cheng; palmer;
Hi, Jeff.
That's odd. I think maybe you should first clean up your environment ?
Or you didn't build up the toolchain correctly with this patch?
Compile option: --param=riscv-autovec-preference=scalable -O3 -ffast-math
Before this patch:
https://godbolt.org/z/Y5d44WMqs
fail.s:
lw t5,0(sp)
ble
Or do you have better solution to make the case succeed to combine into vfwmul?
I am ok with any solution.
juzhe.zh...@rivai.ai
From: Jeff Law
Date: 2023-06-30 06:59
To: 钟居哲; gcc-patches
CC: kito.cheng; kito.cheng; palmer; palmer; rdapp.gcc
Subject: Re: [PATCH] RISC-V: Support vfwmul.vv combin
>> Right now I don't see a need for this patch.
No, we need this patch.
With this patch, this following case can be combine into vfwmul.vv:
#define TEST_TYPE(TYPE1, TYPE2)\
__attribute__ ((noipa)) void vwadd_##TYPE1_##TYPE2 (
You can see here:
https://godbolt.org/z/d78646hWb
The first case can't genreate vfwmul.vv but second case succeed.
Failed to match this instruction:
(set (reg:VNx2DF 150 [ vect__11.50 ])
(if_then_else:VNx2DF (unspec:VNx2BI [
(const_vector:VNx2BI repeat [
