Sure. Thanks kito.
juzhe.zh...@rivai.ai
From: Kito Cheng
Date: 2023-09-11 10:57
To: juzhe.zh...@rivai.ai
CC: gcc-patches; Kito.cheng
Subject: Re: Re: [PATCH] RISC-V: Add VLS modes VEC_PERM support[PR111311]
OK, but could you split this patch into two patches? pre-approved for both.
On Mon
OK, but could you split this patch into two patches? pre-approved for both.
On Mon, Sep 11, 2023 at 10:36 AM juzhe.zh...@rivai.ai
wrote:
>
> >> Should we also add loads and stores as well?
> >> and just make sure this is also necessary for the fix and not sneaky,
> >> right?
>
> No, we don't nee
>> Should we also add loads and stores as well?
>> and just make sure this is also necessary for the fix and not sneaky, right?
No, we don't need loads/stores. Since this following handling codes:
(define_insn_and_split "*mov_lra"
[(set (match_operand:VLS_AVL_REG 0 "reg_or_mem_operand" "=vr, m,v