On 6/10/25 2:55 PM, Vineet Gupta wrote:
On 6/10/25 13:35, Edwin Lu wrote:
The instruction scheduler appears to be speculatively hoisting vsetvl
insns outside of their basic block without checking for data
dependencies. This resulted in a situation where the following occurs
vsetvl
On 6/10/25 13:35, Edwin Lu wrote:
> The instruction scheduler appears to be speculatively hoisting vsetvl
> insns outside of their basic block without checking for data
> dependencies. This resulted in a situation where the following occurs
>
> vsetvli a5,a1,e32,m1,tu,ma
> vle32.
