"丁乐华" writes:
> > I don't think this pattern is correct, because SEL isn't commutative
> > in the vector operands.
>
> Indeed, I think I should invert PRED operand or the comparison
> operator which produce the PRED operand first.
That would work, but it would no longer be a win. The vectoriser
> I don't think this pattern is correct, because SEL isn't commutative
> in the vector operands.
Indeed, I think I should invert PRED operand or the comparison
operator which produce the PRED operand first.
> I think this should be:
>
> if (...)
> to = XEXP (to, 0);>
> and should be before
On 1/17/23 09:00, Richard Sandiford via Gcc-patches wrote:
But the idea of the fwprop change looks OK to me in principle.
What we have now seems conservative, based on heuristics that
haven't been updated in a long time. So relaxing them a bit seems
like a good idea. IIRC Jeff had another
lehua.d...@rivai.ai writes:
> From: Lehua Ding
>
> ps: Resend for adjusting the width of each line of text.
>
> Hi,
>
> When I was adding the new RISC-V auto-vectorization function, I found that
> converting `vector-reg1 vop vector-vreg2` to `scalar-reg3 vop vectorreg2`
> is not very easy to handl
Hi, Richard. Would you mind take a look at this patch?
This is a proposal patch (We could add more testcase for ARM in the future).
But we want to know if this patch is a correct approach to achieve what we want.
In RVV (RISC-V Vector), we have a bunch of instructions:
vadd.vx/vsub.vx/vmul.vx
